mirror of
https://github.com/open-sdr/openwifi.git
synced 2024-12-23 23:43:06 +00:00
Update the devicetree and kernel config preparing for new release:
1. Devicetree needs to be simplified due to that we remove/disable lots of unnecessary adi FPGA blocks/functionalities 2. Add more Linux kernel modules/functionalities to easy more powerful/flexible network setup/features
This commit is contained in:
parent
b075baec2e
commit
38796372a8
Binary file not shown.
@ -665,51 +665,51 @@
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};
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};
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dma@7c400000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c400000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x39 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0xb>;
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phandle = <0xb>;
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// dma@7c400000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c400000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x39 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0xb>;
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// phandle = <0xb>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x2>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x0>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x2>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x0>;
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// };
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// };
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// };
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dma@7c420000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c420000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x38 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0xd>;
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phandle = <0xd>;
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// dma@7c420000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c420000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x38 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0xd>;
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// phandle = <0xd>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x0>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x2>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x0>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x2>;
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// };
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// };
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// };
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sdr: sdr {
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compatible ="sdr,sdr";
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@ -843,8 +843,8 @@
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cf-ad9361-lpc@79020000 {
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compatible = "adi,axi-ad9361-6.00.a";
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reg = <0x79020000 0x6000>;
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dmas = <0xb 0x0>;
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dma-names = "rx";
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// dmas = <0xb 0x0>;
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// dma-names = "rx";
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spibus-connected = <0xc>;
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};
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@ -853,8 +853,8 @@
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reg = <0x79024000 0x1000>;
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clocks = <0xc 0xd>;
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clock-names = "sampl_clk";
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dmas = <0xd 0x0>;
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dma-names = "tx";
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// dmas = <0xd 0x0>;
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// dma-names = "tx";
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};
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mwipcore@43c00000 {
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@ -654,51 +654,51 @@
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};
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};
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dma@7c400000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c400000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x39 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0xa>;
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phandle = <0xa>;
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// dma@7c400000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c400000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x39 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0xa>;
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// phandle = <0xa>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x2>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x0>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x2>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x0>;
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// };
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// };
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// };
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dma@7c420000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c420000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x38 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0xc>;
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phandle = <0xc>;
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// dma@7c420000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c420000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x38 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0xc>;
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// phandle = <0xc>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x0>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x2>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x0>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x2>;
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// };
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// };
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// };
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sdr: sdr {
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compatible ="sdr,sdr";
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@ -832,8 +832,8 @@
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cf-ad9361-lpc@79020000 {
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compatible = "adi,axi-ad9361-6.00.a";
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reg = <0x79020000 0x6000>;
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dmas = <0xa 0x0>;
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dma-names = "rx";
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// dmas = <0xa 0x0>;
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// dma-names = "rx";
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spibus-connected = <0xb>;
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};
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@ -842,8 +842,8 @@
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reg = <0x79024000 0x1000>;
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clocks = <0xb 0xd>;
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clock-names = "sampl_clk";
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dmas = <0xc 0x0>;
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dma-names = "tx";
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// dmas = <0xc 0x0>;
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// dma-names = "tx";
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};
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mwipcore@43c00000 {
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Binary file not shown.
@ -654,51 +654,51 @@
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};
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};
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dma@7c400000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c400000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x39 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0xa>;
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phandle = <0xa>;
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// dma@7c400000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c400000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x39 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0xa>;
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// phandle = <0xa>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x2>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x0>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x2>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x0>;
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// };
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// };
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// };
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dma@7c420000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c420000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x38 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0xc>;
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phandle = <0xc>;
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// dma@7c420000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c420000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x38 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0xc>;
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// phandle = <0xc>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x0>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x2>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x0>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x2>;
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// };
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// };
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// };
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sdr: sdr {
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compatible ="sdr,sdr";
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@ -832,8 +832,8 @@
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cf-ad9361-lpc@79020000 {
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compatible = "adi,axi-ad9361-6.00.a";
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reg = <0x79020000 0x6000>;
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dmas = <0xa 0x0>;
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dma-names = "rx";
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// dmas = <0xa 0x0>;
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// dma-names = "rx";
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spibus-connected = <0xb>;
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};
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@ -842,8 +842,8 @@
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reg = <0x79024000 0x1000>;
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clocks = <0xb 0xd>;
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clock-names = "sampl_clk";
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dmas = <0xc 0x0>;
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dma-names = "tx";
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// dmas = <0xc 0x0>;
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// dma-names = "tx";
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};
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mwipcore@43c00000 {
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Binary file not shown.
@ -874,51 +874,51 @@
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reg = <0x45000000 0x10000>;
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};*/
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dma@7c400000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c400000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x39 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0x10>;
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phandle = <0x10>;
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// dma@7c400000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c400000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x39 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0x10>;
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// phandle = <0x10>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x2>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x0>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x2>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x0>;
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// };
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// };
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// };
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dma@7c420000 {
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compatible = "adi,axi-dmac-1.00.a";
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reg = <0x7c420000 0x10000>;
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#dma-cells = <0x1>;
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interrupts = <0x0 0x38 0x0>;
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clocks = <0x2 0x10>;
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linux,phandle = <0x12>;
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phandle = <0x12>;
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// dma@7c420000 {
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// compatible = "adi,axi-dmac-1.00.a";
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// reg = <0x7c420000 0x10000>;
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// #dma-cells = <0x1>;
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// interrupts = <0x0 0x38 0x0>;
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// clocks = <0x2 0x10>;
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// linux,phandle = <0x12>;
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// phandle = <0x12>;
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adi,channels {
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#size-cells = <0x0>;
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#address-cells = <0x1>;
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// adi,channels {
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// #size-cells = <0x0>;
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// #address-cells = <0x1>;
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dma-channel@0 {
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reg = <0x0>;
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adi,source-bus-width = <0x40>;
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adi,source-bus-type = <0x0>;
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adi,destination-bus-width = <0x40>;
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adi,destination-bus-type = <0x2>;
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};
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};
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};
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// dma-channel@0 {
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// reg = <0x0>;
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// adi,source-bus-width = <0x40>;
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// adi,source-bus-type = <0x0>;
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// adi,destination-bus-width = <0x40>;
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// adi,destination-bus-type = <0x2>;
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// };
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// };
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// };
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sdr: sdr {
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compatible ="sdr,sdr";
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@ -1052,8 +1052,8 @@
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cf-ad9361-lpc@79020000 {
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compatible = "adi,axi-ad9361-6.00.a";
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reg = <0x79020000 0x6000>;
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dmas = <0x10 0x0>;
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dma-names = "rx";
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// dmas = <0x10 0x0>;
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// dma-names = "rx";
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spibus-connected = <0x11>;
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};
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@ -1062,8 +1062,8 @@
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reg = <0x79024000 0x1000>;
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clocks = <0x11 0xd>;
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clock-names = "sampl_clk";
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dmas = <0x12 0x0>;
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dma-names = "tx";
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// dmas = <0x12 0x0>;
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// dma-names = "tx";
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};
|
||||
};
|
||||
/*
|
||||
|
Binary file not shown.
@ -803,28 +803,28 @@
|
||||
};
|
||||
};
|
||||
|
||||
dma@43000000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x43000000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0x0 0x3b 0x0>;
|
||||
clocks = <0x2 0x10>;
|
||||
linux,phandle = <0xb>;
|
||||
phandle = <0xb>;
|
||||
// dma@43000000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x43000000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// interrupts = <0x0 0x3b 0x0>;
|
||||
// clocks = <0x2 0x10>;
|
||||
// linux,phandle = <0xb>;
|
||||
// phandle = <0xb>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x0>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x1>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x0>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x1>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
axi-clkgen@79000000 {
|
||||
compatible = "adi,axi-clkgen-2.00.a";
|
||||
@ -870,51 +870,51 @@
|
||||
reg = <0x45000000 0x10000>;
|
||||
};*/
|
||||
|
||||
dma@7c400000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x7c400000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0x0 0x39 0x0>;
|
||||
clocks = <0x2 0x10>;
|
||||
linux,phandle = <0x10>;
|
||||
phandle = <0x10>;
|
||||
// dma@7c400000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x7c400000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// interrupts = <0x0 0x39 0x0>;
|
||||
// clocks = <0x2 0x10>;
|
||||
// linux,phandle = <0x10>;
|
||||
// phandle = <0x10>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x2>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x2>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x0>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
dma@7c420000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x7c420000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0x0 0x38 0x0>;
|
||||
clocks = <0x2 0x10>;
|
||||
linux,phandle = <0x12>;
|
||||
phandle = <0x12>;
|
||||
// dma@7c420000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x7c420000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// interrupts = <0x0 0x38 0x0>;
|
||||
// clocks = <0x2 0x10>;
|
||||
// linux,phandle = <0x12>;
|
||||
// phandle = <0x12>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x0>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x0>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x2>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
sdr: sdr {
|
||||
compatible ="sdr,sdr";
|
||||
@ -1048,8 +1048,8 @@
|
||||
cf-ad9361-lpc@79020000 {
|
||||
compatible = "adi,axi-ad9361-6.00.a";
|
||||
reg = <0x79020000 0x6000>;
|
||||
dmas = <0x10 0x0>;
|
||||
dma-names = "rx";
|
||||
// dmas = <0x10 0x0>;
|
||||
// dma-names = "rx";
|
||||
spibus-connected = <0x11>;
|
||||
};
|
||||
|
||||
@ -1058,8 +1058,8 @@
|
||||
reg = <0x79024000 0x1000>;
|
||||
clocks = <0x11 0xd>;
|
||||
clock-names = "sampl_clk";
|
||||
dmas = <0x12 0x0>;
|
||||
dma-names = "tx";
|
||||
// dmas = <0x12 0x0>;
|
||||
// dma-names = "tx";
|
||||
};
|
||||
|
||||
mwipcore@43c00000 {
|
||||
|
Binary file not shown.
@ -2388,53 +2388,53 @@
|
||||
#size-cells = <0x1>;
|
||||
ranges = <0x0 0x0 0x0 0xffffffff>;
|
||||
|
||||
dma@9c400000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x9c400000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
#clock-cells = <0x0>;
|
||||
interrupts = <0x0 0x6d 0x0>;
|
||||
clocks = <0x3 0x47>;
|
||||
linux,phandle = <0x44>;
|
||||
phandle = <0x44>;
|
||||
// dma@9c400000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x9c400000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// #clock-cells = <0x0>;
|
||||
// interrupts = <0x0 0x6d 0x0>;
|
||||
// clocks = <0x3 0x47>;
|
||||
// linux,phandle = <0x44>;
|
||||
// phandle = <0x44>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x2>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x2>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x0>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
dma@9c420000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x9c420000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
#clock-cells = <0x0>;
|
||||
interrupts = <0x0 0x6c 0x0>;
|
||||
clocks = <0x3 0x47>;
|
||||
linux,phandle = <0x46>;
|
||||
phandle = <0x46>;
|
||||
// dma@9c420000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x9c420000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// #clock-cells = <0x0>;
|
||||
// interrupts = <0x0 0x6c 0x0>;
|
||||
// clocks = <0x3 0x47>;
|
||||
// linux,phandle = <0x46>;
|
||||
// phandle = <0x46>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x0>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x0>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x2>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
sdr: sdr {
|
||||
compatible ="sdr,sdr";
|
||||
@ -2563,8 +2563,8 @@
|
||||
cf-ad9361-lpc@99020000 {
|
||||
compatible = "adi,axi-ad9361-6.00.a";
|
||||
reg = <0x99020000 0x6000>;
|
||||
dmas = <0x44 0x0>;
|
||||
dma-names = "rx";
|
||||
// dmas = <0x44 0x0>;
|
||||
// dma-names = "rx";
|
||||
spibus-connected = <0x45>;
|
||||
};
|
||||
|
||||
@ -2573,8 +2573,8 @@
|
||||
reg = <0x99024000 0x1000>;
|
||||
clocks = <0x45 0xd>;
|
||||
clock-names = "sampl_clk";
|
||||
dmas = <0x46 0x0>;
|
||||
dma-names = "tx";
|
||||
// dmas = <0x46 0x0>;
|
||||
// dma-names = "tx";
|
||||
};
|
||||
|
||||
/*axi-sysid-0@85000000 {
|
||||
|
Binary file not shown.
@ -778,51 +778,51 @@
|
||||
};
|
||||
};
|
||||
|
||||
dma@7c400000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x7c400000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0x0 0x39 0x0>;
|
||||
clocks = <0x2 0x10>;
|
||||
linux,phandle = <0x10>;
|
||||
phandle = <0x10>;
|
||||
// dma@7c400000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x7c400000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// interrupts = <0x0 0x39 0x0>;
|
||||
// clocks = <0x2 0x10>;
|
||||
// linux,phandle = <0x10>;
|
||||
// phandle = <0x10>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x2>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x2>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x0>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
dma@7c420000 {
|
||||
compatible = "adi,axi-dmac-1.00.a";
|
||||
reg = <0x7c420000 0x10000>;
|
||||
#dma-cells = <0x1>;
|
||||
interrupts = <0x0 0x38 0x0>;
|
||||
clocks = <0x2 0x10>;
|
||||
linux,phandle = <0x12>;
|
||||
phandle = <0x12>;
|
||||
// dma@7c420000 {
|
||||
// compatible = "adi,axi-dmac-1.00.a";
|
||||
// reg = <0x7c420000 0x10000>;
|
||||
// #dma-cells = <0x1>;
|
||||
// interrupts = <0x0 0x38 0x0>;
|
||||
// clocks = <0x2 0x10>;
|
||||
// linux,phandle = <0x12>;
|
||||
// phandle = <0x12>;
|
||||
|
||||
adi,channels {
|
||||
#size-cells = <0x0>;
|
||||
#address-cells = <0x1>;
|
||||
// adi,channels {
|
||||
// #size-cells = <0x0>;
|
||||
// #address-cells = <0x1>;
|
||||
|
||||
dma-channel@0 {
|
||||
reg = <0x0>;
|
||||
adi,source-bus-width = <0x40>;
|
||||
adi,source-bus-type = <0x0>;
|
||||
adi,destination-bus-width = <0x40>;
|
||||
adi,destination-bus-type = <0x2>;
|
||||
};
|
||||
};
|
||||
};
|
||||
// dma-channel@0 {
|
||||
// reg = <0x0>;
|
||||
// adi,source-bus-width = <0x40>;
|
||||
// adi,source-bus-type = <0x0>;
|
||||
// adi,destination-bus-width = <0x40>;
|
||||
// adi,destination-bus-type = <0x2>;
|
||||
// };
|
||||
// };
|
||||
// };
|
||||
|
||||
sdr: sdr {
|
||||
compatible ="sdr,sdr";
|
||||
@ -956,8 +956,8 @@
|
||||
cf-ad9361-lpc@79020000 {
|
||||
compatible = "adi,axi-ad9361-6.00.a";
|
||||
reg = <0x79020000 0x6000>;
|
||||
dmas = <0x10 0x0>;
|
||||
dma-names = "rx";
|
||||
// dmas = <0x10 0x0>;
|
||||
// dma-names = "rx";
|
||||
spibus-connected = <0x11>;
|
||||
};
|
||||
|
||||
@ -966,8 +966,8 @@
|
||||
reg = <0x79024000 0x1000>;
|
||||
clocks = <0x11 0xd>;
|
||||
clock-names = "sampl_clk";
|
||||
dmas = <0x12 0x0>;
|
||||
dma-names = "tx";
|
||||
// dmas = <0x12 0x0>;
|
||||
// dma-names = "tx";
|
||||
};
|
||||
};
|
||||
|
||||
|
@ -744,6 +744,7 @@ CONFIG_NET_PTP_CLASSIFY=y
|
||||
# CONFIG_NETWORK_PHY_TIMESTAMPING is not set
|
||||
CONFIG_NETFILTER=y
|
||||
CONFIG_NETFILTER_ADVANCED=y
|
||||
CONFIG_BRIDGE_NETFILTER=m
|
||||
|
||||
#
|
||||
# Core Netfilter Configuration
|
||||
@ -821,6 +822,7 @@ CONFIG_NFT_FIB=y
|
||||
CONFIG_NF_DUP_NETDEV=y
|
||||
CONFIG_NFT_DUP_NETDEV=y
|
||||
CONFIG_NFT_FWD_NETDEV=y
|
||||
# CONFIG_NFT_FIB_NETDEV is not set
|
||||
CONFIG_NETFILTER_XTABLES=y
|
||||
|
||||
#
|
||||
@ -838,7 +840,7 @@ CONFIG_NETFILTER_XT_TARGET_CONNMARK=y
|
||||
CONFIG_NETFILTER_XT_TARGET_CT=y
|
||||
CONFIG_NETFILTER_XT_TARGET_DSCP=y
|
||||
CONFIG_NETFILTER_XT_TARGET_HL=y
|
||||
CONFIG_NETFILTER_XT_TARGET_HMARK=y
|
||||
CONFIG_NETFILTER_XT_TARGET_HMARK=m
|
||||
CONFIG_NETFILTER_XT_TARGET_IDLETIMER=y
|
||||
CONFIG_NETFILTER_XT_TARGET_LED=y
|
||||
CONFIG_NETFILTER_XT_TARGET_LOG=y
|
||||
@ -875,7 +877,7 @@ CONFIG_NETFILTER_XT_MATCH_DEVGROUP=y
|
||||
CONFIG_NETFILTER_XT_MATCH_DSCP=y
|
||||
CONFIG_NETFILTER_XT_MATCH_ECN=y
|
||||
CONFIG_NETFILTER_XT_MATCH_ESP=y
|
||||
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_HASHLIMIT=m
|
||||
CONFIG_NETFILTER_XT_MATCH_HELPER=y
|
||||
CONFIG_NETFILTER_XT_MATCH_HL=y
|
||||
CONFIG_NETFILTER_XT_MATCH_IPCOMP=y
|
||||
@ -890,12 +892,14 @@ CONFIG_NETFILTER_XT_MATCH_NFACCT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_OSF=y
|
||||
CONFIG_NETFILTER_XT_MATCH_OWNER=y
|
||||
CONFIG_NETFILTER_XT_MATCH_POLICY=y
|
||||
# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_PKTTYPE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_QUOTA=y
|
||||
CONFIG_NETFILTER_XT_MATCH_RATEEST=y
|
||||
CONFIG_NETFILTER_XT_MATCH_REALM=y
|
||||
CONFIG_NETFILTER_XT_MATCH_RECENT=y
|
||||
CONFIG_NETFILTER_XT_MATCH_SCTP=y
|
||||
# CONFIG_NETFILTER_XT_MATCH_SOCKET is not set
|
||||
CONFIG_NETFILTER_XT_MATCH_STATE=y
|
||||
CONFIG_NETFILTER_XT_MATCH_STATISTIC=y
|
||||
CONFIG_NETFILTER_XT_MATCH_STRING=y
|
||||
@ -954,27 +958,54 @@ CONFIG_IP_NF_ARP_MANGLE=y
|
||||
#
|
||||
# IPv6: Netfilter Configuration
|
||||
#
|
||||
# CONFIG_NF_DEFRAG_IPV6 is not set
|
||||
# CONFIG_NF_CONNTRACK_IPV6 is not set
|
||||
# CONFIG_NF_SOCKET_IPV6 is not set
|
||||
# CONFIG_NF_TABLES_IPV6 is not set
|
||||
CONFIG_NF_DEFRAG_IPV6=m
|
||||
CONFIG_NF_CONNTRACK_IPV6=m
|
||||
CONFIG_NF_SOCKET_IPV6=m
|
||||
CONFIG_NF_TABLES_IPV6=m
|
||||
CONFIG_NFT_CHAIN_ROUTE_IPV6=m
|
||||
CONFIG_NFT_REJECT_IPV6=m
|
||||
CONFIG_NFT_DUP_IPV6=m
|
||||
CONFIG_NFT_FIB_IPV6=m
|
||||
CONFIG_NF_DUP_IPV6=m
|
||||
# CONFIG_NF_REJECT_IPV6 is not set
|
||||
CONFIG_NF_REJECT_IPV6=m
|
||||
CONFIG_NF_LOG_IPV6=m
|
||||
# CONFIG_IP6_NF_IPTABLES is not set
|
||||
# CONFIG_NF_NAT_IPV6 is not set
|
||||
CONFIG_IP6_NF_IPTABLES=m
|
||||
CONFIG_IP6_NF_MATCH_AH=m
|
||||
CONFIG_IP6_NF_MATCH_EUI64=m
|
||||
CONFIG_IP6_NF_MATCH_FRAG=m
|
||||
CONFIG_IP6_NF_MATCH_OPTS=m
|
||||
CONFIG_IP6_NF_MATCH_HL=m
|
||||
CONFIG_IP6_NF_MATCH_IPV6HEADER=m
|
||||
CONFIG_IP6_NF_MATCH_MH=m
|
||||
# CONFIG_IP6_NF_MATCH_RPFILTER is not set
|
||||
CONFIG_IP6_NF_MATCH_RT=m
|
||||
# CONFIG_IP6_NF_TARGET_HL is not set
|
||||
CONFIG_IP6_NF_FILTER=m
|
||||
# CONFIG_IP6_NF_TARGET_REJECT is not set
|
||||
CONFIG_IP6_NF_TARGET_SYNPROXY=m
|
||||
CONFIG_IP6_NF_MANGLE=m
|
||||
CONFIG_IP6_NF_RAW=m
|
||||
# CONFIG_IP6_NF_NAT is not set
|
||||
# CONFIG_NF_TABLES_BRIDGE is not set
|
||||
# CONFIG_BRIDGE_NF_EBTABLES is not set
|
||||
# CONFIG_IP_DCCP is not set
|
||||
# CONFIG_IP_SCTP is not set
|
||||
# CONFIG_RDS is not set
|
||||
# CONFIG_TIPC is not set
|
||||
# CONFIG_ATM is not set
|
||||
# CONFIG_L2TP is not set
|
||||
# CONFIG_BRIDGE is not set
|
||||
CONFIG_STP=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_BRIDGE_IGMP_SNOOPING=y
|
||||
CONFIG_BRIDGE_VLAN_FILTERING=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
# CONFIG_NET_DSA is not set
|
||||
CONFIG_VLAN_8021Q=m
|
||||
# CONFIG_VLAN_8021Q_GVRP is not set
|
||||
# CONFIG_VLAN_8021Q_MVRP is not set
|
||||
# CONFIG_DECNET is not set
|
||||
CONFIG_LLC=m
|
||||
# CONFIG_LLC2 is not set
|
||||
# CONFIG_IPX is not set
|
||||
# CONFIG_ATALK is not set
|
||||
|
@ -925,9 +925,12 @@ CONFIG_BRIDGE_EBT_MARK_T=m
|
||||
CONFIG_STP=m
|
||||
CONFIG_BRIDGE=m
|
||||
CONFIG_BRIDGE_IGMP_SNOOPING=y
|
||||
CONFIG_BRIDGE_VLAN_FILTERING=y
|
||||
CONFIG_HAVE_NET_DSA=y
|
||||
# CONFIG_NET_DSA is not set
|
||||
# CONFIG_VLAN_8021Q is not set
|
||||
CONFIG_VLAN_8021Q=y
|
||||
# CONFIG_VLAN_8021Q_GVRP is not set
|
||||
# CONFIG_VLAN_8021Q_MVRP is not set
|
||||
# CONFIG_DECNET is not set
|
||||
CONFIG_LLC=m
|
||||
# CONFIG_LLC2 is not set
|
||||
@ -1059,7 +1062,9 @@ CONFIG_WEXT_PROC=y
|
||||
CONFIG_CFG80211=m
|
||||
CONFIG_NL80211_TESTMODE=y
|
||||
CONFIG_CFG80211_DEVELOPER_WARNINGS=y
|
||||
# CONFIG_CFG80211_CERTIFICATION_ONUS is not set
|
||||
CONFIG_CFG80211_CERTIFICATION_ONUS=y
|
||||
CONFIG_CFG80211_REG_CELLULAR_HINTS=y
|
||||
CONFIG_CFG80211_REG_RELAX_NO_IR=y
|
||||
CONFIG_CFG80211_DEFAULT_PS=y
|
||||
CONFIG_CFG80211_DEBUGFS=y
|
||||
# CONFIG_CFG80211_INTERNAL_REGDB is not set
|
||||
@ -1854,6 +1859,7 @@ CONFIG_WLAN_VENDOR_ADMTEK=y
|
||||
# CONFIG_ADM8211 is not set
|
||||
CONFIG_WLAN_VENDOR_ATH=y
|
||||
# CONFIG_ATH_DEBUG is not set
|
||||
# CONFIG_ATH_REG_DYNAMIC_USER_REG_HINTS is not set
|
||||
# CONFIG_ATH5K is not set
|
||||
# CONFIG_ATH5K_PCI is not set
|
||||
# CONFIG_ATH9K is not set
|
||||
|
Loading…
Reference in New Issue
Block a user