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DO NOT reconnect ad9361 while not loading FPGA:
Cause mess behavior on adrv9364z7020
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@ -149,7 +149,7 @@ if [ -f "$TARGET_DIR/system_top.bit.bin" ]; then
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./load_fpga_img.sh $TARGET_DIR/system_top.bit.bin
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./load_fpga_img.sh $TARGET_DIR/system_top.bit.bin
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else
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else
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echo $TARGET_DIR/system_top.bit.bin not found. Skip reloading FPGA.
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echo $TARGET_DIR/system_top.bit.bin not found. Skip reloading FPGA.
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./load_fpga_img.sh fjdo349ujtrueugjhj
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# ./load_fpga_img.sh fjdo349ujtrueugjhj
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fi
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fi
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./rf_init_11n.sh
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./rf_init_11n.sh
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