DO NOT reconnect ad9361 while not loading FPGA:

Cause mess behavior on adrv9364z7020
This commit is contained in:
Xianjun Jiao 2023-02-09 16:08:02 +01:00
parent a097294415
commit 2349a78387

View File

@ -149,7 +149,7 @@ if [ -f "$TARGET_DIR/system_top.bit.bin" ]; then
./load_fpga_img.sh $TARGET_DIR/system_top.bit.bin ./load_fpga_img.sh $TARGET_DIR/system_top.bit.bin
else else
echo $TARGET_DIR/system_top.bit.bin not found. Skip reloading FPGA. echo $TARGET_DIR/system_top.bit.bin not found. Skip reloading FPGA.
./load_fpga_img.sh fjdo349ujtrueugjhj # ./load_fpga_img.sh fjdo349ujtrueugjhj
fi fi
./rf_init_11n.sh ./rf_init_11n.sh