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add debug section
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@ -7,6 +7,7 @@ Above figure shows software and hardware/FPGA modules that compose the openwifi
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- [sdrctl command](#sdrctl-command)
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- [rx packet flow and filtering config](#rx-packet-flow-and-filtering-config)
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- [tx packet flow and config](#tx-packet-flow-and-config)
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- [debug methods](#debug-methods)
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## driver and software overall principle
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@ -180,3 +181,52 @@ Each time when FPGA send a packet, an interrupt will be raised to Linux reportin
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- packet length and sequence number
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- packet sending result: packet is sent successfully (FPGA receive ACK for this packet) or not. How many retransmissions are used for the packet sending (in case FPGA doesn't receive ACK for several times)
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- send above information to upper layer (Linux mac80211 subsystem) via ieee80211_tx_status_irqsafe()
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## debug methods
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### dmesg
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To debug/see the basic driver behaviour, you could use dmesg command in Linux. openwifi driver prints normal tx/rx packet information when a packet is sent or received. The driver also prints WARNING information if it feels something abnormal happens. You can search "printk" in sdr.c to see all the printing points.
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- tx printing example
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sdr,sdr openwifi_tx: 116bytes 48M FC0208 DI002c addr1/2/3:b827ebe65f1e/66554433224c/66554433224c SC1df0 flag40000012 retry2 ack1 q0 sn1075 R/CTS 00 1M 0us wr/rd 19/19
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- printing from sdr driver, openwifi_tx function.
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- 116bytes: packet size (length field in SIGNAL) is 116 bytes.
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- 48M: MCS (rate field in SIGNAL) is 48Mbps.
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- FC0208: Frame Control field 0x0208, which means type data, subtype data, to DS 0, from DS 1 (a packet from AP to client).
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- DI002c: Duration/ID field 0x002c. How many us this packet will occupy the channel (including waiting for ACK).
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- addr1/2/3: address fields. Target MAC address b827ebe65f1e, source MAC address 66554433224c (openwifi).
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- SC1df0: Sequence Control field 0x1df0, which means that the driver inserts sequence number 0x1df0 to the packet under request of upper layer.
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- flag40000012: flags field from upper layer struct ieee80211_tx_info (first fragment? need ACK? need sequence number insertion? etc.). Here is 0x40000012.
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- retry2: upper layer tells us the maximum number of retransmissions for this packet is 2.
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- ack1: upper layer tells us this packet needs ACK.
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- q0: the packet goes to FPGA queue 0.
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- sn1075: PHY/FPGA sequence number 1075. This is different from Sequence Control asked by upper layer. This is for cross check between FPGA/interrupt and driver.
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- R/CTS 00: upper layer believes this packet doesn't need RTS/CTS mechanism (Because the packet size is below the RTS threshold).
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- 1M 0us: if RTS/CTS is asked to be used by upper layer, it should use xM rate and Xus duration.
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- wr/rd 19/19: the write/read index of buffer (shared buffer between the active openwifi_tx and background openwifi_tx_interrupt).
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- rx printing example
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sdr,sdr openwifi_rx_interrupt: 120bytes ht0 54M FC0108 DI002c addr1/2/3:66554433224c/b827ebe65f1e/66554433224c SCcf20 fcs1 sn117 i117 -36dBm
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- printing from sdr driver, openwifi_rx_interrupt function.
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- 120bytes: packet size (length field in SIGNAL) is 120 bytes.
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- ht0: this is non-ht packet.
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- 54M: MCS (rate field in SIGNAL) is 54Mbps.
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- FC0108: Frame Control field 0x0208, which means type data, subtype data, to DS 1, from DS 0 (a packet client to openwifi AP).
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- DI002c: Duration/ID field 0x002c. How many us this packet will occupy the channel (including waiting for ACK).
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- addr1/2/3: address fields. Target MAC address 66554433224c (openwifi), source MAC address b827ebe65f1e.
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- SCcf20: Sequence Control field 0x1df0, which means that the packet includes sequence number 0xcf20 (under request of upper layer of the peer).
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- fcs1: FCS/CRC is OK.
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- sn117: HY/FPGA sequence number 117. This is different from Sequence Control asked by upper layer. This is for cross check between FPGA/interrupt and driver.
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- i117: current rx packet DMA buffer index 117.
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- -36dBm: signal strength of this received packet.
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### native Linux tools
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For protocol, many native Linux tools you still could rely on. Such as tcpdump.
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### FPGA
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For FPGA itself, FPGA developer could use Xilinx ILA tools to spy on FPGA signals.
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