mirror of
https://github.com/open-sdr/openwifi.git
synced 2024-12-18 21:28:07 +00:00
Add neptunesdr files
This commit is contained in:
Xianjun Jiao
Xianjun Jiao
parent
c0371e3594
commit
0410b1af1a
BIN
kernel_boot/boards/neptunesdr/devicetree.dtb
Normal file
BIN
kernel_boot/boards/neptunesdr/devicetree.dtb
Normal file
Binary file not shown.
889
kernel_boot/boards/neptunesdr/devicetree.dts
Normal file
889
kernel_boot/boards/neptunesdr/devicetree.dts
Normal file
@ -0,0 +1,889 @@
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/dts-v1/;
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/ {
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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compatible = "xlnx,zynq-7000";
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interrupt-parent = <0x01>;
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model = "Analog Devices ADRV9364-Z7020 (Z7020/AD9364)";
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cpus {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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cpu@0 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0x00>;
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clocks = <0x02 0x03>;
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clock-latency = <0x3e8>;
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cpu0-supply = <0x03>;
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operating-points = <0xa2c2b 0xf4240 0x51616 0xf4240>;
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};
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cpu@1 {
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compatible = "arm,cortex-a9";
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device_type = "cpu";
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reg = <0x01>;
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clocks = <0x02 0x03>;
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};
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};
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fpga-full {
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compatible = "fpga-region";
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fpga-mgr = <0x04>;
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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ranges;
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};
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pmu@f8891000 {
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compatible = "arm,cortex-a9-pmu";
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interrupts = <0x00 0x05 0x04 0x00 0x06 0x04>;
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interrupt-parent = <0x01>;
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reg = <0xf8891000 0x1000 0xf8893000 0x1000>;
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};
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fixedregulator {
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compatible = "regulator-fixed";
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regulator-name = "VCCPINT";
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regulator-min-microvolt = <0xf4240>;
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regulator-max-microvolt = <0xf4240>;
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regulator-boot-on;
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regulator-always-on;
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linux,phandle = <0x03>;
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phandle = <0x03>;
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};
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amba {
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u-boot,dm-pre-reloc;
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compatible = "simple-bus";
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#address-cells = <0x01>;
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#size-cells = <0x01>;
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interrupt-parent = <0x01>;
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ranges;
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adc@f8007100 {
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compatible = "xlnx,zynq-xadc-1.00.a";
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reg = <0xf8007100 0x20>;
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interrupts = <0x00 0x07 0x04>;
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interrupt-parent = <0x01>;
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clocks = <0x02 0x0c>;
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};
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can@e0008000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = <0x02 0x13 0x02 0x24>;
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clock-names = "can_clk\0pclk";
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reg = <0xe0008000 0x1000>;
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interrupts = <0x00 0x1c 0x04>;
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interrupt-parent = <0x01>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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};
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can@e0009000 {
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compatible = "xlnx,zynq-can-1.0";
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status = "disabled";
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clocks = <0x02 0x14 0x02 0x25>;
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clock-names = "can_clk\0pclk";
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reg = <0xe0009000 0x1000>;
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interrupts = <0x00 0x33 0x04>;
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interrupt-parent = <0x01>;
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tx-fifo-depth = <0x40>;
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rx-fifo-depth = <0x40>;
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};
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gpio@e000a000 {
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compatible = "xlnx,zynq-gpio-1.0";
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#gpio-cells = <0x02>;
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clocks = <0x02 0x2a>;
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gpio-controller;
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interrupt-controller;
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#interrupt-cells = <0x02>;
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interrupt-parent = <0x01>;
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interrupts = <0x00 0x14 0x04>;
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reg = <0xe000a000 0x1000>;
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linux,phandle = <0x06>;
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phandle = <0x06>;
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};
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i2c@e0004000 {
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compatible = "cdns,i2c-r1p10";
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status = "disabled";
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clocks = <0x02 0x26>;
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interrupt-parent = <0x01>;
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interrupts = <0x00 0x19 0x04>;
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reg = <0xe0004000 0x1000>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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};
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i2c@e0005000 {
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compatible = "cdns,i2c-r1p10";
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status = "disabled";
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clocks = <0x02 0x27>;
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interrupt-parent = <0x01>;
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interrupts = <0x00 0x30 0x04>;
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reg = <0xe0005000 0x1000>;
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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};
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interrupt-controller@f8f01000 {
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compatible = "arm,cortex-a9-gic";
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#interrupt-cells = <0x03>;
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interrupt-controller;
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reg = <0xf8f01000 0x1000 0xf8f00100 0x100>;
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linux,phandle = <0x01>;
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phandle = <0x01>;
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};
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cache-controller@f8f02000 {
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compatible = "arm,pl310-cache";
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reg = <0xf8f02000 0x1000>;
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interrupts = <0x00 0x02 0x04>;
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arm,data-latency = <0x03 0x02 0x02>;
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arm,tag-latency = <0x02 0x02 0x02>;
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cache-unified;
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cache-level = <0x02>;
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};
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memory-controller@f8006000 {
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compatible = "xlnx,zynq-ddrc-a05";
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reg = <0xf8006000 0x1000>;
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};
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ocmc@f800c000 {
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compatible = "xlnx,zynq-ocmc-1.0";
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interrupt-parent = <0x01>;
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interrupts = <0x00 0x03 0x04>;
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reg = <0xf800c000 0x1000>;
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};
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serial@e0000000 {
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compatible = "xlnx,xuartps\0cdns,uart-r1p8";
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status = "disabled";
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clocks = <0x02 0x17 0x02 0x28>;
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clock-names = "uart_clk\0pclk";
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reg = <0xe0000000 0x1000>;
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interrupts = <0x00 0x1b 0x04>;
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};
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serial@e0001000 {
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compatible = "xlnx,xuartps\0cdns,uart-r1p8";
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status = "okay";
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clocks = <0x02 0x18 0x02 0x29>;
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clock-names = "uart_clk\0pclk";
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reg = <0xe0001000 0x1000>;
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interrupts = <0x00 0x32 0x04>;
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};
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spi@e0006000 {
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compatible = "xlnx,zynq-spi-r1p6";
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reg = <0xe0006000 0x1000>;
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status = "okay";
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interrupt-parent = <0x01>;
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interrupts = <0x00 0x1a 0x04>;
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clocks = <0x02 0x19 0x02 0x22>;
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clock-names = "ref_clk\0pclk";
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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ad9361-phy@0 {
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#address-cells = <0x01>;
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#size-cells = <0x00>;
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#clock-cells = <0x01>;
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compatible = "adi,ad9361";
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reg = <0x00>;
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spi-cpha;
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spi-max-frequency = <0x989680>;
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clocks = <0x05 0x00>;
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clock-names = "ad9364_ext_refclk";
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clock-output-names = "rx_sampl_clk\0tx_sampl_clk";
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adi,digital-interface-tune-skip-mode = <0x00>;
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adi,pp-tx-swap-enable;
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adi,pp-rx-swap-enable;
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adi,rx-frame-pulse-mode-enable;
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adi,lvds-mode-enable;
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adi,lvds-bias-mV = <0x96>;
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adi,lvds-rx-onchip-termination-enable;
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adi,rx-data-delay = <0x04>;
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adi,tx-fb-clock-delay = <0x07>;
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adi,xo-disable-use-ext-refclk-enable;
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adi,2rx-2tx-mode-enable;
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adi,frequency-division-duplex-mode-enable;
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adi,rx-rf-port-input-select = <0x00>;
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adi,tx-rf-port-input-select = <0x00>;
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adi,tx-attenuation-mdB = <0x2710>;
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adi,tx-lo-powerdown-managed-enable;
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adi,rf-rx-bandwidth-hz = <0x112a880>;
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adi,rf-tx-bandwidth-hz = <0x112a880>;
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adi,rx-synthesizer-frequency-hz = <0x00 0x8f0d1800>;
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adi,tx-synthesizer-frequency-hz = <0x00 0x92080880>;
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adi,rx-path-clock-frequencies = <0x3a980000 0xea60000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
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adi,tx-path-clock-frequencies = <0x3a980000 0x7530000 0x7530000 0x3a98000 0x1d4c000 0x1d4c000>;
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adi,gc-rx1-mode = <0x02>;
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adi,gc-rx2-mode = <0x02>;
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adi,gc-adc-ovr-sample-size = <0x04>;
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adi,gc-adc-small-overload-thresh = <0x2f>;
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adi,gc-adc-large-overload-thresh = <0x3a>;
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adi,gc-lmt-overload-high-thresh = <0x320>;
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adi,gc-lmt-overload-low-thresh = <0x2c0>;
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adi,gc-dec-pow-measurement-duration = <0x2000>;
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adi,gc-low-power-thresh = <0x18>;
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adi,mgc-inc-gain-step = <0x02>;
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adi,mgc-dec-gain-step = <0x02>;
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adi,mgc-split-table-ctrl-inp-gain-mode = <0x00>;
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adi,agc-attack-delay-extra-margin-us = <0x01>;
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adi,agc-outer-thresh-high = <0x05>;
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adi,agc-outer-thresh-high-dec-steps = <0x02>;
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adi,agc-inner-thresh-high = <0x0a>;
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adi,agc-inner-thresh-high-dec-steps = <0x01>;
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adi,agc-inner-thresh-low = <0x0c>;
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adi,agc-inner-thresh-low-inc-steps = <0x01>;
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adi,agc-outer-thresh-low = <0x12>;
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adi,agc-outer-thresh-low-inc-steps = <0x02>;
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adi,agc-adc-small-overload-exceed-counter = <0x0a>;
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adi,agc-adc-large-overload-exceed-counter = <0x0a>;
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adi,agc-adc-large-overload-inc-steps = <0x02>;
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adi,agc-lmt-overload-large-exceed-counter = <0x0a>;
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adi,agc-lmt-overload-small-exceed-counter = <0x0a>;
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adi,agc-lmt-overload-large-inc-steps = <0x02>;
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adi,agc-gain-update-interval-us = <0x3e8>;
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adi,fagc-dec-pow-measurement-duration = <0x40>;
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adi,fagc-lp-thresh-increment-steps = <0x01>;
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adi,fagc-lp-thresh-increment-time = <0x05>;
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adi,fagc-energy-lost-stronger-sig-gain-lock-exit-cnt = <0x08>;
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adi,fagc-final-overrange-count = <0x03>;
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adi,fagc-gain-index-type-after-exit-rx-mode = <0x00>;
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adi,fagc-lmt-final-settling-steps = <0x01>;
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adi,fagc-lock-level = <0x0a>;
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adi,fagc-lock-level-gain-increase-upper-limit = <0x05>;
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adi,fagc-lock-level-lmt-gain-increase-enable;
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adi,fagc-lpf-final-settling-steps = <0x01>;
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adi,fagc-optimized-gain-offset = <0x05>;
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adi,fagc-power-measurement-duration-in-state5 = <0x40>;
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adi,fagc-rst-gla-engergy-lost-goto-optim-gain-enable;
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adi,fagc-rst-gla-engergy-lost-sig-thresh-below-ll = <0x0a>;
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adi,fagc-rst-gla-engergy-lost-sig-thresh-exceeded-enable;
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adi,fagc-rst-gla-if-en-agc-pulled-high-mode = <0x00>;
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adi,fagc-rst-gla-large-adc-overload-enable;
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adi,fagc-rst-gla-large-lmt-overload-enable;
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adi,fagc-rst-gla-stronger-sig-thresh-above-ll = <0x0a>;
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adi,fagc-rst-gla-stronger-sig-thresh-exceeded-enable;
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adi,fagc-state-wait-time-ns = <0x104>;
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adi,fagc-use-last-lock-level-for-set-gain-enable;
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adi,rssi-restart-mode = <0x03>;
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adi,rssi-delay = <0x01>;
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adi,rssi-wait = <0x01>;
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adi,rssi-duration = <0x3e8>;
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adi,ctrl-outs-index = <0x00>;
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adi,ctrl-outs-enable-mask = <0xff>;
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adi,temp-sense-measurement-interval-ms = <0x3e8>;
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adi,temp-sense-offset-signed = <0xce>;
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adi,temp-sense-periodic-measurement-enable;
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adi,aux-dac-manual-mode-enable;
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adi,aux-dac1-default-value-mV = <0x00>;
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adi,aux-dac1-rx-delay-us = <0x00>;
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adi,aux-dac1-tx-delay-us = <0x00>;
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adi,aux-dac2-default-value-mV = <0x00>;
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adi,aux-dac2-rx-delay-us = <0x00>;
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adi,aux-dac2-tx-delay-us = <0x00>;
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en_agc-gpios = <0x06 0x62 0x00>;
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sync-gpios = <0x06 0x63 0x00>;
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reset-gpios = <0x06 0x64 0x00>;
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enable-gpios = <0x06 0x65 0x00>;
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txnrx-gpios = <0x06 0x66 0x00>;
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linux,phandle = <0x0b>;
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phandle = <0x0b>;
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||||
};
|
||||
};
|
||||
|
||||
spi@e0007000 {
|
||||
compatible = "xlnx,zynq-spi-r1p6";
|
||||
reg = <0xe0007000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x31 0x04>;
|
||||
clocks = <0x02 0x1a 0x02 0x23>;
|
||||
clock-names = "ref_clk\0pclk";
|
||||
#address-cells = <0x01>;
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||||
#size-cells = <0x00>;
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||||
};
|
||||
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||||
spi@e000d000 {
|
||||
clock-names = "ref_clk\0pclk";
|
||||
clocks = <0x02 0x0a 0x02 0x2b>;
|
||||
compatible = "xlnx,zynq-qspi-1.0";
|
||||
status = "okay";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x13 0x04>;
|
||||
reg = <0xe000d000 0x1000>;
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x00>;
|
||||
is-dual = <0x00>;
|
||||
num-cs = <0x01>;
|
||||
|
||||
ps7-qspi@0 {
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x01>;
|
||||
spi-tx-bus-width = <0x01>;
|
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spi-rx-bus-width = <0x04>;
|
||||
compatible = "n25q256a\0jedec,spi-nor";
|
||||
reg = <0x00>;
|
||||
spi-max-frequency = <0x2faf080>;
|
||||
|
||||
partition@qspi-fsbl-uboot {
|
||||
label = "qspi-fsbl-uboot";
|
||||
reg = <0x00 0xe0000>;
|
||||
};
|
||||
|
||||
partition@qspi-uboot-env {
|
||||
label = "qspi-uboot-env";
|
||||
reg = <0xe0000 0x20000>;
|
||||
};
|
||||
|
||||
partition@qspi-linux {
|
||||
label = "qspi-linux";
|
||||
reg = <0x100000 0x500000>;
|
||||
};
|
||||
|
||||
partition@qspi-device-tree {
|
||||
label = "qspi-device-tree";
|
||||
reg = <0x600000 0x20000>;
|
||||
};
|
||||
|
||||
partition@qspi-rootfs {
|
||||
label = "qspi-rootfs";
|
||||
reg = <0x620000 0xce0000>;
|
||||
};
|
||||
|
||||
partition@qspi-bitstream {
|
||||
label = "qspi-bitstream";
|
||||
reg = <0x1300000 0xd00000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
memory-controller@e000e000 {
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x01>;
|
||||
status = "disabled";
|
||||
clock-names = "memclk\0aclk";
|
||||
clocks = <0x02 0x0b 0x02 0x2c>;
|
||||
compatible = "arm,pl353-smc-r2p1";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x12 0x04>;
|
||||
ranges;
|
||||
reg = <0xe000e000 0x1000>;
|
||||
|
||||
flash@e1000000 {
|
||||
status = "disabled";
|
||||
compatible = "arm,pl353-nand-r2p1";
|
||||
reg = <0xe1000000 0x1000000>;
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x01>;
|
||||
};
|
||||
|
||||
flash@e2000000 {
|
||||
status = "disabled";
|
||||
compatible = "cfi-flash";
|
||||
reg = <0xe2000000 0x2000000>;
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x01>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@e000b000 {
|
||||
compatible = "cdns,zynq-gem\0cdns,gem";
|
||||
reg = <0xe000b000 0x1000>;
|
||||
status = "okay";
|
||||
interrupts = <0x00 0x16 0x04>;
|
||||
clocks = <0x02 0x1e 0x02 0x1e 0x02 0x0d>;
|
||||
clock-names = "pclk\0hclk\0tx_clk";
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x00>;
|
||||
phy-handle = <0x07>;
|
||||
phy-mode = "rgmii-id";
|
||||
|
||||
phy@0 {
|
||||
device_type = "ethernet-phy";
|
||||
reg = <0x00>;
|
||||
marvell,reg-init = <0x03 0x10 0xff00 0x1e 0x03 0x11 0xfff0 0x00>;
|
||||
linux,phandle = <0x07>;
|
||||
phandle = <0x07>;
|
||||
};
|
||||
};
|
||||
|
||||
ethernet@e000c000 {
|
||||
compatible = "cdns,zynq-gem\0cdns,gem";
|
||||
reg = <0xe000c000 0x1000>;
|
||||
status = "disabled";
|
||||
interrupts = <0x00 0x2d 0x04>;
|
||||
clocks = <0x02 0x1f 0x02 0x1f 0x02 0x0e>;
|
||||
clock-names = "pclk\0hclk\0tx_clk";
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x00>;
|
||||
};
|
||||
|
||||
mmc@e0100000 {
|
||||
compatible = "arasan,sdhci-8.9a";
|
||||
status = "okay";
|
||||
clock-names = "clk_xin\0clk_ahb";
|
||||
clocks = <0x02 0x15 0x02 0x20>;
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x18 0x04>;
|
||||
reg = <0xe0100000 0x1000>;
|
||||
disable-wp;
|
||||
};
|
||||
|
||||
mmc@e0101000 {
|
||||
compatible = "arasan,sdhci-8.9a";
|
||||
status = "disabled";
|
||||
clock-names = "clk_xin\0clk_ahb";
|
||||
clocks = <0x02 0x16 0x02 0x21>;
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x2f 0x04>;
|
||||
reg = <0xe0101000 0x1000>;
|
||||
};
|
||||
|
||||
slcr@f8000000 {
|
||||
u-boot,dm-pre-reloc;
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x01>;
|
||||
compatible = "xlnx,zynq-slcr\0syscon\0simple-mfd";
|
||||
reg = <0xf8000000 0x1000>;
|
||||
ranges;
|
||||
linux,phandle = <0x08>;
|
||||
phandle = <0x08>;
|
||||
|
||||
clkc@100 {
|
||||
u-boot,dm-pre-reloc;
|
||||
#clock-cells = <0x01>;
|
||||
compatible = "xlnx,ps7-clkc";
|
||||
fclk-enable = <0x0f>;
|
||||
clock-output-names = "armpll\0ddrpll\0iopll\0cpu_6or4x\0cpu_3or2x\0cpu_2x\0cpu_1x\0ddr2x\0ddr3x\0dci\0lqspi\0smc\0pcap\0gem0\0gem1\0fclk0\0fclk1\0fclk2\0fclk3\0can0\0can1\0sdio0\0sdio1\0uart0\0uart1\0spi0\0spi1\0dma\0usb0_aper\0usb1_aper\0gem0_aper\0gem1_aper\0sdio0_aper\0sdio1_aper\0spi0_aper\0spi1_aper\0can0_aper\0can1_aper\0i2c0_aper\0i2c1_aper\0uart0_aper\0uart1_aper\0gpio_aper\0lqspi_aper\0smc_aper\0swdt\0dbg_trc\0dbg_apb";
|
||||
reg = <0x100 0x100>;
|
||||
ps-clk-frequency = <0x1fca055>;
|
||||
linux,phandle = <0x02>;
|
||||
phandle = <0x02>;
|
||||
};
|
||||
|
||||
rstc@200 {
|
||||
compatible = "xlnx,zynq-reset";
|
||||
reg = <0x200 0x48>;
|
||||
#reset-cells = <0x01>;
|
||||
syscon = <0x08>;
|
||||
};
|
||||
|
||||
pinctrl@700 {
|
||||
compatible = "xlnx,pinctrl-zynq";
|
||||
reg = <0x700 0x200>;
|
||||
syscon = <0x08>;
|
||||
};
|
||||
};
|
||||
|
||||
dmac@f8003000 {
|
||||
compatible = "arm,pl330\0arm,primecell";
|
||||
reg = <0xf8003000 0x1000>;
|
||||
interrupt-parent = <0x01>;
|
||||
interrupt-names = "abort\0dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7";
|
||||
interrupts = <0x00 0x0d 0x04 0x00 0x0e 0x04 0x00 0x0f 0x04 0x00 0x10 0x04 0x00 0x11 0x04 0x00 0x28 0x04 0x00 0x29 0x04 0x00 0x2a 0x04 0x00 0x2b 0x04>;
|
||||
#dma-cells = <0x01>;
|
||||
#dma-channels = <0x08>;
|
||||
#dma-requests = <0x04>;
|
||||
clocks = <0x02 0x1b>;
|
||||
clock-names = "apb_pclk";
|
||||
};
|
||||
|
||||
devcfg@f8007000 {
|
||||
compatible = "xlnx,zynq-devcfg-1.0";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x08 0x04>;
|
||||
reg = <0xf8007000 0x100>;
|
||||
clocks = <0x02 0x0c 0x02 0x0f 0x02 0x10 0x02 0x11 0x02 0x12>;
|
||||
clock-names = "ref_clk\0fclk0\0fclk1\0fclk2\0fclk3";
|
||||
syscon = <0x08>;
|
||||
linux,phandle = <0x04>;
|
||||
phandle = <0x04>;
|
||||
};
|
||||
|
||||
efuse@f800d000 {
|
||||
compatible = "xlnx,zynq-efuse";
|
||||
reg = <0xf800d000 0x20>;
|
||||
};
|
||||
|
||||
timer@f8f00200 {
|
||||
compatible = "arm,cortex-a9-global-timer";
|
||||
reg = <0xf8f00200 0x20>;
|
||||
interrupts = <0x01 0x0b 0x301>;
|
||||
interrupt-parent = <0x01>;
|
||||
clocks = <0x02 0x04>;
|
||||
};
|
||||
|
||||
timer@f8001000 {
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x0a 0x04 0x00 0x0b 0x04 0x00 0x0c 0x04>;
|
||||
compatible = "cdns,ttc";
|
||||
clocks = <0x02 0x06>;
|
||||
reg = <0xf8001000 0x1000>;
|
||||
};
|
||||
|
||||
timer@f8002000 {
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x25 0x04 0x00 0x26 0x04 0x00 0x27 0x04>;
|
||||
compatible = "cdns,ttc";
|
||||
clocks = <0x02 0x06>;
|
||||
reg = <0xf8002000 0x1000>;
|
||||
};
|
||||
|
||||
timer@f8f00600 {
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x01 0x0d 0x301>;
|
||||
compatible = "arm,cortex-a9-twd-timer";
|
||||
reg = <0xf8f00600 0x20>;
|
||||
clocks = <0x02 0x04>;
|
||||
};
|
||||
|
||||
usb@e0002000 {
|
||||
compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
|
||||
status = "okay";
|
||||
clocks = <0x02 0x1c>;
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x15 0x04>;
|
||||
reg = <0xe0002000 0x1000>;
|
||||
phy_type = "ulpi";
|
||||
dr_mode = "host";
|
||||
xlnx,phy-reset-gpio = <0x06 0x07 0x00>;
|
||||
};
|
||||
|
||||
usb@e0003000 {
|
||||
compatible = "xlnx,zynq-usb-2.20a\0chipidea,usb2";
|
||||
status = "disabled";
|
||||
clocks = <0x02 0x1d>;
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x2c 0x04>;
|
||||
reg = <0xe0003000 0x1000>;
|
||||
phy_type = "ulpi";
|
||||
};
|
||||
|
||||
watchdog@f8005000 {
|
||||
clocks = <0x02 0x2d>;
|
||||
compatible = "cdns,wdt-r1p2";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x09 0x01>;
|
||||
reg = <0xf8005000 0x1000>;
|
||||
timeout-sec = <0x0a>;
|
||||
};
|
||||
};
|
||||
|
||||
aliases {
|
||||
ethernet0 = "/amba/ethernet@e000b000";
|
||||
serial0 = "/amba/serial@e0001000";
|
||||
};
|
||||
|
||||
memory {
|
||||
device_type = "memory";
|
||||
reg = <0x00 0x40000000>;
|
||||
};
|
||||
|
||||
chosen {
|
||||
linux,stdout-path = "/amba@0/uart@E0001000";
|
||||
};
|
||||
|
||||
clocks {
|
||||
|
||||
clock@0 {
|
||||
#clock-cells = <0x00>;
|
||||
compatible = "adjustable-clock";
|
||||
clock-frequency = <0x2625a00>;
|
||||
clock-accuracy = <0x30d40>;
|
||||
clock-output-names = "ad9364_ext_refclk";
|
||||
linux,phandle = <0x05>;
|
||||
phandle = <0x05>;
|
||||
};
|
||||
|
||||
clock@1 {
|
||||
#clock-cells = <0x00>;
|
||||
compatible = "fixed-clock";
|
||||
clock-frequency = <0x16e3600>;
|
||||
clock-output-names = "24MHz";
|
||||
linux,phandle = <0x09>;
|
||||
phandle = <0x09>;
|
||||
};
|
||||
};
|
||||
|
||||
usb-ulpi-gpio-gate@0 {
|
||||
compatible = "gpio-gate-clock";
|
||||
clocks = <0x09>;
|
||||
#clock-cells = <0x00>;
|
||||
enable-gpios = <0x06 0x09 0x01>;
|
||||
};
|
||||
|
||||
fpga-axi@0 {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x01>;
|
||||
ranges;
|
||||
|
||||
i2c@41600000 {
|
||||
compatible = "xlnx,axi-iic-1.02.a\0xlnx,xps-iic-2.00.a";
|
||||
reg = <0x41600000 0x10000>;
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x3a 0x04>;
|
||||
clocks = <0x02 0x0f>;
|
||||
clock-names = "pclk";
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x00>;
|
||||
|
||||
ad7291@20 {
|
||||
compatible = "adi,ad7291";
|
||||
reg = <0x20>;
|
||||
};
|
||||
|
||||
ad7291-bob@2C {
|
||||
compatible = "adi,ad7291";
|
||||
reg = <0x2c>;
|
||||
};
|
||||
|
||||
eeprom@50 {
|
||||
compatible = "at24,24c32";
|
||||
reg = <0x50>;
|
||||
};
|
||||
};
|
||||
|
||||
sdr {
|
||||
compatible = "sdr,sdr";
|
||||
dmas = <0x0a 0x01 0x0c 0x00>;
|
||||
dma-names = "rx_dma_s2mm\0tx_dma_mm2s";
|
||||
interrupt-names = "not_valid_anymore\0rx_pkt_intr\0tx_itrpt";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x1d 0x01 0x00 0x1e 0x01 0x00 0x21 0x01 0x00 0x22 0x01>;
|
||||
};
|
||||
|
||||
axidmatest@1 {
|
||||
compatible = "xlnx,axi-dma-test-1.00.a";
|
||||
dmas = <0x0a 0x00 0x0a 0x01>;
|
||||
dma-names = "axidma0\0axidma1";
|
||||
};
|
||||
|
||||
dma@80400000 {
|
||||
#dma-cells = <0x01>;
|
||||
clock-names = "s_axi_lite_aclk\0m_axi_sg_aclk\0m_axi_mm2s_aclk\0m_axi_s2mm_aclk";
|
||||
clocks = <0x02 0x11 0x02 0x11 0x02 0x11 0x02 0x11>;
|
||||
compatible = "xlnx,axi-dma-1.00.a";
|
||||
interrupt-names = "mm2s_introut\0s2mm_introut";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x23 0x04 0x00 0x24 0x04>;
|
||||
reg = <0x80400000 0x10000>;
|
||||
xlnx,addrwidth = <0x20>;
|
||||
xlnx,include-sg;
|
||||
xlnx,sg-length-width = <0x0e>;
|
||||
phandle = <0x0c>;
|
||||
|
||||
dma-channel@80400000 {
|
||||
compatible = "xlnx,axi-dma-mm2s-channel";
|
||||
dma-channels = <0x01>;
|
||||
interrupts = <0x00 0x23 0x04>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x00>;
|
||||
};
|
||||
|
||||
dma-channel@80400030 {
|
||||
compatible = "xlnx,axi-dma-s2mm-channel";
|
||||
dma-channels = <0x01>;
|
||||
interrupts = <0x00 0x24 0x04>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x00>;
|
||||
};
|
||||
};
|
||||
|
||||
dma@80410000 {
|
||||
#dma-cells = <0x01>;
|
||||
clock-names = "s_axi_lite_aclk\0m_axi_sg_aclk\0m_axi_mm2s_aclk\0m_axi_s2mm_aclk";
|
||||
clocks = <0x02 0x11 0x02 0x11 0x02 0x11 0x02 0x11>;
|
||||
compatible = "xlnx,axi-dma-1.00.a";
|
||||
interrupt-names = "mm2s_introut\0s2mm_introut";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x1f 0x04 0x00 0x20 0x04>;
|
||||
reg = <0x80410000 0x10000>;
|
||||
xlnx,addrwidth = <0x20>;
|
||||
xlnx,include-sg;
|
||||
xlnx,sg-length-width = <0x0e>;
|
||||
phandle = <0x0a>;
|
||||
|
||||
dma-channel@80410000 {
|
||||
compatible = "xlnx,axi-dma-mm2s-channel";
|
||||
dma-channels = <0x01>;
|
||||
interrupts = <0x00 0x1f 0x04>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x01>;
|
||||
};
|
||||
|
||||
dma-channel@80410030 {
|
||||
compatible = "xlnx,axi-dma-s2mm-channel";
|
||||
dma-channels = <0x01>;
|
||||
interrupts = <0x00 0x20 0x04>;
|
||||
xlnx,datawidth = <0x40>;
|
||||
xlnx,device-id = <0x01>;
|
||||
};
|
||||
};
|
||||
|
||||
tx_intf@83c00000 {
|
||||
clock-names = "s00_axi_aclk\0s00_axis_aclk";
|
||||
clocks = <0x02 0x11 0x02 0x11>;
|
||||
compatible = "sdr,tx_intf";
|
||||
interrupt-names = "tx_itrpt";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x22 0x01>;
|
||||
reg = <0x83c00000 0x10000>;
|
||||
xlnx,s00-axi-addr-width = <0x07>;
|
||||
xlnx,s00-axi-data-width = <0x20>;
|
||||
};
|
||||
|
||||
rx_intf@83c20000 {
|
||||
clock-names = "s00_axi_aclk\0m00_axis_aclk";
|
||||
clocks = <0x02 0x11 0x02 0x11>;
|
||||
compatible = "sdr,rx_intf";
|
||||
interrupt-names = "not_valid_anymore\0rx_pkt_intr";
|
||||
interrupt-parent = <0x01>;
|
||||
interrupts = <0x00 0x1d 0x01 0x00 0x1e 0x01>;
|
||||
reg = <0x83c20000 0x10000>;
|
||||
xlnx,s00-axi-addr-width = <0x07>;
|
||||
xlnx,s00-axi-data-width = <0x20>;
|
||||
};
|
||||
|
||||
openofdm_tx@83c10000 {
|
||||
clock-names = "clk";
|
||||
clocks = <0x02 0x11>;
|
||||
compatible = "sdr,openofdm_tx";
|
||||
reg = <0x83c10000 0x10000>;
|
||||
};
|
||||
|
||||
openofdm_rx@83c30000 {
|
||||
clock-names = "clk";
|
||||
clocks = <0x02 0x11>;
|
||||
compatible = "sdr,openofdm_rx";
|
||||
reg = <0x83c30000 0x10000>;
|
||||
};
|
||||
|
||||
xpu@83c40000 {
|
||||
clock-names = "s00_axi_aclk";
|
||||
clocks = <0x02 0x11>;
|
||||
compatible = "sdr,xpu";
|
||||
reg = <0x83c40000 0x10000>;
|
||||
};
|
||||
|
||||
side_ch@83c50000 {
|
||||
clock-names = "s00_axi_aclk";
|
||||
clocks = <0x02 0x11>;
|
||||
compatible = "sdr,side_ch";
|
||||
reg = <0x83c50000 0x10000>;
|
||||
dmas = <0x0a 0x00 0x0c 0x01>;
|
||||
dma-names = "rx_dma_mm2s\0tx_dma_s2mm";
|
||||
};
|
||||
|
||||
cf-ad9361-lpc@79020000 {
|
||||
compatible = "adi,axi-ad9361-6.00.a";
|
||||
reg = <0x79020000 0x6000>;
|
||||
spibus-connected = <0x0b>;
|
||||
};
|
||||
|
||||
cf-ad9361-dds-core-lpc@79024000 {
|
||||
compatible = "adi,axi-ad9361-dds-6.00.a";
|
||||
reg = <0x79024000 0x1000>;
|
||||
clocks = <0x0b 0x0d>;
|
||||
clock-names = "sampl_clk";
|
||||
};
|
||||
|
||||
mwipcore@43c00000 {
|
||||
compatible = "mathworks,mwipcore-axi4lite-v1.00";
|
||||
reg = <0x43c00000 0xffff>;
|
||||
};
|
||||
};
|
||||
|
||||
leds {
|
||||
compatible = "gpio-leds";
|
||||
|
||||
led0 {
|
||||
label = "led0:green";
|
||||
gpios = <0x06 0x3a 0x00>;
|
||||
};
|
||||
|
||||
led1 {
|
||||
label = "led1:green";
|
||||
gpios = <0x06 0x3b 0x00>;
|
||||
};
|
||||
|
||||
led2 {
|
||||
label = "led2:green";
|
||||
gpios = <0x06 0x3c 0x00>;
|
||||
};
|
||||
|
||||
led3 {
|
||||
label = "led3:green";
|
||||
gpios = <0x06 0x3d 0x00>;
|
||||
};
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
#address-cells = <0x01>;
|
||||
#size-cells = <0x00>;
|
||||
autorepeat;
|
||||
|
||||
pb0 {
|
||||
label = "Left";
|
||||
linux,code = <0x69>;
|
||||
gpios = <0x06 0x36 0x00>;
|
||||
};
|
||||
|
||||
pb1 {
|
||||
label = "Right";
|
||||
linux,code = <0x6a>;
|
||||
gpios = <0x06 0x37 0x00>;
|
||||
};
|
||||
|
||||
pb2 {
|
||||
label = "Up";
|
||||
linux,code = <0x67>;
|
||||
gpios = <0x06 0x38 0x00>;
|
||||
};
|
||||
|
||||
pb3 {
|
||||
label = "Down";
|
||||
linux,code = <0x6c>;
|
||||
gpios = <0x06 0x39 0x00>;
|
||||
};
|
||||
|
||||
sw0 {
|
||||
label = "SW0";
|
||||
linux,input-type = <0x05>;
|
||||
linux,code = <0x00>;
|
||||
gpios = <0x06 0x3e 0x00>;
|
||||
};
|
||||
|
||||
sw1 {
|
||||
label = "SW1";
|
||||
linux,input-type = <0x05>;
|
||||
linux,code = <0x01>;
|
||||
gpios = <0x06 0x3f 0x00>;
|
||||
};
|
||||
|
||||
sw2 {
|
||||
label = "SW2";
|
||||
linux,input-type = <0x05>;
|
||||
linux,code = <0x02>;
|
||||
gpios = <0x06 0x40 0x00>;
|
||||
};
|
||||
|
||||
sw3 {
|
||||
label = "SW3";
|
||||
linux,input-type = <0x05>;
|
||||
linux,code = <0x03>;
|
||||
gpios = <0x06 0x41 0x00>;
|
||||
};
|
||||
};
|
||||
};
|
||||
BIN
kernel_boot/boards/neptunesdr/u-boot.elf
Normal file
BIN
kernel_boot/boards/neptunesdr/u-boot.elf
Normal file
Binary file not shown.
Loading…
Reference in New Issue
Block a user