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52 lines
1.4 KiB
Makefile
52 lines
1.4 KiB
Makefile
###############################################################################
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#
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# ICARUS VERILOG & GTKWAVE MAKEFILE
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# MADE BY WILLIAM GIBB FOR HACDC
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# williamgibb@gmail.com
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#
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# USE THE FOLLOWING COMMANDS WITH THIS MAKEFILE
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# "make check" - compiles your verilog design - good for checking code
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# "make simulate" - compiles your design+TB & simulates your design
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# "make display" - compiles, simulates and displays waveforms
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#
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###############################################################################
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#TOOL INPUT
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SRC = $(wildcard *.v) $(wildcard *.mif) $(wildcard *.coe)
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MODULE_LIST = dot11_modules.list
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TESTBENCH = dot11_tb.v
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COMPILER_OUT = dot11.out
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SIM_OUT = dot11.vcd
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###############################################################################
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# BE CAREFUL WHEN CHANGING ITEMS BELOW THIS LINE
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###############################################################################
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#TOOLS
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COMPILER = iverilog
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SIMULATOR = vvp
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VIEWER = gtkwave
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#TOOL OPTIONS
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COMPILER_FLAGS = -v -c $(MODULE_LIST) -o $(COMPILER_OUT) -DDEBUG_PRINT
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SIMULATOR_FLAGS = -v -n
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###############################################################################
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all: compile simulate
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#MAKE DIRECTIVES
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compile: $(COMPILER_OUT)
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simulate: $(COMPILER_OUT) $(SIM_OUT)
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$(COMPILER_OUT): $(TESTBENCH) $(SRC)
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$(COMPILER) $(COMPILER_FLAGS) $(TESTBENCH)
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$(SIM_OUT): $(COMPILER_OUT)
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$(SIMULATOR) $(SIMULATOR_FLAGS) $(COMPILER_OUT)
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clean:
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rm -rfv $(COMPILER_OUT) $(SIM_OUT)
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.PHONY: clean
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