openofdm/verilog/Xilinx
2022-01-04 22:15:16 +01:00
..
12.2/ISE_DS/ISE/verilog/src verilog init 2017-04-03 12:52:03 -04:00
zynq phase estimation update: quadrant quantization from 256 slices -> 512 slices 2022-01-04 22:15:16 +01:00
zynquplus phase estimation update: quadrant quantization from 256 slices -> 512 slices 2022-01-04 22:15:16 +01:00