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556794ae2e
openofdm/verilog/coregen/complex_multiplier.v
Jinghao Shi 9edf1899bd verilog init
2017-04-03 12:52:03 -04:00

868 lines
49 KiB
Verilog
Raw Blame History

////////////////////////////////////////////////////////////////////////////////
// Copyright (c) 1995-2010 Xilinx, Inc. All rights reserved.
////////////////////////////////////////////////////////////////////////////////
// ____ ____
// / /\/ /
// /___/ \ / Vendor: Xilinx
// \ \ \/ Version: M.63c
// \ \ Application: netgen
// / / Filename: complex_multiplier.v
// /___/ /\ Timestamp: Tue Aug 23 11:23:16 2016
// \ \ / \
// \___\/\___\
//
// Command : -intstyle ise -w -sim -ofmt verilog ./tmp/_cg/complex_multiplier.ngc ./tmp/_cg/complex_multiplier.v
// Device : 3sd3400afg676-5
// Input file : ./tmp/_cg/complex_multiplier.ngc
// Output file : ./tmp/_cg/complex_multiplier.v
// # of Modules : 1
// Design Name : complex_multiplier
// Xilinx : /opt/Xilinx/12.2/ISE_DS/ISE/
//
// Purpose:
// This verilog netlist is a verification model and uses simulation
// primitives which may not represent the true implementation of the
// device, however the netlist is functionally correct and should not
// be modified. This file cannot be synthesized and should only be used
// with supported simulation tools.
//
// Reference:
// Command Line Tools User Guide, Chapter 23 and Synthesis and Simulation Design Guide, Chapter 6
//
////////////////////////////////////////////////////////////////////////////////
`timescale 1 ns/1 ps
module complex_multiplier (
clk, ai, bi, ar, br, pi, pr
)/* synthesis syn_black_box syn_noprune=1 */;
input clk;
input [15 : 0] ai;
input [15 : 0] bi;
input [15 : 0] ar;
input [15 : 0] br;
output [31 : 0] pi;
output [31 : 0] pr;
// synthesis translate_off
wire \blk00000003/sig000000a4 ;
wire \blk00000003/sig000000a3 ;
wire \blk00000003/sig000000a2 ;
wire \blk00000003/sig000000a1 ;
wire \blk00000003/sig000000a0 ;
wire \blk00000003/sig0000009f ;
wire \blk00000003/sig0000009e ;
wire \blk00000003/sig0000009d ;
wire \blk00000003/sig0000009c ;
wire \blk00000003/sig0000009b ;
wire \blk00000003/sig0000009a ;
wire \blk00000003/sig00000099 ;
wire \blk00000003/sig00000098 ;
wire \blk00000003/sig00000097 ;
wire \blk00000003/sig00000096 ;
wire \blk00000003/sig00000095 ;
wire \blk00000003/sig00000094 ;
wire \blk00000003/sig00000093 ;
wire \blk00000003/sig00000092 ;
wire \blk00000003/sig00000091 ;
wire \blk00000003/sig00000090 ;
wire \blk00000003/sig0000008f ;
wire \blk00000003/sig0000008e ;
wire \blk00000003/sig0000008d ;
wire \blk00000003/sig0000008c ;
wire \blk00000003/sig0000008b ;
wire \blk00000003/sig0000008a ;
wire \blk00000003/sig00000089 ;
wire \blk00000003/sig00000088 ;
wire \blk00000003/sig00000087 ;
wire \blk00000003/sig00000086 ;
wire \blk00000003/sig00000085 ;
wire \blk00000003/sig00000084 ;
wire \blk00000003/sig00000083 ;
wire \blk00000003/sig00000082 ;
wire NLW_blk00000001_P_UNCONNECTED;
wire NLW_blk00000002_G_UNCONNECTED;
wire \NLW_blk00000003/blk00000008_CARRYOUT_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<47>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<46>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<45>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<44>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<43>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<42>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<41>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<40>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<39>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<38>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<37>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<36>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<35>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<34>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<33>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_P<32>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<47>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<46>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<45>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<44>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<43>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<42>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<41>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<40>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<39>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<38>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<37>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<36>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<35>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<34>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<33>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<32>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<31>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<30>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<29>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<28>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<27>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<26>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<25>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<24>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<23>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<22>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<21>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<20>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<19>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<18>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<17>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<16>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<15>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<14>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<13>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<12>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<11>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<10>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<9>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<8>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<7>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<6>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<5>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<4>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<3>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<2>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<1>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_PCOUT<0>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<17>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<16>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<15>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<14>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<13>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<12>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<11>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<10>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<9>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<8>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<7>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<6>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<5>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<4>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<3>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<2>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<1>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000008_BCOUT<0>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_CARRYOUT_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<47>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<46>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<45>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<44>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<43>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<42>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<41>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<40>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<39>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<38>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<37>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<36>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<35>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<34>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_P<32>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<47>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<46>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<45>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<44>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<43>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<42>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<41>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<40>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<39>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<38>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<37>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<36>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<35>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<34>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<33>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<32>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<31>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<30>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<29>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<28>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<27>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<26>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<25>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<24>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<23>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<22>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<21>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<20>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<19>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<18>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<17>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<16>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<15>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<14>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<13>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<12>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<11>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<10>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<9>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<8>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<7>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<6>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<5>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<4>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<3>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<2>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<1>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_PCOUT<0>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<17>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<16>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<15>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<14>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<13>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<12>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<11>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<10>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<9>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<8>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<7>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<6>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<5>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<4>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<3>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<2>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<1>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000007_BCOUT<0>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_CARRYOUT_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<47>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<46>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<45>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<44>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<43>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<42>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<41>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<40>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<39>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<38>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<37>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<36>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<35>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<34>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<33>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_P<32>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<47>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<46>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<45>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<44>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<43>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<42>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<41>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<40>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<39>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<38>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<37>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<36>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<35>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<34>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<33>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<32>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<31>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<30>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<29>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<28>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<27>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<26>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<25>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<24>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<23>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<22>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<21>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<20>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<19>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<18>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<17>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<16>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<15>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<14>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<13>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<12>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<11>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<10>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<9>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<8>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<7>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<6>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<5>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<4>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<3>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<2>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<1>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_PCOUT<0>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<17>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<16>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<15>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<14>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<13>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<12>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<11>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<10>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<9>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<8>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<7>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<6>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<5>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<4>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<3>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<2>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<1>_UNCONNECTED ;
wire \NLW_blk00000003/blk00000006_BCOUT<0>_UNCONNECTED ;
wire [15 : 0] ar_0;
wire [15 : 0] ai_1;
wire [15 : 0] br_2;
wire [15 : 0] bi_3;
wire [31 : 0] pr_4;
wire [31 : 0] pi_5;
assign
ai_1[15] = ai[15],
ai_1[14] = ai[14],
ai_1[13] = ai[13],
ai_1[12] = ai[12],
ai_1[11] = ai[11],
ai_1[10] = ai[10],
ai_1[9] = ai[9],
ai_1[8] = ai[8],
ai_1[7] = ai[7],
ai_1[6] = ai[6],
ai_1[5] = ai[5],
ai_1[4] = ai[4],
ai_1[3] = ai[3],
ai_1[2] = ai[2],
ai_1[1] = ai[1],
ai_1[0] = ai[0],
bi_3[15] = bi[15],
bi_3[14] = bi[14],
bi_3[13] = bi[13],
bi_3[12] = bi[12],
bi_3[11] = bi[11],
bi_3[10] = bi[10],
bi_3[9] = bi[9],
bi_3[8] = bi[8],
bi_3[7] = bi[7],
bi_3[6] = bi[6],
bi_3[5] = bi[5],
bi_3[4] = bi[4],
bi_3[3] = bi[3],
bi_3[2] = bi[2],
bi_3[1] = bi[1],
bi_3[0] = bi[0],
ar_0[15] = ar[15],
ar_0[14] = ar[14],
ar_0[13] = ar[13],
ar_0[12] = ar[12],
ar_0[11] = ar[11],
ar_0[10] = ar[10],
ar_0[9] = ar[9],
ar_0[8] = ar[8],
ar_0[7] = ar[7],
ar_0[6] = ar[6],
ar_0[5] = ar[5],
ar_0[4] = ar[4],
ar_0[3] = ar[3],
ar_0[2] = ar[2],
ar_0[1] = ar[1],
ar_0[0] = ar[0],
br_2[15] = br[15],
br_2[14] = br[14],
br_2[13] = br[13],
br_2[12] = br[12],
br_2[11] = br[11],
br_2[10] = br[10],
br_2[9] = br[9],
br_2[8] = br[8],
br_2[7] = br[7],
br_2[6] = br[6],
br_2[5] = br[5],
br_2[4] = br[4],
br_2[3] = br[3],
br_2[2] = br[2],
br_2[1] = br[1],
br_2[0] = br[0],
pi[31] = pi_5[31],
pi[30] = pi_5[30],
pi[29] = pi_5[29],
pi[28] = pi_5[28],
pi[27] = pi_5[27],
pi[26] = pi_5[26],
pi[25] = pi_5[25],
pi[24] = pi_5[24],
pi[23] = pi_5[23],
pi[22] = pi_5[22],
pi[21] = pi_5[21],
pi[20] = pi_5[20],
pi[19] = pi_5[19],
pi[18] = pi_5[18],
pi[17] = pi_5[17],
pi[16] = pi_5[16],
pi[15] = pi_5[15],
pi[14] = pi_5[14],
pi[13] = pi_5[13],
pi[12] = pi_5[12],
pi[11] = pi_5[11],
pi[10] = pi_5[10],
pi[9] = pi_5[9],
pi[8] = pi_5[8],
pi[7] = pi_5[7],
pi[6] = pi_5[6],
pi[5] = pi_5[5],
pi[4] = pi_5[4],
pi[3] = pi_5[3],
pi[2] = pi_5[2],
pi[1] = pi_5[1],
pi[0] = pi_5[0],
pr[31] = pr_4[31],
pr[30] = pr_4[30],
pr[29] = pr_4[29],
pr[28] = pr_4[28],
pr[27] = pr_4[27],
pr[26] = pr_4[26],
pr[25] = pr_4[25],
pr[24] = pr_4[24],
pr[23] = pr_4[23],
pr[22] = pr_4[22],
pr[21] = pr_4[21],
pr[20] = pr_4[20],
pr[19] = pr_4[19],
pr[18] = pr_4[18],
pr[17] = pr_4[17],
pr[16] = pr_4[16],
pr[15] = pr_4[15],
pr[14] = pr_4[14],
pr[13] = pr_4[13],
pr[12] = pr_4[12],
pr[11] = pr_4[11],
pr[10] = pr_4[10],
pr[9] = pr_4[9],
pr[8] = pr_4[8],
pr[7] = pr_4[7],
pr[6] = pr_4[6],
pr[5] = pr_4[5],
pr[4] = pr_4[4],
pr[3] = pr_4[3],
pr[2] = pr_4[2],
pr[1] = pr_4[1],
pr[0] = pr_4[0];
VCC blk00000001 (
.P(NLW_blk00000001_P_UNCONNECTED)
);
GND blk00000002 (
.G(NLW_blk00000002_G_UNCONNECTED)
);
DSP48A #(
.A0REG ( 0 ),
.A1REG ( 1 ),
.B0REG ( 0 ),
.B1REG ( 1 ),
.CARRYINREG ( 0 ),
.CARRYINSEL ( "OPMODE5" ),
.CREG ( 0 ),
.DREG ( 0 ),
.MREG ( 1 ),
.OPMODEREG ( 0 ),
.PREG ( 1 ),
.RSTTYPE ( "SYNC" ))
\blk00000003/blk00000008 (
.CARRYIN(\blk00000003/sig00000082 ),
.CARRYOUT(\NLW_blk00000003/blk00000008_CARRYOUT_UNCONNECTED ),
.CLK(clk),
.RSTA(\blk00000003/sig00000082 ),
.RSTB(\blk00000003/sig00000082 ),
.RSTM(\blk00000003/sig00000082 ),
.RSTP(\blk00000003/sig00000082 ),
.RSTC(\blk00000003/sig00000082 ),
.RSTD(\blk00000003/sig00000082 ),
.RSTCARRYIN(\blk00000003/sig00000082 ),
.RSTOPMODE(\blk00000003/sig00000082 ),
.CEA(\blk00000003/sig00000083 ),
.CEB(\blk00000003/sig00000083 ),
.CEM(\blk00000003/sig00000083 ),
.CEP(\blk00000003/sig00000083 ),
.CEC(\blk00000003/sig00000082 ),
.CED(\blk00000003/sig00000082 ),
.CECARRYIN(\blk00000003/sig00000082 ),
.CEOPMODE(\blk00000003/sig00000082 ),
.A({ai_1[15], ai_1[15], ai_1[15], ai_1[14], ai_1[13], ai_1[12], ai_1[11], ai_1[10], ai_1[9], ai_1[8], ai_1[7], ai_1[6], ai_1[5], ai_1[4], ai_1[3]
, ai_1[2], ai_1[1], ai_1[0]}),
.B({br_2[15], br_2[15], br_2[15], br_2[14], br_2[13], br_2[12], br_2[11], br_2[10], br_2[9], br_2[8], br_2[7], br_2[6], br_2[5], br_2[4], br_2[3]
, br_2[2], br_2[1], br_2[0]}),
.D({bi_3[15], bi_3[15], bi_3[15], bi_3[14], bi_3[13], bi_3[12], bi_3[11], bi_3[10], bi_3[9], bi_3[8], bi_3[7], bi_3[6], bi_3[5], bi_3[4], bi_3[3]
, bi_3[2], bi_3[1], bi_3[0]}),
.C({\blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 ,
\blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 ,
\blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 ,
\blk00000003/sig00000084 , \blk00000003/sig00000085 , \blk00000003/sig00000086 , \blk00000003/sig00000087 , \blk00000003/sig00000088 ,
\blk00000003/sig00000089 , \blk00000003/sig0000008a , \blk00000003/sig0000008b , \blk00000003/sig0000008c , \blk00000003/sig0000008d ,
\blk00000003/sig0000008e , \blk00000003/sig0000008f , \blk00000003/sig00000090 , \blk00000003/sig00000091 , \blk00000003/sig00000092 ,
\blk00000003/sig00000093 , \blk00000003/sig00000094 , \blk00000003/sig00000095 , \blk00000003/sig00000096 , \blk00000003/sig00000097 ,
\blk00000003/sig00000098 , \blk00000003/sig00000099 , \blk00000003/sig0000009a , \blk00000003/sig0000009b , \blk00000003/sig0000009c ,
\blk00000003/sig0000009d , \blk00000003/sig0000009e , \blk00000003/sig0000009f , \blk00000003/sig000000a0 , \blk00000003/sig000000a1 ,
\blk00000003/sig000000a2 , \blk00000003/sig000000a3 , \blk00000003/sig000000a4 }),
.P({\NLW_blk00000003/blk00000008_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<46>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<43>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<40>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<37>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<34>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000008_P<32>_UNCONNECTED , pr_4[31], pr_4[30], pr_4[29], pr_4[28], pr_4[27],
pr_4[26], pr_4[25], pr_4[24], pr_4[23], pr_4[22], pr_4[21], pr_4[20], pr_4[19], pr_4[18], pr_4[17], pr_4[16], pr_4[15], pr_4[14], pr_4[13], pr_4[12],
pr_4[11], pr_4[10], pr_4[9], pr_4[8], pr_4[7], pr_4[6], pr_4[5], pr_4[4], pr_4[3], pr_4[2], pr_4[1], pr_4[0]}),
.OPMODE({\blk00000003/sig00000083 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000083 , \blk00000003/sig00000083 ,
\blk00000003/sig00000083 , \blk00000003/sig00000082 , \blk00000003/sig00000083 }),
.PCIN({\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 }),
.PCOUT({\NLW_blk00000003/blk00000008_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<46>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<44>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<42>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<40>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<38>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<36>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<34>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<32>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<30>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<28>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<26>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<24>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<22>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<20>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<18>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<16>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<14>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<12>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<10>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<8>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<6>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<4>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<2>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000008_PCOUT<0>_UNCONNECTED }),
.BCOUT({\NLW_blk00000003/blk00000008_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<16>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<14>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<12>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<10>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<8>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<6>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<4>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<2>_UNCONNECTED ,
\NLW_blk00000003/blk00000008_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000008_BCOUT<0>_UNCONNECTED })
);
DSP48A #(
.A0REG ( 0 ),
.A1REG ( 1 ),
.B0REG ( 0 ),
.B1REG ( 1 ),
.CARRYINREG ( 0 ),
.CARRYINSEL ( "OPMODE5" ),
.CREG ( 0 ),
.DREG ( 0 ),
.MREG ( 0 ),
.OPMODEREG ( 0 ),
.PREG ( 1 ),
.RSTTYPE ( "SYNC" ))
\blk00000003/blk00000007 (
.CARRYIN(\blk00000003/sig00000082 ),
.CARRYOUT(\NLW_blk00000003/blk00000007_CARRYOUT_UNCONNECTED ),
.CLK(clk),
.RSTA(\blk00000003/sig00000082 ),
.RSTB(\blk00000003/sig00000082 ),
.RSTM(\blk00000003/sig00000082 ),
.RSTP(\blk00000003/sig00000082 ),
.RSTC(\blk00000003/sig00000082 ),
.RSTD(\blk00000003/sig00000082 ),
.RSTCARRYIN(\blk00000003/sig00000082 ),
.RSTOPMODE(\blk00000003/sig00000082 ),
.CEA(\blk00000003/sig00000083 ),
.CEB(\blk00000003/sig00000083 ),
.CEM(\blk00000003/sig00000082 ),
.CEP(\blk00000003/sig00000083 ),
.CEC(\blk00000003/sig00000082 ),
.CED(\blk00000003/sig00000082 ),
.CECARRYIN(\blk00000003/sig00000082 ),
.CEOPMODE(\blk00000003/sig00000082 ),
.A({br_2[15], br_2[15], br_2[15], br_2[14], br_2[13], br_2[12], br_2[11], br_2[10], br_2[9], br_2[8], br_2[7], br_2[6], br_2[5], br_2[4], br_2[3]
, br_2[2], br_2[1], br_2[0]}),
.B({ar_0[15], ar_0[15], ar_0[15], ar_0[14], ar_0[13], ar_0[12], ar_0[11], ar_0[10], ar_0[9], ar_0[8], ar_0[7], ar_0[6], ar_0[5], ar_0[4], ar_0[3]
, ar_0[2], ar_0[1], ar_0[0]}),
.D({ai_1[15], ai_1[15], ai_1[15], ai_1[14], ai_1[13], ai_1[12], ai_1[11], ai_1[10], ai_1[9], ai_1[8], ai_1[7], ai_1[6], ai_1[5], ai_1[4], ai_1[3]
, ai_1[2], ai_1[1], ai_1[0]}),
.C({\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 }),
.P({\NLW_blk00000003/blk00000007_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<46>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<43>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<40>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<37>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000007_P<34>_UNCONNECTED ,
\blk00000003/sig00000084 , \NLW_blk00000003/blk00000007_P<32>_UNCONNECTED , \blk00000003/sig00000085 , \blk00000003/sig00000086 ,
\blk00000003/sig00000087 , \blk00000003/sig00000088 , \blk00000003/sig00000089 , \blk00000003/sig0000008a , \blk00000003/sig0000008b ,
\blk00000003/sig0000008c , \blk00000003/sig0000008d , \blk00000003/sig0000008e , \blk00000003/sig0000008f , \blk00000003/sig00000090 ,
\blk00000003/sig00000091 , \blk00000003/sig00000092 , \blk00000003/sig00000093 , \blk00000003/sig00000094 , \blk00000003/sig00000095 ,
\blk00000003/sig00000096 , \blk00000003/sig00000097 , \blk00000003/sig00000098 , \blk00000003/sig00000099 , \blk00000003/sig0000009a ,
\blk00000003/sig0000009b , \blk00000003/sig0000009c , \blk00000003/sig0000009d , \blk00000003/sig0000009e , \blk00000003/sig0000009f ,
\blk00000003/sig000000a0 , \blk00000003/sig000000a1 , \blk00000003/sig000000a2 , \blk00000003/sig000000a3 , \blk00000003/sig000000a4 }),
.OPMODE({\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000083 , \blk00000003/sig00000083 ,
\blk00000003/sig00000083 , \blk00000003/sig00000082 , \blk00000003/sig00000083 }),
.PCIN({\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 }),
.PCOUT({\NLW_blk00000003/blk00000007_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<46>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<44>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<42>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<40>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<38>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<36>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<34>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<32>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<30>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<28>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<26>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<24>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<22>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<20>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<18>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<16>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<14>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<12>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<10>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<8>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<6>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<4>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<2>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000007_PCOUT<0>_UNCONNECTED }),
.BCOUT({\NLW_blk00000003/blk00000007_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<16>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<14>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<12>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<10>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<8>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<6>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<4>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<2>_UNCONNECTED ,
\NLW_blk00000003/blk00000007_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000007_BCOUT<0>_UNCONNECTED })
);
DSP48A #(
.A0REG ( 0 ),
.A1REG ( 1 ),
.B0REG ( 0 ),
.B1REG ( 1 ),
.CARRYINREG ( 0 ),
.CARRYINSEL ( "OPMODE5" ),
.CREG ( 0 ),
.DREG ( 0 ),
.MREG ( 1 ),
.OPMODEREG ( 0 ),
.PREG ( 1 ),
.RSTTYPE ( "SYNC" ))
\blk00000003/blk00000006 (
.CARRYIN(\blk00000003/sig00000082 ),
.CARRYOUT(\NLW_blk00000003/blk00000006_CARRYOUT_UNCONNECTED ),
.CLK(clk),
.RSTA(\blk00000003/sig00000082 ),
.RSTB(\blk00000003/sig00000082 ),
.RSTM(\blk00000003/sig00000082 ),
.RSTP(\blk00000003/sig00000082 ),
.RSTC(\blk00000003/sig00000082 ),
.RSTD(\blk00000003/sig00000082 ),
.RSTCARRYIN(\blk00000003/sig00000082 ),
.RSTOPMODE(\blk00000003/sig00000082 ),
.CEA(\blk00000003/sig00000083 ),
.CEB(\blk00000003/sig00000083 ),
.CEM(\blk00000003/sig00000083 ),
.CEP(\blk00000003/sig00000083 ),
.CEC(\blk00000003/sig00000082 ),
.CED(\blk00000003/sig00000082 ),
.CECARRYIN(\blk00000003/sig00000082 ),
.CEOPMODE(\blk00000003/sig00000082 ),
.A({ar_0[15], ar_0[15], ar_0[15], ar_0[14], ar_0[13], ar_0[12], ar_0[11], ar_0[10], ar_0[9], ar_0[8], ar_0[7], ar_0[6], ar_0[5], ar_0[4], ar_0[3]
, ar_0[2], ar_0[1], ar_0[0]}),
.B({br_2[15], br_2[15], br_2[15], br_2[14], br_2[13], br_2[12], br_2[11], br_2[10], br_2[9], br_2[8], br_2[7], br_2[6], br_2[5], br_2[4], br_2[3]
, br_2[2], br_2[1], br_2[0]}),
.D({bi_3[15], bi_3[15], bi_3[15], bi_3[14], bi_3[13], bi_3[12], bi_3[11], bi_3[10], bi_3[9], bi_3[8], bi_3[7], bi_3[6], bi_3[5], bi_3[4], bi_3[3]
, bi_3[2], bi_3[1], bi_3[0]}),
.C({\blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 ,
\blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 ,
\blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 , \blk00000003/sig00000084 ,
\blk00000003/sig00000084 , \blk00000003/sig00000085 , \blk00000003/sig00000086 , \blk00000003/sig00000087 , \blk00000003/sig00000088 ,
\blk00000003/sig00000089 , \blk00000003/sig0000008a , \blk00000003/sig0000008b , \blk00000003/sig0000008c , \blk00000003/sig0000008d ,
\blk00000003/sig0000008e , \blk00000003/sig0000008f , \blk00000003/sig00000090 , \blk00000003/sig00000091 , \blk00000003/sig00000092 ,
\blk00000003/sig00000093 , \blk00000003/sig00000094 , \blk00000003/sig00000095 , \blk00000003/sig00000096 , \blk00000003/sig00000097 ,
\blk00000003/sig00000098 , \blk00000003/sig00000099 , \blk00000003/sig0000009a , \blk00000003/sig0000009b , \blk00000003/sig0000009c ,
\blk00000003/sig0000009d , \blk00000003/sig0000009e , \blk00000003/sig0000009f , \blk00000003/sig000000a0 , \blk00000003/sig000000a1 ,
\blk00000003/sig000000a2 , \blk00000003/sig000000a3 , \blk00000003/sig000000a4 }),
.P({\NLW_blk00000003/blk00000006_P<47>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<46>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_P<45>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<44>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<43>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_P<42>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<41>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<40>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_P<39>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<38>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<37>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_P<36>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<35>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<34>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_P<33>_UNCONNECTED , \NLW_blk00000003/blk00000006_P<32>_UNCONNECTED , pi_5[31], pi_5[30], pi_5[29], pi_5[28], pi_5[27],
pi_5[26], pi_5[25], pi_5[24], pi_5[23], pi_5[22], pi_5[21], pi_5[20], pi_5[19], pi_5[18], pi_5[17], pi_5[16], pi_5[15], pi_5[14], pi_5[13], pi_5[12],
pi_5[11], pi_5[10], pi_5[9], pi_5[8], pi_5[7], pi_5[6], pi_5[5], pi_5[4], pi_5[3], pi_5[2], pi_5[1], pi_5[0]}),
.OPMODE({\blk00000003/sig00000082 , \blk00000003/sig00000083 , \blk00000003/sig00000082 , \blk00000003/sig00000083 , \blk00000003/sig00000083 ,
\blk00000003/sig00000083 , \blk00000003/sig00000082 , \blk00000003/sig00000083 }),
.PCIN({\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 ,
\blk00000003/sig00000082 , \blk00000003/sig00000082 , \blk00000003/sig00000082 }),
.PCOUT({\NLW_blk00000003/blk00000006_PCOUT<47>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<46>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<45>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<44>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<43>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<42>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<41>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<40>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<39>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<38>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<37>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<36>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<35>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<34>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<33>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<32>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<31>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<30>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<29>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<28>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<27>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<26>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<25>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<24>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<23>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<22>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<21>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<20>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<19>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<18>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<16>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<14>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<12>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<10>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<8>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<6>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<4>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<2>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_PCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000006_PCOUT<0>_UNCONNECTED }),
.BCOUT({\NLW_blk00000003/blk00000006_BCOUT<17>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<16>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<15>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<14>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<13>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<12>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<11>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<10>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<9>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<8>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<7>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<6>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<5>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<4>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<3>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<2>_UNCONNECTED ,
\NLW_blk00000003/blk00000006_BCOUT<1>_UNCONNECTED , \NLW_blk00000003/blk00000006_BCOUT<0>_UNCONNECTED })
);
VCC \blk00000003/blk00000005 (
.P(\blk00000003/sig00000083 )
);
GND \blk00000003/blk00000004 (
.G(\blk00000003/sig00000082 )
);
// synthesis translate_on
endmodule
// synthesis translate_off
`ifndef GLBL
`define GLBL
`timescale 1 ps / 1 ps
module glbl ();
parameter ROC_WIDTH = 100000;
parameter TOC_WIDTH = 0;
wire GSR;
wire GTS;
wire GWE;
wire PRLD;
tri1 p_up_tmp;
tri (weak1, strong0) PLL_LOCKG = p_up_tmp;
reg GSR_int;
reg GTS_int;
reg PRLD_int;
//-------- JTAG Globals --------------
wire JTAG_TDO_GLBL;
wire JTAG_TCK_GLBL;
wire JTAG_TDI_GLBL;
wire JTAG_TMS_GLBL;
wire JTAG_TRST_GLBL;
reg JTAG_CAPTURE_GLBL;
reg JTAG_RESET_GLBL;
reg JTAG_SHIFT_GLBL;
reg JTAG_UPDATE_GLBL;
reg JTAG_RUNTEST_GLBL;
reg JTAG_SEL1_GLBL = 0;
reg JTAG_SEL2_GLBL = 0 ;
reg JTAG_SEL3_GLBL = 0;
reg JTAG_SEL4_GLBL = 0;
reg JTAG_USER_TDO1_GLBL = 1'bz;
reg JTAG_USER_TDO2_GLBL = 1'bz;
reg JTAG_USER_TDO3_GLBL = 1'bz;
reg JTAG_USER_TDO4_GLBL = 1'bz;
assign (weak1, weak0) GSR = GSR_int;
assign (weak1, weak0) GTS = GTS_int;
assign (weak1, weak0) PRLD = PRLD_int;
initial begin
GSR_int = 1'b1;
PRLD_int = 1'b1;
#(ROC_WIDTH)
GSR_int = 1'b0;
PRLD_int = 1'b0;
end
initial begin
GTS_int = 1'b1;
#(TOC_WIDTH)
GTS_int = 1'b0;
end
endmodule
`endif
// synthesis translate_on
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