xilinx.com xci unknown 1.0 atan_lut 4096 1 0 0 0 1 100000000 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0.000 AXI4LITE READ_WRITE 0 0 0 0 0 1 0 0 0 1 100000000 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 0.000 AXI4LITE READ_WRITE 0 0 0 0 0 OTHER NONE 8192 32 1 OTHER NONE 8192 32 1 100000000 0 0.000 0 8 8 1 4 0 1 9 0 1 0 NONE 0 0 0 ./ 0 0 0 0 0 0 0 0 Estimated Power for IP : 1.617195 mW zynquplus 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 atan_lut.mem atan_lut.mif 0 1 3 0 1 256 256 1 1 9 9 0 0 CE CE ALL 0 0 0 0 0 0 0 1 1 256 256 WRITE_FIRST WRITE_FIRST 9 9 zynquplus 4 Memory_Slave AXI4_Full false Minimum_Area false 9 NONE atan_lut.coe ALL atan_lut false false false false false false false false false Always_Enabled Always_Enabled Single_Bit_Error_Injection false Native true no_mem_loaded Single_Port_ROM WRITE_FIRST WRITE_FIRST 0 0 BRAM 0 100 100 0 0 0 0 8kx2 false false 1 1 9 9 false false false false 0 false false CE CE SYNC false false false false false false false 256 9 9 No_ECC false false false Stand_Alone zynquplus xilinx.com:zcu102:part0:3.1 xczu9eg ffvb1156 VERILOG MIXED -2 E TRUE TRUE IP_Flow 2 TRUE . . 2018.3 GLOBAL