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Add DEBUG but not enabled
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@ -1,6 +1,9 @@
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`include "common_defs.v"
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`include "openofdm_rx_pre_def.v"
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// `define DEBUG_PREFIX (*mark_debug="true",DONT_TOUCH="TRUE"*)
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`define DEBUG_PREFIX
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module dot11 (
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input clock,
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input enable,
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@ -50,32 +53,32 @@ module dot11 (
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// decode status
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// (* mark_debug = "true", DONT_TOUCH = "TRUE" *)
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output reg [4:0] state,
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output reg [4:0] status_code,
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output state_changed,
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output reg [31:0] state_history,
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`DEBUG_PREFIX output reg [4:0] state,
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`DEBUG_PREFIX output reg [4:0] status_code,
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`DEBUG_PREFIX output state_changed,
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`DEBUG_PREFIX output reg [31:0] state_history,
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// power trigger
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output power_trigger,
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`DEBUG_PREFIX output power_trigger,
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// sync short
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output short_preamble_detected,
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output [15:0] phase_offset,
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`DEBUG_PREFIX output short_preamble_detected,
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`DEBUG_PREFIX output [15:0] phase_offset,
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// sync long
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output [31:0] sync_long_metric,
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output sync_long_metric_stb,
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output long_preamble_detected,
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output [31:0] sync_long_out,
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output sync_long_out_strobe,
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output wire signed [31:0] phase_offset_taken,
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output [2:0] sync_long_state,
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`DEBUG_PREFIX output [31:0] sync_long_metric,
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`DEBUG_PREFIX output sync_long_metric_stb,
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`DEBUG_PREFIX output long_preamble_detected,
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`DEBUG_PREFIX output [31:0] sync_long_out,
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`DEBUG_PREFIX output sync_long_out_strobe,
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`DEBUG_PREFIX output wire signed [31:0] phase_offset_taken,
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`DEBUG_PREFIX output [2:0] sync_long_state,
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// equalizer
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output [31:0] equalizer_out,
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output equalizer_out_strobe,
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output [3:0] equalizer_state,
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output wire ofdm_symbol_eq_out_pulse,
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`DEBUG_PREFIX output [31:0] equalizer_out,
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`DEBUG_PREFIX output equalizer_out_strobe,
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`DEBUG_PREFIX output [3:0] equalizer_state,
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`DEBUG_PREFIX output wire ofdm_symbol_eq_out_pulse,
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// legacy signal info
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output reg legacy_sig_stb,
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@ -101,9 +104,9 @@ module dot11 (
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output [1:0] ht_num_ext,
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output reg ht_sig_crc_ok,
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output [14:0] n_ofdm_sym,//max 20166 = (22+65535*8)/26 (max ht len 65535 in sig, min ndbps 26 for mcs0)
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output [9:0] n_bit_in_last_sym,//max ht ndbps 260 (ht mcs7)
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output phy_len_valid,
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`DEBUG_PREFIX output [14:0] n_ofdm_sym,//max 20166 = (22+65535*8)/26 (max ht len 65535 in sig, min ndbps 26 for mcs0)
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`DEBUG_PREFIX output [9:0] n_bit_in_last_sym,//max ht ndbps 260 (ht mcs7)
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`DEBUG_PREFIX output phy_len_valid,
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// decoding pipeline
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output [5:0] demod_out,
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@ -133,7 +136,7 @@ assign n_bit_in_last_sym = n_bit_in_last_sym_tmp[9:0];
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////////////////////////////////////////////////////////////////////////////////
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// extra info output to ease side info and viterbi state monitor
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////////////////////////////////////////////////////////////////////////////////
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reg [3:0] equalizer_state_reg;
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`DEBUG_PREFIX reg [3:0] equalizer_state_reg;
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assign ofdm_symbol_eq_out_pulse = (equalizer_state==4 && equalizer_state_reg==7);
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