diff --git a/verilog/phase.v b/verilog/phase.v
index d519ba5..b72ece1 100644
--- a/verilog/phase.v
+++ b/verilog/phase.v
@@ -78,7 +78,7 @@ divider div_inst (
     .output_strobe(div_out_stb)
 );
 
-delayT #(.DATA_WIDTH(3), .DELAY(36)) quadrant_inst  (
+delayT #(.DATA_WIDTH(3), .DELAY(37)) quadrant_inst  (
     .clock(clock),
     .reset(reset),