ExternalVendorCode/openofdm
1
0
Fork 0
mirror of https://github.com/jhshi/openofdm.git synced 2024-12-23 23:43:06 +00:00
Code Issues Actions Packages Projects Releases Wiki Activity

fix unsigned signals to signed signals

Browse Source
This commit is contained in:
Yoji Takeuchi 2023-01-16 12:56:24 +09:00
parent f3bf82a05b
commit 7e8b44439a
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
verilog/dot11.v
View File

@ -12,11 +12,11 @@ module dot11 (
//input [31:0] set_data,
// add ports for register based inputs
input [10:0] power_thres,
input signed [10:0] power_thres,
input [31:0] min_plateau,
// INPUT: RSSI
input [10:0] rssi_half_db,
input signed [10:0] rssi_half_db,
// INPUT: I/Q sample
input [31:0] sample_in,
input sample_in_strobe,