From 506472dec38a1792fed9e6483f560e720ac50bb7 Mon Sep 17 00:00:00 2001
From: Jinghao Shi <jinghaos@buffalo.edu>
Date: Mon, 3 Apr 2017 15:25:48 -0400
Subject: [PATCH] add sim_out dir

---
 verilog/sim_out/.gitignore | 4 ++++
 1 file changed, 4 insertions(+)
 create mode 100644 verilog/sim_out/.gitignore

diff --git a/verilog/sim_out/.gitignore b/verilog/sim_out/.gitignore
new file mode 100644
index 0000000..a1fe169
--- /dev/null
+++ b/verilog/sim_out/.gitignore
@@ -0,0 +1,4 @@
+# Ignore everything in this directory
+*
+# # Except this file
+!.gitignore