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fix dot11 port pinout
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b7361b2feb
commit
079744bec1
@ -37,12 +37,12 @@ wire conv_decoder_out_stb;
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wire descramble_out;
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wire descramble_out_strobe;
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wire [3:0] data_rate;
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wire signal_reserved;
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wire [11:0] length;
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wire parity;
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wire [5:0] signal_tail;
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wire signal_out_strobe;
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wire [3:0] legacy_rate;
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wire legacy_sig_rsvd;
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wire [11:0] legacy_len;
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wire legacy_sig_parity;
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wire [5:0] legacy_sig_tail;
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wire legacy_sig_stb;
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reg signal_done;
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wire [3:0] dot11_state;
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@ -88,7 +88,7 @@ integer byte_out_fd;
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`endif
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initial begin
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$dumpfile("dot11_decoder.vcd");
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$dumpfile("dot11.vcd");
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$dumpvars;
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$display("Reading memory from...");
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@ -155,7 +155,7 @@ always @(posedge clock) begin
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clk_count <= clk_count + 1;
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end
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if (signal_out_strobe) begin
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if (legacy_sig_stb) begin
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end
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if (sample_in_strobe && power_trigger) begin
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@ -196,9 +196,9 @@ always @(posedge clock) begin
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$fflush(equalizer_out_fd);
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end
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if (signal_out_strobe) begin
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if (legacy_sig_stb) begin
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signal_done <= 1;
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$fwrite(signal_fd, "%04b %b %012b %b %06b", data_rate, signal_reserved, length, parity, signal_tail);
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$fwrite(signal_fd, "%04b %b %012b %b %06b", legacy_rate, legacy_sig_rsvd, legacy_len, legacy_sig_parity, legacy_sig_tail);
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$fflush(signal_fd);
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end
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@ -272,12 +272,12 @@ dot11 dot11_inst (
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.byte_out(byte_out),
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.byte_out_strobe(byte_out_strobe),
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.data_rate(data_rate),
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.signal_reserved(signal_reserved),
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.length(length),
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.parity(parity),
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.signal_tail(signal_tail),
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.signal_out_strobe(signal_out_strobe)
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.legacy_rate(legacy_rate),
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.legacy_sig_rsvd(legacy_sig_rsvd),
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.legacy_len(legacy_len),
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.legacy_sig_parity(legacy_sig_parity),
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.legacy_sig_tail(legacy_sig_tail),
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.legacy_sig_stb(legacy_sig_stb)
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);
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endmodule
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