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Setting Registers
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=================
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- **Module**: ``usrp/setting_reg.v``
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- **Input**: ``set_stb``, ``set_addr`` and ``set_data``
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- **Output**: ``out``, ``changed``
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To enable dynamic configuration of decoding parameters at runtime, the USRP N210
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provides the setting register mechanism. Most modules in |project| have three
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common inputs for such purpose:
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- ``set_stb (1)``: asserts high when the setting data is valid
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- ``set_addr (8)``: register address (256 registers possible in total)
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- ``set_data (32)``: the register value
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2017-04-07 20:48:34 +00:00
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Here is a list of setting registers in |project|.
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2017-04-07 20:48:34 +00:00
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.. table:: List of Setting Registers in |project|.
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:align: center
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+-----------------+------+-----------------+-----------+---------------+---------------------------------------------------------------+
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| Name | Addr | Module | Bit Width | Default Value | Description |
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+-----------------+------+-----------------+-----------+---------------+---------------------------------------------------------------+
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| SR_POWRE_THRES | 3 | power_trigger.v | 16 | 100 | Threshold for power trigger |
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+-----------------+------+-----------------+-----------+---------------+---------------------------------------------------------------+
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| SR_POWER_WINDOW | 4 | power_trigger.v | 16 | 80 | Number of samples to wait before reset the trigger signal |
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+-----------------+------+-----------------+-----------+---------------+---------------------------------------------------------------+
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| SR_SKIP_SAMPLE | 5 | power_trigger.v | 32 | 5000000 | Number of samples to skip initially |
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+-----------------+------+-----------------+-----------+---------------+---------------------------------------------------------------+
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| SR_MIN_PLATEAU | 6 | sync_short.v | 32 | 100 | Minimum number of plateau samples to declare a short preamble |
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+-----------------+------+-----------------+-----------+---------------+---------------------------------------------------------------+
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