heads/patches/coreboot-4.7/0015-purism-librem_skl-Fix-Librem-15-v3-devicetree-config.patch
Youness Alaoui 8bf187b50a
Add patches to coreboot to support Librem 13 v2 with TPM
Add a new series of patches which add measurement support for skylake,
add IOMMU for skylake, fix TPM support, and add support for TPM for
the Librem 13v2 and Librem 15v3 hardware.
2018-03-14 16:27:25 -04:00

40 lines
1.6 KiB
Diff

From bdaef1d8aa7cdfb27122665f951932e6e53d6a3d Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 2 Mar 2018 17:03:11 -0500
Subject: [PATCH 15/15] purism/librem_skl: Fix Librem 15 v3 devicetree
configuration
Recent changes to devicetree for librem_skl were only applied
to the librem13v2 variant (Enable SpeedStep, VMX, TCC at 95C),
this fixes it by applying the same fixes for the Librem 15 v3.
Change-Id: I1d5c3ba844c942bd94311f4639612228ff8e07f8
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
.../purism/librem_skl/variants/librem15v3/devicetree.cb | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index 6cf183a61f..035db18eff 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -7,6 +7,15 @@ chip soc/intel/skylake
register "deep_s5_enable_dc" = "0"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
+ register "eist_enable" = "1"
+ register "VmxEnable" = "1"
+
+ # Set the Thermal Control Circuit (TCC) activaction value to 95C
+ # even though FSP integration guide says to set it to 100C for SKL-U
+ # (offset at 0), because when the TCC activates at 100C, the CPU
+ # will have already shut itself down from overheating protection.
+ register "tcc_offset" = "5" # TCC of 95C
+
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
--
2.14.3