mirror of
https://github.com/linuxboot/heads.git
synced 2024-12-20 21:43:11 +00:00
65abba9946
* remove all previous coreboot patches (as they are already included) * to be investigated: linux trampoline patch * add new patch to hardcode sleep configuration * activate smmstore as dasharo vendor code requires it Signed-off-by: Markus Meissner <coder@safemailbox.de>
808 lines
24 KiB
Makefile
808 lines
24 KiB
Makefile
#
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# Automatically generated file; DO NOT EDIT.
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# coreboot configuration
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#
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#
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# General setup
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#
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CONFIG_COREBOOT_BUILD=y
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CONFIG_LOCALVERSION=""
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CONFIG_CBFS_PREFIX="fallback"
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CONFIG_COMPILER_GCC=y
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# CONFIG_COMPILER_LLVM_CLANG is not set
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CONFIG_ARCH_SUPPORTS_CLANG=y
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# CONFIG_ANY_TOOLCHAIN is not set
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# CONFIG_CCACHE is not set
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# CONFIG_FMD_GENPARSER is not set
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# CONFIG_UTIL_GENPARSER is not set
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# CONFIG_OPTION_BACKEND_NONE is not set
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CONFIG_USE_OPTION_TABLE=y
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# CONFIG_STATIC_OPTION_TABLE is not set
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CONFIG_COMPRESS_RAMSTAGE=y
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CONFIG_INCLUDE_CONFIG_FILE=y
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CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
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CONFIG_USE_BLOBS=y
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# CONFIG_USE_AMD_BLOBS is not set
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# CONFIG_USE_QC_BLOBS is not set
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# CONFIG_COVERAGE is not set
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# CONFIG_UBSAN is not set
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CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
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# CONFIG_ASAN is not set
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# CONFIG_NO_STAGE_CACHE is not set
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CONFIG_TSEG_STAGE_CACHE=y
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# CONFIG_UPDATE_IMAGE is not set
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CONFIG_BOOTSPLASH_IMAGE=y
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CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg"
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CONFIG_BOOTSPLASH_CONVERT=y
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CONFIG_BOOTSPLASH_CONVERT_QUALITY=90
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CONFIG_BOOTSPLASH_CONVERT_RESIZE=y
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CONFIG_BOOTSPLASH_CONVERT_RESOLUTION="1920x1080"
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# CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set
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# CONFIG_FW_CONFIG is not set
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# end of General setup
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#
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# Mainboard
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#
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#
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# Important: Run 'make distclean' before switching boards
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#
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# CONFIG_VENDOR_51NB is not set
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# CONFIG_VENDOR_ACER is not set
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# CONFIG_VENDOR_ADLINK is not set
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# CONFIG_VENDOR_AMD is not set
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# CONFIG_VENDOR_AOPEN is not set
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# CONFIG_VENDOR_APPLE is not set
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# CONFIG_VENDOR_ASROCK is not set
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# CONFIG_VENDOR_ASUS is not set
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# CONFIG_VENDOR_BAP is not set
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# CONFIG_VENDOR_BIOSTAR is not set
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# CONFIG_VENDOR_BOSTENTECH is not set
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# CONFIG_VENDOR_CAVIUM is not set
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# CONFIG_VENDOR_CLEVO is not set
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# CONFIG_VENDOR_COMPULAB is not set
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# CONFIG_VENDOR_DELL is not set
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# CONFIG_VENDOR_ELMEX is not set
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# CONFIG_VENDOR_EMULATION is not set
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# CONFIG_VENDOR_EXAMPLE is not set
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# CONFIG_VENDOR_FACEBOOK is not set
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# CONFIG_VENDOR_FOXCONN is not set
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# CONFIG_VENDOR_GETAC is not set
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# CONFIG_VENDOR_GIGABYTE is not set
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# CONFIG_VENDOR_GIZMOSPHERE is not set
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# CONFIG_VENDOR_GOOGLE is not set
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# CONFIG_VENDOR_HP is not set
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# CONFIG_VENDOR_IBASE is not set
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# CONFIG_VENDOR_INTEL is not set
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# CONFIG_VENDOR_JETWAY is not set
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# CONFIG_VENDOR_KONTRON is not set
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# CONFIG_VENDOR_LENOVO is not set
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# CONFIG_VENDOR_LIBRETREND is not set
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# CONFIG_VENDOR_LIPPERT is not set
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# CONFIG_VENDOR_MSI is not set
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CONFIG_VENDOR_NOVACUSTOM=y
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# CONFIG_VENDOR_OCP is not set
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# CONFIG_VENDOR_OPENCELLULAR is not set
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# CONFIG_VENDOR_PACKARDBELL is not set
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# CONFIG_VENDOR_PCENGINES is not set
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# CONFIG_VENDOR_PINE64 is not set
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# CONFIG_VENDOR_PORTWELL is not set
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# CONFIG_VENDOR_PRODRIVE is not set
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# CONFIG_VENDOR_PROTECTLI is not set
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# CONFIG_VENDOR_PURISM is not set
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# CONFIG_VENDOR_RAZER is not set
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# CONFIG_VENDOR_RODA is not set
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# CONFIG_VENDOR_SAMSUNG is not set
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# CONFIG_VENDOR_SAPPHIRE is not set
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# CONFIG_VENDOR_SCALEWAY is not set
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# CONFIG_VENDOR_SIEMENS is not set
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# CONFIG_VENDOR_SIFIVE is not set
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# CONFIG_VENDOR_STARLABS is not set
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# CONFIG_VENDOR_SUPERMICRO is not set
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# CONFIG_VENDOR_SYSTEM76 is not set
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# CONFIG_VENDOR_TI is not set
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# CONFIG_VENDOR_UP is not set
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CONFIG_MAINBOARD_FAMILY="Not Applicable"
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CONFIG_MAINBOARD_PART_NUMBER="nv40pz"
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CONFIG_MAINBOARD_VERSION="v2.1"
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CONFIG_MAINBOARD_DIR="clevo/adl-p"
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CONFIG_DIMM_MAX=4
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CONFIG_DIMM_SPD_SIZE=512
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CONFIG_FMDFILE=""
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# CONFIG_NO_POST is not set
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CONFIG_MAINBOARD_VENDOR="Notebook"
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CONFIG_CBFS_SIZE=0x1000000
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# CONFIG_CONSOLE_SERIAL is not set
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CONFIG_MAX_CPUS=24
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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# CONFIG_POST_DEVICE is not set
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# CONFIG_POST_IO is not set
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CONFIG_UART_FOR_CONSOLE=0
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# CONFIG_VBOOT is not set
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CONFIG_VBOOT_VBNV_OFFSET=0x56
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CONFIG_VARIANT_DIR="nv40pz"
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CONFIG_DEVICETREE="devicetree.cb"
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# CONFIG_VGA_BIOS is not set
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CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Nitrokey"
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CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
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# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
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CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000
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CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
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CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
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CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
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CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
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CONFIG_BOARD_CLEVO_ADLP_COMMON=y
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CONFIG_BOARD_CLEVO_NV40PZ_BASE=y
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CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nitropad NV41"
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CONFIG_CONSOLE_POST=y
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# CONFIG_USE_PM_ACPI_TIMER is not set
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CONFIG_TPM_PIRQ=0x0
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# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
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CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
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CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
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CONFIG_DCACHE_RAM_BASE=0xfef00000
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CONFIG_DCACHE_RAM_SIZE=0xc0000
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CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
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CONFIG_DCACHE_BSP_STACK_SIZE=0x80400
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CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
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CONFIG_ECAM_MMCONF_BUS_NUMBER=256
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CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
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CONFIG_HAVE_INTEL_FIRMWARE=y
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CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
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CONFIG_DRIVERS_INTEL_WIFI=y
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CONFIG_IFD_BIN_PATH="../nitrokey-blobs/nitropad-nv41/flashdescriptor-HAP.bin"
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CONFIG_ME_BIN_PATH="../nitrokey-blobs/nitropad-nv41/me.bin"
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
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# CONFIG_USE_LEGACY_8254_TIMER is not set
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CONFIG_HAVE_IFD_BIN=y
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CONFIG_PCIEXP_HOTPLUG_BUSES=42
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CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000
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CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000
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CONFIG_PS2K_EISAID="PNP0303"
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CONFIG_PS2M_EISAID="PNP0F13"
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#
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# Alder Lake P (2022)
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#
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# CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP is not set
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CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP=y
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#
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# Tiger Lake U (2021)
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#
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# CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set
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# CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set
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CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_PCIEXP_CLK_PM=y
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# CONFIG_DRIVERS_UART_8250IO is not set
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CONFIG_HEAP_SIZE=0x10000
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CONFIG_EC_GPE_SCI=0x50
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CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2"
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CONFIG_BOARD_ROMSIZE_KB_32768=y
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# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
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CONFIG_COREBOOT_ROMSIZE_KB_32768=y
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# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
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CONFIG_COREBOOT_ROMSIZE_KB=32768
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CONFIG_ROM_SIZE=0x02000000
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CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
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CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
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# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
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CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
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# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
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CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
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# end of Mainboard
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CONFIG_SYSTEM_TYPE_LAPTOP=y
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#
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# Chipset
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#
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#
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# SoC
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#
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CONFIG_ARCH_ALL_STAGES_X86=y
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CONFIG_CHIPSET_DEVICETREE="soc/intel/alderlake/chipset.cb"
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CONFIG_CBFS_MCACHE_SIZE=0x4000
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CONFIG_ROMSTAGE_ADDR=0x2000000
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CONFIG_FSP_TEMP_RAM_SIZE=0x20000
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CONFIG_VERSTAGE_ADDR=0x2000000
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CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe03e000
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CONFIG_SMM_TSEG_SIZE=0x800000
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CONFIG_SMM_RESERVED_SIZE=0x200000
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CONFIG_SMM_MODULE_STACK_SIZE=0x800
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CONFIG_ACPI_BERT=y
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CONFIG_ACPI_BERT_SIZE=0x10000
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CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
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CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
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CONFIG_CPU_SPECIFIC_OPTIONS=y
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CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
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CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
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CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
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CONFIG_STACK_SIZE=0x2000
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CONFIG_SOC_INTEL_ALDERLAKE=y
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CONFIG_SOC_INTEL_ALDERLAKE_PCH_P=y
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CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT=y
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CONFIG_ALDERLAKE_CAR_ENHANCED_NEM=y
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CONFIG_EXT_BIOS_WIN_BASE=0xf8000000
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CONFIG_EXT_BIOS_WIN_SIZE=0x2000000
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CONFIG_IFD_CHIPSET="adl"
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CONFIG_IED_REGION_SIZE=0x400000
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CONFIG_MAX_PCH_ROOT_PORTS=12
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CONFIG_MAX_CPU_ROOT_PORTS=3
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CONFIG_MAX_TBT_ROOT_PORTS=4
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CONFIG_MAX_ROOT_PORTS=12
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CONFIG_MAX_PCIE_CLOCK_SRC=10
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CONFIG_MAX_PCIE_CLOCK_REQ=10
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CONFIG_PCR_BASE_ADDRESS=0xfd000000
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CONFIG_CPU_BCLK_MHZ=100
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CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
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CONFIG_CPU_XTAL_HZ=38400000
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CONFIG_SOC_INTEL_UFS_CLK_FREQ_HZ=19200000
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CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=7
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CONFIG_SOC_INTEL_I2C_DEV_MAX=8
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CONFIG_SOC_INTEL_UART_DEV_MAX=7
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CONFIG_VBT_DATA_SIZE_KB=9
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CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
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CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
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CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/"
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CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd"
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CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0
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CONFIG_DATA_BUS_WIDTH=128
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CONFIG_DIMMS_PER_CHANNEL=2
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CONFIG_MRC_CHANNEL_WIDTH=16
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CONFIG_ACPI_ADL_IPU_ES_SUPPORT=y
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CONFIG_USE_FSP_MP_INIT=y
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# CONFIG_USE_COREBOOT_MP_INIT is not set
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CONFIG_SI_DESC_REGION="SI_DESC"
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CONFIG_SI_DESC_REGION_SZ=4096
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# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
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CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258
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CONFIG_INTEL_GMA_BCLV_WIDTH=32
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CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254
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CONFIG_INTEL_GMA_BCLM_WIDTH=32
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CONFIG_MAX_HECI_DEVICES=6
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CONFIG_BOOTBLOCK_IN_CBFS=y
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CONFIG_PCIEXP_ASPM=y
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CONFIG_PCIEXP_COMMON_CLOCK=y
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CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
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CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
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CONFIG_UART_PCI_ADDR=0x0
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CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
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CONFIG_CBFS_CACHE_ALIGN=8
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CONFIG_SOC_INTEL_COMMON=y
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#
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# Intel SoC Common Code for IP blocks
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#
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CONFIG_SOC_INTEL_COMMON_BLOCK=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
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CONFIG_INTEL_CAR_NEM_ENHANCED=y
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CONFIG_CAR_HAS_SF_MASKS=y
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CONFIG_COS_MAPPED_TO_MSB=y
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CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y
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CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y
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CONFIG_CPU_SUPPORTS_INTEL_TME=y
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CONFIG_INTEL_TME=y
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CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
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CONFIG_HAVE_HYPERTHREADING=y
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CONFIG_FSP_HYPERTHREADING=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y
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CONFIG_SOC_INTEL_CSE_HAVE_HAP=y
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CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
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CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
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CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
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CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
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CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
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CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
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CONFIG_SOC_INTEL_CSE_RW_FILE=""
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CONFIG_SOC_INTEL_CSE_RW_VERSION=""
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CONFIG_SOC_INTEL_CSE_SET_EOP=y
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CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
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CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
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CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
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CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
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CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
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CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
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CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
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# CONFIG_SOC_INTEL_DISABLE_IGD is not set
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CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
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CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y
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CONFIG_PMC_IPC_ACPI_INTERFACE=y
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CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
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CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
|
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
|
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
|
|
# CONFIG_ENABLE_TCSS_DISPLAY_DETECTION is not set
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
|
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
|
|
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
|
|
|
#
|
|
# Intel SoC Common PCH Code
|
|
#
|
|
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
|
|
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
|
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
|
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
|
|
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
|
|
|
|
#
|
|
# Intel SoC Common coreboot stages and non-IP blocks
|
|
#
|
|
CONFIG_SOC_INTEL_COMMON_BASECODE=y
|
|
CONFIG_SOC_INTEL_COMMON_RESET=y
|
|
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
|
CONFIG_PAVP=y
|
|
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
|
CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y
|
|
# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set
|
|
CONFIG_SOC_INTEL_CRASHLOG=y
|
|
|
|
#
|
|
# CPU
|
|
#
|
|
CONFIG_SSE2=y
|
|
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
|
CONFIG_CPU_INTEL_COMMON=y
|
|
CONFIG_ENABLE_VMX=y
|
|
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
|
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
|
CONFIG_CPU_INTEL_COMMON_SMM=y
|
|
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
|
CONFIG_PARALLEL_MP=y
|
|
CONFIG_PARALLEL_MP_AP_WORK=y
|
|
CONFIG_XAPIC_ONLY=y
|
|
# CONFIG_X2APIC_ONLY is not set
|
|
# CONFIG_X2APIC_RUNTIME is not set
|
|
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
|
CONFIG_UDELAY_TSC=y
|
|
CONFIG_TSC_MONOTONIC_TIMER=y
|
|
CONFIG_LOGICAL_CPUS=y
|
|
CONFIG_HAVE_SMI_HANDLER=y
|
|
CONFIG_SMM_TSEG=y
|
|
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
|
CONFIG_CPU_INFO_V2=y
|
|
CONFIG_SMP=y
|
|
CONFIG_SSE=y
|
|
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
|
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
|
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
|
|
|
#
|
|
# Northbridge
|
|
#
|
|
|
|
#
|
|
# Southbridge
|
|
#
|
|
CONFIG_PCIEXP_HOTPLUG=y
|
|
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
|
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
|
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
|
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
|
CONFIG_RCBA_LENGTH=0x4000
|
|
|
|
#
|
|
# Super I/O
|
|
#
|
|
|
|
#
|
|
# Embedded Controllers
|
|
#
|
|
CONFIG_EC_SYSTEM76_EC=y
|
|
CONFIG_EC_SYSTEM76_EC_DGPU=y
|
|
CONFIG_EC_SYSTEM76_EC_ACPI_DEVICE_HID="17761776"
|
|
|
|
#
|
|
# Intel Firmware
|
|
#
|
|
CONFIG_HAVE_ME_BIN=y
|
|
# CONFIG_STITCH_ME_BIN is not set
|
|
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
|
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
|
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
|
CONFIG_UNLOCK_FLASH_REGIONS=y
|
|
CONFIG_UDK_BASE=y
|
|
CONFIG_UDK_202005_BINDING=y
|
|
CONFIG_UDK_2013_VERSION=2013
|
|
CONFIG_UDK_2017_VERSION=2017
|
|
CONFIG_UDK_202005_VERSION=202005
|
|
CONFIG_UDK_202111_VERSION=202111
|
|
CONFIG_UDK_VERSION=202005
|
|
CONFIG_ARCH_X86=y
|
|
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
|
CONFIG_ARCH_VERSTAGE_X86_32=y
|
|
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
|
CONFIG_ARCH_POSTCAR_X86_32=y
|
|
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
|
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
|
CONFIG_X86_CUSTOM_BOOTMEDIA=y
|
|
CONFIG_NUM_IPI_STARTS=2
|
|
CONFIG_PC80_SYSTEM=y
|
|
CONFIG_HAVE_CMOS_DEFAULT=y
|
|
CONFIG_POSTCAR_STAGE=y
|
|
CONFIG_BOOTBLOCK_SIMPLE=y
|
|
# CONFIG_BOOTBLOCK_NORMAL is not set
|
|
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
|
CONFIG_IDT_IN_EVERY_STAGE=y
|
|
CONFIG_HAVE_CF9_RESET=y
|
|
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
|
CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
|
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
|
|
# end of Chipset
|
|
|
|
#
|
|
# Devices
|
|
#
|
|
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
|
CONFIG_HAVE_FSP_GOP=y
|
|
# CONFIG_VGA_ROM_RUN is not set
|
|
CONFIG_RUN_FSP_GOP=y
|
|
# CONFIG_NO_GFX_INIT is not set
|
|
|
|
#
|
|
# Display
|
|
#
|
|
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
|
CONFIG_LINEAR_FRAMEBUFFER=y
|
|
CONFIG_BOOTSPLASH=y
|
|
# end of Display
|
|
|
|
CONFIG_PCI=y
|
|
CONFIG_ECAM_MMCONF_SUPPORT=y
|
|
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
|
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
|
CONFIG_AZALIA_PLUGIN_SUPPORT=y
|
|
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
|
|
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
|
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
|
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
|
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
|
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
|
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
|
|
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
|
# CONFIG_EARLY_PCI_BRIDGE is not set
|
|
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
|
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
|
CONFIG_INTEL_GMA_HAVE_VBT=y
|
|
CONFIG_INTEL_GMA_ADD_VBT=y
|
|
# CONFIG_SOFTWARE_I2C is not set
|
|
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
|
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
|
# end of Devices
|
|
|
|
#
|
|
# Generic Drivers
|
|
#
|
|
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
|
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
|
# CONFIG_ELOG is not set
|
|
CONFIG_CACHE_MRC_SETTINGS=y
|
|
CONFIG_MRC_SETTINGS_PROTECT=y
|
|
CONFIG_SMMSTORE=y
|
|
CONFIG_SPI_FLASH=y
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
|
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
|
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
|
CONFIG_TPM_INIT_RAMSTAGE=y
|
|
# CONFIG_TPM_PPI is not set
|
|
CONFIG_DRIVERS_UART=y
|
|
CONFIG_NO_UART_ON_SUPERIO=y
|
|
CONFIG_DRIVERS_UART_8250MEM=y
|
|
CONFIG_DRIVERS_UART_8250MEM_32=y
|
|
# CONFIG_VPD is not set
|
|
CONFIG_DRIVERS_GENERIC_BAYHUB_LV2=y
|
|
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
|
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
|
CONFIG_DRIVERS_I2C_GENERIC=y
|
|
CONFIG_DRIVERS_I2C_HID=y
|
|
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
|
CONFIG_FSP_USE_REPO=y
|
|
# CONFIG_DISPLAY_HOBS is not set
|
|
# CONFIG_DISPLAY_UPD_DATA is not set
|
|
CONFIG_PLATFORM_USES_FSP2_0=y
|
|
CONFIG_PLATFORM_USES_FSP2_1=y
|
|
CONFIG_PLATFORM_USES_FSP2_2=y
|
|
CONFIG_PLATFORM_USES_FSP2_3=y
|
|
CONFIG_PLATFORM_USES_FSP2_X86_32=y
|
|
CONFIG_HAVE_INTEL_FSP_REPO=y
|
|
CONFIG_ADD_FSP_BINARIES=y
|
|
CONFIG_FSP_T_LOCATION=0xfffe0000
|
|
CONFIG_FSP_S_CBFS="fsps.bin"
|
|
CONFIG_FSP_M_CBFS="fspm.bin"
|
|
CONFIG_FSP_FULL_FD=y
|
|
CONFIG_FSP_T_RESERVED_SIZE=0x0
|
|
CONFIG_FSP_M_XIP=y
|
|
CONFIG_FSP_USES_CB_STACK=y
|
|
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
|
|
CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
|
|
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
|
|
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
|
|
CONFIG_FSPS_HAS_ARCH_UPD=y
|
|
CONFIG_FSPS_USE_MULTI_PHASE_INIT=y
|
|
CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
|
|
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
|
|
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
|
|
CONFIG_INTEL_GMA_ACPI=y
|
|
CONFIG_INTEL_GMA_OPREGION_2_1=y
|
|
CONFIG_DRIVERS_INTEL_PMC=y
|
|
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
|
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
|
CONFIG_DRIVERS_MC146818=y
|
|
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
|
|
CONFIG_MEMORY_MAPPED_TPM=y
|
|
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
|
# CONFIG_DRIVERS_SIL_3114 is not set
|
|
CONFIG_DRIVERS_USB_ACPI=y
|
|
CONFIG_DRIVERS_WIFI_GENERIC=y
|
|
CONFIG_MP_SERVICES_PPI=y
|
|
CONFIG_MP_SERVICES_PPI_V2=y
|
|
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
|
|
# end of Generic Drivers
|
|
|
|
#
|
|
# Security
|
|
#
|
|
|
|
#
|
|
# CBFS verification
|
|
#
|
|
# CONFIG_CBFS_VERIFICATION is not set
|
|
# end of CBFS verification
|
|
|
|
#
|
|
# Verified Boot (vboot)
|
|
#
|
|
CONFIG_VBOOT_LIB=y
|
|
# end of Verified Boot (vboot)
|
|
|
|
#
|
|
# Trusted Platform Module
|
|
#
|
|
# CONFIG_NO_TPM is not set
|
|
CONFIG_TPM2=y
|
|
CONFIG_TPM=y
|
|
CONFIG_MAINBOARD_HAS_TPM2=y
|
|
# CONFIG_DEBUG_TPM is not set
|
|
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
|
CONFIG_TPM_MEASURED_BOOT=y
|
|
CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
|
|
# end of Trusted Platform Module
|
|
|
|
#
|
|
# Memory initialization
|
|
#
|
|
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
|
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
|
# end of Memory initialization
|
|
|
|
# CONFIG_INTEL_TXT is not set
|
|
# CONFIG_STM is not set
|
|
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
|
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
|
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
|
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
|
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
|
# end of Security
|
|
|
|
CONFIG_ACPI_HAVE_PCAT_8259=y
|
|
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
|
CONFIG_ACPI_SOC_NVS=y
|
|
CONFIG_HAVE_ACPI_TABLES=y
|
|
CONFIG_ACPI_LPIT=y
|
|
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
|
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
|
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
|
CONFIG_RTC=y
|
|
|
|
#
|
|
# Console
|
|
#
|
|
CONFIG_BOOTBLOCK_CONSOLE=y
|
|
CONFIG_POSTCAR_CONSOLE=y
|
|
CONFIG_SQUELCH_EARLY_SMP=y
|
|
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
|
# CONFIG_SPKMODEM is not set
|
|
# CONFIG_CONSOLE_NE2K is not set
|
|
CONFIG_CONSOLE_CBMEM=y
|
|
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
|
# CONFIG_CONSOLE_SPI_FLASH is not set
|
|
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
|
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
|
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
|
# CONFIG_CMOS_POST is not set
|
|
CONFIG_HWBASE_DEBUG_CB=y
|
|
# end of Console
|
|
|
|
CONFIG_HAVE_ACPI_RESUME=y
|
|
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
|
CONFIG_HAVE_MONOTONIC_TIMER=y
|
|
CONFIG_HAVE_OPTION_TABLE=y
|
|
CONFIG_IOAPIC=y
|
|
|
|
#
|
|
# System tables
|
|
#
|
|
CONFIG_GENERATE_SMBIOS_TABLES=y
|
|
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
|
# end of System tables
|
|
|
|
#
|
|
# Payload
|
|
#
|
|
# CONFIG_PAYLOAD_NONE is not set
|
|
# CONFIG_PAYLOAD_ELF is not set
|
|
# CONFIG_PAYLOAD_BOOTBOOT is not set
|
|
# CONFIG_PAYLOAD_FILO is not set
|
|
# CONFIG_PAYLOAD_GRUB2 is not set
|
|
# CONFIG_PAYLOAD_SEAGRUB is not set
|
|
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
|
# CONFIG_PAYLOAD_SEABIOS is not set
|
|
# CONFIG_PAYLOAD_UBOOT is not set
|
|
# CONFIG_PAYLOAD_YABITS is not set
|
|
# CONFIG_PAYLOAD_EDK2 is not set
|
|
CONFIG_PAYLOAD_LINUX=y
|
|
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
|
|
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
|
|
CONFIG_PAYLOAD_OPTIONS=""
|
|
# CONFIG_PXE is not set
|
|
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
|
|
|
#
|
|
# Secondary Payloads
|
|
#
|
|
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
|
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
|
|
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
|
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
|
# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
|
|
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
|
# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
|
|
# end of Secondary Payloads
|
|
# end of Payload
|
|
|
|
#
|
|
# Debugging
|
|
#
|
|
|
|
#
|
|
# CPU Debug Settings
|
|
#
|
|
# CONFIG_DISPLAY_MTRRS is not set
|
|
|
|
#
|
|
# BLOB Debug Settings
|
|
#
|
|
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
|
# CONFIG_DISPLAY_FSP_HEADER is not set
|
|
# CONFIG_VERIFY_HOBS is not set
|
|
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
|
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
|
|
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
|
|
|
|
#
|
|
# General Debug Settings
|
|
#
|
|
# CONFIG_GDB_STUB is not set
|
|
# CONFIG_FATAL_ASSERTS is not set
|
|
CONFIG_HAVE_DEBUG_GPIO=y
|
|
# CONFIG_DEBUG_GPIO is not set
|
|
# CONFIG_DEBUG_CBFS is not set
|
|
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
|
# CONFIG_DEBUG_RAM_SETUP is not set
|
|
CONFIG_HAVE_DEBUG_SMBUS=y
|
|
# CONFIG_DEBUG_SMBUS is not set
|
|
# CONFIG_DEBUG_SMI is not set
|
|
# CONFIG_DEBUG_MALLOC is not set
|
|
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
|
# CONFIG_DEBUG_SPI_FLASH is not set
|
|
# CONFIG_DEBUG_BOOT_STATE is not set
|
|
# CONFIG_DEBUG_ADA_CODE is not set
|
|
CONFIG_HAVE_EM100_SUPPORT=y
|
|
# CONFIG_EM100 is not set
|
|
# end of Debugging
|
|
|
|
CONFIG_SPD_READ_BY_WORD=y
|
|
CONFIG_WARNINGS_ARE_ERRORS=y
|
|
CONFIG_MAX_REBOOT_CNT=3
|
|
CONFIG_RELOCATABLE_MODULES=y
|
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CONFIG_GENERIC_GPIO_LIB=y
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CONFIG_HAVE_BOOTBLOCK=y
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CONFIG_HAVE_ROMSTAGE=y
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CONFIG_HAVE_RAMSTAGE=y
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