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411ecc50f4
Add patches to coreboot 4.15 to: - show ME status even when device is disable - fix PCIe RP hotplug on Librem 14 - fix ME reset timeout on Librem 13/15 This synchronizes with Purism's coreboot 4.15-Purism-3 tag. Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
35 lines
1.5 KiB
Diff
35 lines
1.5 KiB
Diff
From 7e8b5f1b32f2d7b12ed3df191d3f4b1f1254489c Mon Sep 17 00:00:00 2001
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From: Matt DeVillier <matt.devillier@puri.sm>
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Date: Tue, 25 Jan 2022 19:52:44 -0600
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Subject: [PATCH 9/9] mb/purism/librem_skl: disable HECI PCI device
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As all librem_skl devices ship with the ME disabled via HAP bit and ME
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firmware "neutralized" via me_cleaner, the HECI1 PCI device should be
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marked off/disabled to ensure that heci_reset() is not called at the end
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of heci_init(), as this causes a 15s timeout delay when booting
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(introduced in commit cb2fd20 [soc/intel/common: Add HECI Reset flow in
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the CSE driver]).
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Change-Id: Ib6bfcfd97e32bb9cf5be33535d77eea8227a8f9f
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Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
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---
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src/mainboard/purism/librem_skl/devicetree.cb | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/src/mainboard/purism/librem_skl/devicetree.cb b/src/mainboard/purism/librem_skl/devicetree.cb
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index 5efb1e2aed..68fa343b3c 100644
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--- a/src/mainboard/purism/librem_skl/devicetree.cb
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+++ b/src/mainboard/purism/librem_skl/devicetree.cb
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@@ -162,7 +162,7 @@ chip soc/intel/skylake
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device pci 14.1 on end # USB xDCI (OTG)
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device pci 14.2 on end # Thermal Subsystem
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device pci 14.3 off end # Camera
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- device pci 16.0 on end # Management Engine Interface 1
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+ device pci 16.0 off end # Management Engine Interface 1
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device pci 16.1 off end # Management Engine Interface 2
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device pci 16.2 off end # Management Engine IDE-R
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device pci 16.3 off end # Management Engine KT Redirection
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--
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2.30.2
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