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76 lines
2.3 KiB
Diff
76 lines
2.3 KiB
Diff
From 1b2c65e94e6bcd3b36f799c880162fb3b3394ed4 Mon Sep 17 00:00:00 2001
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From: Timothy Pearson <tpearson@raptorengineering.com>
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Date: Sat, 7 Dec 2019 16:32:55 -0600
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Subject: [PATCH 3/3] amdgpu: Wrap FPU dependent functions in dc20
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dc20 containes several FPU-dependent functions without proper FPU
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kernel mode enable/disable wrappers. Add the required wrappers
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for both x86 and POWER.
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This enables Navi DC20 support for POWER systems.
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Signed-off-by: Timothy Pearson <tpearson@raptorengineering.com>
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---
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.../gpu/drm/amd/display/dc/dcn20/dcn20_resource.c | 14 ++++++++++++--
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1 file changed, 12 insertions(+), 2 deletions(-)
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diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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index 254973751732..95303b77bfd6 100644
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--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_resource.c
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@@ -2917,14 +2917,19 @@ static bool dcn20_validate_bandwidth_internal(struct dc *dc, struct dc_state *co
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bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
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bool fast_validate)
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{
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+ DC_FP_START()
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+
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bool voltage_supported = false;
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bool full_pstate_supported = false;
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bool dummy_pstate_supported = false;
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double p_state_latency_us = context->bw_ctx.dml.soc.dram_clock_change_latency_us;
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- if (fast_validate)
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- return dcn20_validate_bandwidth_internal(dc, context, true);
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+ if (fast_validate) {
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+ voltage_supported = dcn20_validate_bandwidth_internal(dc, context, true);
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+ DC_FP_END()
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+ return voltage_supported;
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+ }
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// Best case, we support full UCLK switch latency
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voltage_supported = dcn20_validate_bandwidth_internal(dc, context, false);
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@@ -2953,6 +2958,7 @@ bool dcn20_validate_bandwidth(struct dc *dc, struct dc_state *context,
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restore_dml_state:
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context->bw_ctx.dml.soc.dram_clock_change_latency_us = p_state_latency_us;
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+ DC_FP_END()
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return voltage_supported;
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}
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@@ -3472,6 +3478,8 @@ static bool construct(
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enum dml_project dml_project_version =
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get_dml_project_version(ctx->asic_id.hw_internal_rev);
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+ DC_FP_START()
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+
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ctx->dc_bios->regs = &bios_regs;
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pool->base.funcs = &dcn20_res_pool_funcs;
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@@ -3760,10 +3768,12 @@ static bool construct(
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dc->cap_funcs = cap_funcs;
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+ DC_FP_END()
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return true;
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create_fail:
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+ DC_FP_END()
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destruct(pool);
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return false;
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--
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2.20.1
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