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8589370708
Reduce the size of flashrom by commenting out most flash chips, boards and programmers. Wrapper script to make it easier to rewrite the ROM on the x230 using the flashrom layout. Keep the entire 12 MB ROM for flashing.
199 lines
9.3 KiB
Diff
199 lines
9.3 KiB
Diff
diff -u --recursive ../clean/flashrom-0.9.9/board_enable.c flashrom-0.9.9/board_enable.c
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--- ../clean/flashrom-0.9.9/board_enable.c 2016-03-13 11:16:30.000000000 -0400
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+++ flashrom-0.9.9/board_enable.c 2017-03-30 16:50:21.727748288 -0400
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@@ -2305,6 +2305,7 @@
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/* first pci-id set [4], second pci-id set [4], dmi identifier, coreboot id [2], phase, vendor name, board name max_rom_... OK? flash enable */
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#if defined(__i386__) || defined(__x86_64__)
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+#if 0
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{0x10DE, 0x0547, 0x147B, 0x1C2F, 0x10DE, 0x0548, 0x147B, 0x1C2F, NULL, NULL, NULL, P3, "abit", "AN-M2", 0, NT, nvidia_mcp_gpio2_raise},
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{0x1106, 0x0282, 0x147B, 0x1415, 0x1106, 0x3227, 0x147B, 0x1415, "^AV8 ", NULL, NULL, P3, "abit", "AV8", 0, OK, board_abit_av8},
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{0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, NULL /* "^I440BX-W977$" */, "abit", "bf6", P3, "abit", "BF6", 0, OK, intel_piix4_gpo26_lower},
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@@ -2427,6 +2428,7 @@
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{0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^SE440BX-2$", NULL, NULL, P3, "Intel", "SE440BX-2", 0, NT, intel_piix4_gpo27_lower},
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{0x1022, 0x7468, 0, 0, 0x1022, 0x7460, 0, 0, NULL, "iwill", "dk8_htx", P3, "IWILL", "DK8-HTX", 0, OK, w83627hf_gpio24_raise_2e},
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{0x8086, 0x27A0, 0x8086, 0x27a0, 0x8086, 0x27b8, 0x8086, 0x27b8, NULL, "kontron", "986lcd-m", P3, "Kontron", "986LCD-M", 0, OK, board_kontron_986lcd_m},
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+#endif
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{0x8086, 0x2917, 0x17AA, 0x20F5, 0x8086, 0x2930, 0x17AA, 0x20F9, "^ThinkPad T400", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T400", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x1E22, 0x17AA, 0x21F6, 0x8086, 0x1E55, 0x17AA, 0x21F6, "^ThinkPad T530", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T530", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x27a0, 0x17aa, 0x2015, 0x8086, 0x27b9, 0x17aa, 0x2009, "^ThinkPad T60", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad T60", 0, OK, p2_whitelist_laptop},
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@@ -2435,6 +2437,7 @@
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{0x8086, 0x3B07, 0x17AA, 0x2166, 0x8086, 0x3B30, 0x17AA, 0x2167, "^Lenovo X201", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X201", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x1E22, 0x17AA, 0x21FA, 0x8086, 0x1E55, 0x17AA, 0x21FA, "^ThinkPad X230", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X230", 0, OK, p2_whitelist_laptop},
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{0x8086, 0x27A0, 0x17AA, 0x2017, 0x8086, 0x27B9, 0x17AA, 0x2009, "^ThinkPad X60", NULL, NULL, P2, "IBM/Lenovo", "ThinkPad X60(s)", 0, OK, p2_whitelist_laptop},
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+#if 0
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{0x8086, 0x2411, 0x8086, 0x2411, 0x8086, 0x7125, 0x0e11, 0xb165, NULL, NULL, NULL, P3, "Mitac", "6513WU", 0, OK, board_mitac_6513wu},
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{0x8086, 0x8186, 0x8086, 0x8186, 0x8086, 0x8800, 0, 0, "^MSC Vertriebs GmbH$", NULL, NULL, P2, "MSC", "Q7-TCTC", 0, OK, p2_not_a_laptop},
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{0x8086, 0x7190, 0, 0, 0x8086, 0x7110, 0, 0, "^MS-6163 (i440BX)$", NULL, NULL, P3, "MSI", "MS-6163 (MS-6163 Pro)", 0, OK, intel_piix4_gpo14_raise},
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@@ -2470,6 +2473,7 @@
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{0x1106, 0x3177, 0x1106, 0xAA01, 0x1106, 0x3123, 0x1106, 0xAA01, NULL, NULL, NULL, P3, "VIA", "EPIA M/MII/...", 0, OK, via_vt823x_gpio15_raise},
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{0x1106, 0x0259, 0x1106, 0x3227, 0x1106, 0x3065, 0x1106, 0x3149, NULL, NULL, NULL, P3, "VIA", "EPIA-N/NL", 0, OK, via_vt823x_gpio9_raise},
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#endif
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+#endif
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{ 0, 0, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, P3, NULL, NULL, 0, NT, NULL}, /* end marker */
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};
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diff -u --recursive ../clean/flashrom-0.9.9/chipset_enable.c flashrom-0.9.9/chipset_enable.c
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--- ../clean/flashrom-0.9.9/chipset_enable.c 2016-01-23 11:16:49.000000000 -0500
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+++ flashrom-0.9.9/chipset_enable.c 2017-03-30 16:46:10.496413767 -0400
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@@ -1482,6 +1482,7 @@
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/* Please keep this list numerically sorted by vendor/device ID. */
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const struct penable chipset_enables[] = {
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#if defined(__i386__) || defined(__x86_64__)
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+#if 0
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{0x1002, 0x4377, OK, "ATI", "SB400", enable_flash_sb400},
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{0x1002, 0x438d, OK, "AMD", "SB600", enable_flash_sb600},
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{0x1002, 0x439d, OK, "AMD", "SB7x0/SB8x0/SB9x0", enable_flash_sb600},
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@@ -1624,7 +1625,9 @@
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{0x8086, 0x1e49, DEP, "Intel", "B75", enable_flash_pch7},
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{0x8086, 0x1e4a, DEP, "Intel", "H77", enable_flash_pch7},
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{0x8086, 0x1e53, NT, "Intel", "C216", enable_flash_pch7},
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+#endif
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{0x8086, 0x1e55, DEP, "Intel", "QM77", enable_flash_pch7},
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+#if 0
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{0x8086, 0x1e56, NT, "Intel", "QS77", enable_flash_pch7},
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{0x8086, 0x1e57, DEP, "Intel", "HM77", enable_flash_pch7},
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{0x8086, 0x1e58, NT, "Intel", "UM77", enable_flash_pch7},
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@@ -1786,6 +1789,7 @@
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{0x8086, 0x9d48, BAD, "Intel", "Sunrise Point (Skylake-U Premium)", NULL},
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{0x8086, 0x9d46, BAD, "Intel", "Sunrise Point (Skylake-Y Premium)", NULL},
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#endif
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+#endif
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{0},
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};
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diff -u --recursive ../clean/flashrom-0.9.9/flashchips.c flashrom-0.9.9/flashchips.c
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--- ../clean/flashrom-0.9.9/flashchips.c 2016-03-13 11:16:30.000000000 -0400
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+++ flashrom-0.9.9/flashchips.c 2017-03-30 16:44:00.474681255 -0400
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@@ -33,7 +33,7 @@
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* alphabetically sorted. Within families keep them in order of density.
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*/
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const struct flashchip flashchips[] = {
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-
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+#if 0
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/*
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* .vendor = Vendor name
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* .name = Chip name
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@@ -15902,6 +15902,7 @@
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.feature_bits = 0,
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.block_erasers = {},
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},
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+#endif
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{
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.vendor = "Programmer",
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@@ -15925,6 +15926,7 @@
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.read = read_opaque,
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},
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+#if 0
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{
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.vendor = "AMIC",
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.name = "unknown AMIC SPI chip",
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@@ -16085,6 +16087,7 @@
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.probe = probe_spi_rems,
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.write = NULL,
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},
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+#endif
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{0}
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};
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diff -u --recursive ../clean/flashrom-0.9.9/flashrom.c flashrom-0.9.9/flashrom.c
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--- ../clean/flashrom-0.9.9/flashrom.c 2016-02-22 03:59:27.000000000 -0500
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+++ flashrom-0.9.9/flashrom.c 2017-03-30 16:06:35.121301300 -0400
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@@ -1983,7 +1983,7 @@
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uint8_t *newcontents;
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int ret = 0;
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unsigned long size = flash->chip->total_size * 1024;
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- int read_all_first = 1; /* FIXME: Make this configurable. */
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+ int read_all_first = 0; /* FIXME: Make this configurable. */
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if (chip_safety_check(flash, force, read_it, write_it, erase_it, verify_it)) {
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msg_cerr("Aborting.\n");
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diff -u --recursive ../clean/flashrom-0.9.9/layout.c flashrom-0.9.9/layout.c
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--- ../clean/flashrom-0.9.9/layout.c 2016-03-13 13:36:49.000000000 -0400
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+++ flashrom-0.9.9/layout.c 2017-03-30 16:28:31.853958644 -0400
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@@ -259,6 +259,7 @@
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static int copy_old_content(struct flashctx *flash, int oldcontents_valid, uint8_t *oldcontents, uint8_t *newcontents, unsigned int start, unsigned int size)
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{
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+#if 0
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if (!oldcontents_valid) {
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/* oldcontents is a zero-filled buffer. By reading the current data into oldcontents here, we
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* avoid a rewrite of identical regions even if an initial full chip read didn't happen. */
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@@ -269,6 +270,7 @@
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return 1;
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}
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}
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+#endif
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memcpy(newcontents + start, oldcontents + start, size);
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return 0;
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}
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diff -u --recursive ../clean/flashrom-0.9.9/print.c flashrom-0.9.9/print.c
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--- ../clean/flashrom-0.9.9/print.c 2016-03-13 11:16:30.000000000 -0400
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+++ flashrom-0.9.9/print.c 2017-03-30 15:40:11.681082983 -0400
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@@ -518,6 +518,7 @@
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/* Please keep this list alphabetically ordered by vendor/board. */
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const struct board_info boards_known[] = {
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+#if 0
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#if defined(__i386__) || defined(__x86_64__)
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B("A-Trend", "ATC-6220", OK, "http://www.motherboard.cz/mb/atrend/atc6220.htm", NULL),
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B("abit", "A-S78H", OK, NULL, NULL),
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@@ -1140,12 +1141,13 @@
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B("ZOTAC", "ZBOX AD02 (PLUS)", OK, NULL, NULL),
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B("ZOTAC", "ZBOX HD-ID11", OK, NULL, NULL),
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#endif
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-
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+#endif
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{0},
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};
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/* Please keep this list alphabetically ordered by vendor/board. */
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const struct board_info laptops_known[] = {
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+#if 0
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#if defined(__i386__) || defined(__x86_64__)
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B("Acer", "Aspire 1520", OK, "http://support.acer.com/us/en/acerpanam/notebook/0000/Acer/Aspire1520/Aspire1520nv.shtml", NULL),
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B("Acer", "Aspire One", BAD, NULL, "http://www.coreboot.org/pipermail/coreboot/2009-May/048041.html"),
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@@ -1174,6 +1176,7 @@
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//B("MSI", "GT60-2OD", OK, "http://www.msi.com/product/nb/GT60_2OD.html", NULL), requires layout patches
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B("Teclast", "X98 Air 3G", OK, NULL, NULL),
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#endif
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+#endif
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{0},
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};
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diff -u --recursive ../clean/flashrom-0.9.9/spi.c flashrom-0.9.9/spi.c
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--- ../clean/flashrom-0.9.9/spi.c 2014-07-19 18:03:29.000000000 -0400
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+++ flashrom-0.9.9/spi.c 2017-03-30 15:10:38.192254930 -0400
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@@ -100,6 +100,20 @@
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return spi_write_chunked(flash, buf, start, len, max_data);
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}
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+static int my_ffs(int x)
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+{
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+ int rc = 0;
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+ while(x)
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+ {
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+ if (x & 1)
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+ return rc;
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+ rc++;
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+ x >>= 1;
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+ }
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+
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+ return 0;
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+}
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+
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int spi_chip_read(struct flashctx *flash, uint8_t *buf, unsigned int start,
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unsigned int len)
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{
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@@ -119,7 +133,7 @@
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/* Check if alignment is native (at least the largest power of two which
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* is a factor of the mapped size of the chip).
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*/
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- if (ffs(flash->chip->total_size * 1024) > (ffs(addrbase) ? : 33)) {
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+ if (my_ffs(flash->chip->total_size * 1024) > (my_ffs(addrbase) ? : 33)) {
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msg_perr("Flash chip is not aligned natively in the allowed "
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"access window.\n");
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msg_perr("Read will probably return garbage.\n");
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