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ef6cbe551b
The added patches fix bugs in fam15h ram DQS timing and configure the motherboard to restart gracefully if raminit fails instead of booting into an unstable state and/or crashing. Signed-off-by: Thierry Laurion <insurgo@riseup.net>
69 lines
2.4 KiB
Diff
69 lines
2.4 KiB
Diff
From ce1c7a35fa11b46d0478e97c4a4001179ab9d1bf Mon Sep 17 00:00:00 2001
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From: Mike Rothfuss <6182328+mrothfuss@users.noreply.github.com>
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Date: Fri, 23 Aug 2024 19:59:09 -0600
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Subject: [PATCH 2/2] northbridge/amd: Added resets for ram training failures
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Instead of booting into an unstable state (and crashing), the board
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resets to re-attempt raminit.
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---
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src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c | 7 +++++--
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src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c | 7 +++++--
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2 files changed, 10 insertions(+), 4 deletions(-)
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diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c b/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
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index 1ee10608b9..9a53bd352d 100644
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--- a/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
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+++ b/src/northbridge/amd/amdmct/mct_ddr3/mcthwl.c
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@@ -18,6 +18,7 @@
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#include <stdint.h>
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#include <console/console.h>
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#include <string.h>
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+#include <southbridge/amd/common/reset.h>
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#include "mct_d.h"
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#include "mct_d_gcc.h"
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@@ -265,11 +266,13 @@ static void WriteLevelization_HW(struct MCTStatStruc *pMCTstat,
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pDCTstat->TargetFreq = final_target_freq;
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- if (global_phy_training_status)
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+ if (global_phy_training_status) {
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printk(BIOS_WARNING,
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"%s: Uncorrectable invalid value(s) detected in second phase of write levelling; "
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- "continuing but system may be unstable!\n",
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+ "Restarting system\n",
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__func__);
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+ soft_reset();
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+ }
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uint8_t dct;
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for (dct = 0; dct < 2; dct++) {
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diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
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index dbb989fe3d..c4cb53442d 100644
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--- a/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
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+++ b/src/northbridge/amd/amdmct/mct_ddr3/mctsrc.c
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@@ -26,6 +26,7 @@
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#include <string.h>
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#include <cpu/x86/msr.h>
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#include <cpu/amd/msr.h>
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+#include <southbridge/amd/common/reset.h>
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#include "mct_d.h"
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#include "mct_d_gcc.h"
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@@ -1698,8 +1699,10 @@ void dqsTrainMaxRdLatency_SW_Fam15(struct MCTStatStruc *pMCTstat,
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Set_NB32_index_wait_DCT(dev, Channel, index_reg, 0x00000050, 0x13131313);
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}
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dword = Get_NB32_DCT(dev, Channel, 0x268) & 0x3ffff;
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- if (dword)
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- printk(BIOS_ERR, "WARNING: MaxRdLatency training FAILED! Attempting to continue but your system may be unstable...\n");
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+ if (dword) {
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+ printk(BIOS_ERR, "WARNING: MaxRdLatency training FAILED! Restarting system\n");
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+ soft_reset();
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+ }
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/* 2.10.5.8.5.1.5 */
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nb_pstate = 0;
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--
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2.39.2
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