mirror of
https://github.com/linuxboot/heads.git
synced 2024-12-18 12:46:26 +00:00
31 lines
1.6 KiB
Makefile
31 lines
1.6 KiB
Makefile
# Many Lenovo boards have two SPI flash chips, an 8 MB that holds the IFD,
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# the ME image and part of the coreboot image, and a 4 MB one that
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# has the rest of the coreboot and the reset vector.
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#
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# As a consequence, this replaces the need of having to flash a legacy-flash ROM
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# and expands available CBFS region (11.5Mb available CBFS space)
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#
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# When flashing via an external programmer it is easiest to have
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# two separate files for these pieces.
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all: bottom top
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bottom: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
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$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE) FORCE
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@rm -f $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
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$(call do,DD 8MB,$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom,dd if=$< of=$@ bs=65536 count=128 skip=0 status=none)
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@sha256sum $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom | tee -a "$(HASHES)"
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@stat -c "%8s:%n" $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom | tee -a "$(SIZES)"
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top: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
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$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE) FORCE
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@rm -f $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
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$(call do,DD 4MB,$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom,dd if=$< of=$@ bs=65536 count=64 skip=128 status=none)
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@sha256sum $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom | tee -a "$(HASHES)"
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@stat -c "%8s:%n" $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom | tee -a "$(SIZES)"
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FORCE:
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.PHONY: all bottom top FORCE
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