Merge pull request #1462 from JonathonHall-Purism/reuse-toolchains

Enable reusing coreboot release toolchains for forks
2024-12-18 20:47:55 +00:00 · 2023-08-15 16:27:20 -04:00 · 2023-08-15 16:27:20 -04:00 · fbc0993084
commit fbc0993084
parent 59972f3972 a5689c44a9
41 changed files with 127 additions and 135773 deletions
--- a/11
+++ b/11
@ -278,6 +278,8 @@ define define_module =
  # if they have not defined a separate base dir, define it
  # as the same as their build dir.
  $(eval $1_base_dir = $(or $($1_base_dir),$($1_dir)))
+  # Dynamically defined modules must tell us what module file defined them
+  $(eval $1_module_file = $(or $($1_module_file),$1))

  ifneq ("$($1_repo)","")
    $(eval $1_patch_name = $1$(if $($1_patch_version),-$($1_patch_version),))
@ -328,8 +330,11 @@ define define_module =
 		touch "$(build)/$($1_base_dir)/.patched"; \
 	fi
  else
-    $(eval $1_patch_version ?= $($1_version))
-    $(eval $1_patch_name = $1-$($1_patch_version))
+    # Versioned modules (each version a separate module) don't need to include
+    # the version a second time.  (The '-' separator is also omitted then.)
+    # $1_patch_version can still be defined manually.
+    $(eval $1_patch_version ?= $(if $(filter %-$($1_version),$1),,$($1_version)))
+    $(eval $1_patch_name = $1$(if $($1_patch_version),-,)$($1_patch_version))
    # Fetch and verify the source tar file
    # wget creates it early, so we have to cleanup if it fails
    $(packages)/$($1_tar):
@ -394,7 +399,7 @@ define define_module =
 		$(build)/$($1_base_dir)/.canary \
 		$(foreach d,$($1_config_wait),$(build)/$($d_dir)/.build) \
 		$($1_config_file_path) \
-		modules/$1
+		modules/$($1_module_file)
 	@echo "$(DATE) CONFIG $1"
 	@( \
 		cd "$(build)/$($1_dir)" ; \
--- a/boards/librem_13v2/librem_13v2.config
+++ b/boards/librem_13v2/librem_13v2.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_13v2.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_13v4/librem_13v4.config
+++ b/boards/librem_13v4/librem_13v4.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_13v4.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_14/librem_14.config
+++ b/boards/librem_14/librem_14.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_14.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_15v3/librem_15v3.config
+++ b/boards/librem_15v3/librem_15v3.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_15v3.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_15v4/librem_15v4.config
+++ b/boards/librem_15v4/librem_15v4.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_15v4.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_l1um_v2/librem_l1um_v2.config
+++ b/boards/librem_l1um_v2/librem_l1um_v2.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_l1um_v2.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=6.1.8
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_mini/librem_mini.config
+++ b/boards/librem_mini/librem_mini.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_mini.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/boards/librem_mini_v2/librem_mini_v2.config
+++ b/boards/librem_mini_v2/librem_mini_v2.config
@ -5,7 +5,6 @@ CONFIG_COREBOOT_CONFIG=config/coreboot-librem_mini_v2.config
 export CONFIG_COREBOOT=y
 export CONFIG_COREBOOT_VERSION=purism
 export CONFIG_LINUX_VERSION=5.10.5
-export CONFIG_PURISM_BLOBS=y

 CONFIG_CRYPTSETUP2=y
 CONFIG_FLASHROM=y
--- a/modules/coreboot
+++ b/modules/coreboot
@ -1,5 +1,3 @@
-modules-$(CONFIG_COREBOOT) += coreboot
-
 ifeq "$(CONFIG_COREBOOT)" "y"

 CONFIG_COREBOOT_ROM			?= coreboot.rom
@ -8,60 +6,99 @@ CONFIG_COREBOOT_BOOTBLOCK	?=
 ifeq "$(CONFIG_TARGET_ARCH)" "x86"
 	COREBOOT_TARGET := i386
 	LINUX_IMAGE_FILE := bzImage
+	COREBOOT_TARGET_CROSS :=
 else ifeq "$(CONFIG_TARGET_ARCH)" "ppc64"
 	COREBOOT_TARGET := ppc64
 	LINUX_IMAGE_FILE := zImage
+	# skiboot payload needs the Heads toolchain as it is little-endian (like
+	# Linux), but coreboot is big-endian on PPC64.
+	COREBOOT_TARGET_CROSS := CROSS=$(CROSS)
 else
 	$(error "$(CONFIG_TARGET_ARCH) target isn't supported by this module")
 endif

-ifeq "$(CONFIG_COREBOOT_VERSION)" "4.8.1"
-	coreboot_version := 4.8.1
-	coreboot_hash := f0ddf4db0628c1fe1e8348c40084d9cbeb5771400c963fd419cda3995b69ad23
-	coreboot-blobs_hash := 18aa509ae3af005a05d7b1e0b0246dc640249c14fc828f5144b6fd20bb10e295
-else ifeq "$(CONFIG_COREBOOT_VERSION)" "4.11"
-	coreboot_version := 4.11
-	coreboot_hash := 97fd859b4c39a25534fe33c30eb86e54a233952e08a024c55858d11598a8ad87
-	coreboot-blobs_hash := aa7855c5bd385b3360dadc043ea6bc93f564e6e4840d9b3ee5b9e696bbd055db
-	coreboot_depends := $(if $(CONFIG_PURISM_BLOBS), purism-blobs)
-else ifeq "$(CONFIG_COREBOOT_VERSION)" "4.13"
-	coreboot_version := 4.13
-	coreboot_hash := 4779da645a25ddebc78f1bd2bd0b740fb1e6479572648d4650042a2b9502856a
-	coreboot-blobs_hash := 060656b46a7859d038ddeec3f7e086e85f146a50b280c4babec23c1188264dc8
-	coreboot_depends := $(if $(CONFIG_PURISM_BLOBS), purism-blobs)
-else ifeq "$(CONFIG_COREBOOT_VERSION)" "4.17"
-	coreboot_version := 4.17
-	coreboot_hash := 95da11d1c6a450385101a68799258a398ce965f4e46cce6fe8d5ebd74e50c125
-	coreboot-blobs_hash := a2277fe7a2b2aab5da0aa335158460e00b852382f6736f2179992805702eb607
-	coreboot_depends := $(if $(CONFIG_PURISM_BLOBS), purism-blobs)
-	EXTRA_FLAGS := -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches -Wno-error=packed-not-aligned -Wno-error=address-of-packed-member
-else ifeq "$(CONFIG_COREBOOT_VERSION)" "4.19"
-        coreboot_version := 4.19
-        coreboot_hash := 65ccb2f46535b996e0066a1b76f81c8cf1ff3e27df84b3f97d8ad7b3e7cf0a43
-        coreboot-blobs_hash := 30214caed07b25f11e47bec022ff6234841376e36689eb674de2330a3e980cbc
-        coreboot_depends := $(if $(CONFIG_PURISM_BLOBS), purism-blobs)
-        EXTRA_FLAGS := -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches -Wno-error=packed-not-aligned -Wno-error=address-of-packed-member
-else ifeq "$(CONFIG_COREBOOT_VERSION)" "talos_2"
-	coreboot_version = git
-	coreboot_patch_version = talos_2
-	coreboot_commit_hash = c8aed443c631042ad2b0326c35cd0b774752b924
-	coreboot_repo := https://github.com/Dasharo/coreboot
+# Each coreboot version is defined as a separate module, but only the needed
+# modules become dependencies of the current board.  One coreboot version is
+# selected for the toolchain build and firmware build.  These can be the same
+# (when using a coreboot release) or different (when using a fork that reuses a
+# release's toolchain).

-else ifeq "$(CONFIG_COREBOOT_VERSION)" "purism"
-	coreboot_version := git
-	coreboot_repo := https://source.puri.sm/coreboot/coreboot
-	coreboot_commit_hash := a899f08d2789db1dd9b02cff34179c4d38e6d0e3
-	EXTRA_FLAGS := -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches -Wno-error=packed-not-aligned -Wno-error=address-of-packed-member
-else
+# Define a coreboot module.  Parameters:
+# $1 - module version
+# $2 - toolchain coreboot version - if nonempty, uses the toolchain from this
+#      version (use for forks to avoid building extra copies of the same
+#      toolchain)
+#
+# For a coreboot release:
+# - the version is the coreboot release version
+# - set coreboot-<version>_hash to the tarball hash
+# - set coreboot-blobs-<version>_hash to the blobs tarball hash
+#
+# For a git fork:
+# - the version is the name of the fork (just controls the build directory used)
+# - set coreboot-<version>_repo to the git repo address
+# - set coreboot-<version>_commit_hash to the git commit
+define coreboot_module =
+	coreboot-$(1)_version := $(1)
+	coreboot-$(1)_module_file := coreboot
+	coreboot-$(1)_base_dir := coreboot-$(1)
+	coreboot-$(1)_dir := coreboot-$(1)/$(BOARD)
+	coreboot-$(1)_toolchain := $(2)
+	# These are ignored if this version is a git fork
+	coreboot-$(1)_tar := coreboot-$(1).tar.xz
+	coreboot-$(1)_url := https://www.coreboot.org/releases/coreboot-$(1).tar.xz
+	# These are only used for releases, git forks don't use upstream blobs
+	coreboot-blobs-$(1)_version := $(1)
+	coreboot-blobs-$(1)_module_file := coreboot
+	coreboot-blobs-$(1)_dir := coreboot-$(1)/3rdparty
+	coreboot-blobs-$(1)_tar := coreboot-blobs-$(1).tar.xz
+	coreboot-blobs-$(1)_url := https://www.coreboot.org/releases/coreboot-blobs-$(1).tar.xz
+	coreboot-blobs-$(1)_tar_opt := --strip 2
+endef
+
+# coreboot releases
+
+coreboot-4.11_hash := 97fd859b4c39a25534fe33c30eb86e54a233952e08a024c55858d11598a8ad87
+coreboot-blobs-4.11_hash := aa7855c5bd385b3360dadc043ea6bc93f564e6e4840d9b3ee5b9e696bbd055db
+$(eval $(call coreboot_module,4.11,))
+
+coreboot-4.19_hash := 65ccb2f46535b996e0066a1b76f81c8cf1ff3e27df84b3f97d8ad7b3e7cf0a43
+coreboot-blobs-4.19_hash := 30214caed07b25f11e47bec022ff6234841376e36689eb674de2330a3e980cbc
+$(eval $(call coreboot_module,4.19,))
+
+coreboot-4.20.1_hash := b41539a8c2eab2fec752157eb4acbd0e2a637a7203530c12e66b43a5c3c3a931
+coreboot-blobs-4.20.1_hash := 30f9d8618e78d483d0903976982485e70825ca3469efd17902c9246aaefd7c4a
+$(eval $(call coreboot_module,4.20.1,))
+
+# coreboot git forks
+
+# talos_2 could use the 4.20.1 toolchain, but it's the only ppc64 fork, so
+# there is no point preparing another coreboot module that won't be shared with
+# anything.
+coreboot-talos_2_repo := https://github.com/Dasharo/coreboot
+coreboot-talos_2_commit_hash := c8aed443c631042ad2b0326c35cd0b774752b924
+$(eval $(call coreboot_module,talos_2,))
+
+# Similarly, purism is based on 4.20.1, but nothing builds against 4.20.1 itself
+# or any other fork - no benefit to sharing the toolchain yet.
+coreboot-purism_repo := https://source.puri.sm/firmware/coreboot.git
+coreboot-purism_commit_hash := a899f08d2789db1dd9b02cff34179c4d38e6d0e3
+$(eval $(call coreboot_module,purism,))
+
+# Check that the board configured the coreboot version correctly
+ifeq "$(CONFIG_COREBOOT_VERSION)" ""
 	$(error "$(BOARD): does not specify coreboot version under CONFIG_COREBOOT_VERSION")
+else ifeq "$(coreboot-$(CONFIG_COREBOOT_VERSION)_dir)" ""
+	$(error "$(BOARD): coreboot version $(CONFIG_COREBOOT_VERSION) not known"
 endif 

-#coreboot_version := git
-#coreboot_repo := https://github.com/osresearch/coreboot
-coreboot_base_dir := coreboot-$(coreboot_version)
-coreboot_dir := $(coreboot_base_dir)/$(BOARD)
-coreboot_tar := coreboot-$(coreboot_version).tar.xz
-coreboot_url := https://www.coreboot.org/releases/$(coreboot_tar)
+coreboot_module := coreboot-$(CONFIG_COREBOOT_VERSION)
+modules-y += $(coreboot_module)
+# Don't make everyone type $($(coreboot_module)_dir)
+coreboot_dir := $($(coreboot_module)_dir)
+coreboot_base_dir := $($(coreboot_module)_base_dir)
+
+$(coreboot_module)_depends += $(if $(CONFIG_PURISM_BLOBS), purism-blobs)

 # coreboot builds are specialized on a per-target basis.
 # The builds are done in a per-target subdirectory
@ -70,9 +107,24 @@ CONFIG_COREBOOT_CONFIG ?= config/coreboot-$(BOARD).config
 # Ensure that touching the config file will force a rebuild
 $(build)/$(coreboot_dir)/.configured: $(CONFIG_COREBOOT_CONFIG)

-EXTRA_FLAGS ?= -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches -Wno-error=packed-not-aligned
+EXTRA_FLAGS ?= -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches -Wno-error=packed-not-aligned -Wno-address-of-packed-member

-coreboot_configure := \
+# Select the coreboot version to use for the toolchain
+ifeq "$($(coreboot_module)_toolchain)" ""
+	# Use the same module
+	coreboot_toolchain_module := $(coreboot_module)
+else
+	# Use a different module
+	coreboot_toolchain_module := coreboot-$($(coreboot_module)_toolchain)
+	modules-y += $(coreboot_toolchain_module)
+	# The toolchain module won't build anything for this board, we just need
+	# the module prepped so we can hook up the toolchain target
+	$(coreboot_toolchain_module)_output := .nobuild
+	$(coreboot-toolchain_module)_configure := echo -e 'all:\n\ttouch .nobuild' > Makefile.nobuild
+	$(coreboot-toolchain_module)_target := -f Makefile.nobuild
+endif
+
+$(coreboot_module)_configure := \
 	mkdir -p "$(build)/$(coreboot_dir)" \
 	&& $(call install_config,$(pwd)/$(CONFIG_COREBOOT_CONFIG),$(build)/$(coreboot_dir)/.config) \
 	&& echo 'CONFIG_LOCALVERSION="$(BRAND_NAME)-$(HEADS_GIT_VERSION)"' >> $(build)/$(coreboot_dir)/.config \
@ -85,40 +137,30 @@ coreboot_configure := \
 		CFLAGS_x86_32="$(EXTRA_FLAGS)" \
 		CFLAGS_x86_64="$(EXTRA_FLAGS)" \

-COREBOOT_IASL="$(build)/$(coreboot_base_dir)/util/crossgcc/xgcc/bin/iasl"
+# Create a dependency from coreboot to the toolchain.  Use .heads-toolchain to
+# mark that the toolchain was built.
+COREBOOT_TOOLCHAIN=$(build)/$($(coreboot_toolchain_module)_base_dir)/.heads-toolchain
+$(COREBOOT_TOOLCHAIN): $(build)/$($(coreboot_toolchain_module)_base_dir)/.canary
+	$(MAKE) -C "$(build)/$($(coreboot_toolchain_module)_base_dir)" CPUS=$(CPUS) "crossgcc-$(COREBOOT_TARGET)"
+	touch "$@"

-# coreboot for x86 is built with the 32-bit compiler; ideally we could use the
-# same x86_64-linux-musl -m32 to build it, but this causes some link errors that
-# need to be tracked down.
-#	CROSS="$(CROSS)" \
+$(build)/$(coreboot_dir)/.configured: $(COREBOOT_TOOLCHAIN)

-ifeq "$(CONFIG_TARGET_ARCH)" "x86"
-COREBOOT_CROSS := $(dir $(CROSS))i386-linux-musl-
-else
-COREBOOT_CROSS := $(CROSS)
-endif
-
-coreboot_target := \
+# Build with the cross toolchain from the toolchain module (which might be the
+# same coreboot module or a different one).
+$(coreboot_module)_target := \
 	-C "$(build)/$(coreboot_base_dir)" \
 	obj="$(build)/$(coreboot_dir)" \
-	CROSS="$(COREBOOT_CROSS)" \
-	IASL="$(COREBOOT_IASL)" \
 	DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
-	xcompile="$(build)/$(coreboot_base_dir)/.xcompile" \
+	XGCCPATH="$(build)/$($(coreboot_toolchain_module)_base_dir)/util/crossgcc/xgcc/bin/" \
+	$(COREBOOT_TARGET_CROSS) \
 	BUILD_TIMELESS=1 \
 	CFLAGS_x86_32="$(EXTRA_FLAGS)" \
 	CFLAGS_x86_64="$(EXTRA_FLAGS)" \
 	$(MAKE_JOBS)

-coreboot_output := $(CONFIG_COREBOOT_ROM)
-coreboot_output += $(CONFIG_COREBOOT_BOOTBLOCK)
-coreboot_depend += linux initrd $(musl_dep)
-
-COREBOOT_TOOLCHAIN=$(build)/$(coreboot_base_dir)/.xcompile
-$(COREBOOT_TOOLCHAIN): $(build)/$(coreboot_base_dir)/.canary
-	$(MAKE) -C "$(build)/$(coreboot_base_dir)" CPUS=$(CPUS) "crossgcc-$(COREBOOT_TARGET)"
-
-$(build)/$(coreboot_dir)/.configured: $(COREBOOT_TOOLCHAIN)
+$(coreboot_module)_output := $(CONFIG_COREBOOT_ROM)
+$(coreboot_module)_output += $(CONFIG_COREBOOT_BOOTBLOCK)

 # Force a rebuild if the inputs have changed
 $(build)/$(coreboot_dir)/.build: \
@ -189,27 +231,17 @@ coreboot.modify_and_save_oldconfig_in_place:

 # if we are not building from a git checkout,
 # we must also download the coreboot-blobs tree
-ifneq "$(coreboot_version)" "git"
+ifeq "$($(coreboot_module)_repo)" ""

-coreboot_depends += coreboot-blobs
-modules-y += coreboot-blobs
+coreboot-blobs_module := coreboot-blobs-$(CONFIG_COREBOOT_VERSION)

-coreboot-blobs_version := $(coreboot_version)
-coreboot-blobs_tar := coreboot-blobs-$(coreboot-blobs_version).tar.xz
-coreboot-blobs_url := https://www.coreboot.org/releases/$(coreboot-blobs_tar)
-
-ifeq "$(CONFIG_COREBOOT_VERSION)" "4.8.1"
-	coreboot-blobs_tar_opt := --strip 3
-	coreboot-blobs_dir := coreboot-$(coreboot-blobs_version)/3rdparty/blobs
-else
-	coreboot-blobs_tar_opt := --strip 2
-	coreboot-blobs_dir := coreboot-$(coreboot-blobs_version)/3rdparty
-endif
+$(coreboot_module)_depends += $(coreboot-blobs_module)
+modules-y += $(coreboot-blobs_module)

 ## there is nothing to build for the blobs, this should be
 ## made easier to make happen
-coreboot-blobs_output := .built
-coreboot-blobs_configure := echo -e 'all:\n\ttouch .built' > Makefile
+$(coreboot-blobs_module)_output := .built
+$(coreboot-blobs_module)_configure := echo -e 'all:\n\ttouch .built' > Makefile

 endif
 endif
--- a/patches/coreboot-4.13/0002-x230-fhd-variant.patch
+++ b/patches/coreboot-4.13/0002-x230-fhd-variant.patch
@ -1,201 +0,0 @@
-git fetch https://review.coreboot.org/coreboot refs/changes/50/28950/22 && git format-patch -1 --stdout FETCH_HEAD
-From 06fe32bb5f65c784e7819b875c505fcceab11b99 Mon Sep 17 00:00:00 2001
-From: Alexander Couzens <lynxis@fe80.eu>
-Date: Sat, 19 Mar 2022 13:42:33 +0000
-Subject: [PATCH] lenovo/x230: introduce FHD variant
-
-There is a modification for the x230 which uses the 2nd DP from the dock
-as the integrated panel's connection, which allows using a custom eDP
-panel instead of the stock LVDS display.
-
-There are several adapter boards present on the market and all of them
-uses the same method of enabling the custom eDP panel.
-
-To make this work with coreboot, the internal LVDS connector should be
-disabled in libgfxinit. The VBT has been modified as well, which allows
-brightness controls to work out of the box.
-
-The modifications done to the VBT are:
- Remove the LVDS port entry.
- Move the DP-3 (which is the 2nd DP on the dock) entry to the first
-  position on the list.
- Set the DP-3 as internally connected.
-
-This has been reported to work with the following panels:
- LP125WF2-SPB4 (1920*1080, 12.5")
- LQ125T1JW02 (2560*1440, 12.5")
- LQ133M1JW21 (1920*1080, 13.3")
- LTN133HL10-201 (1920*1080, 13.3")
- B133HAN04.6 (1920*1080, 13.3")
- B133QAN02.0 (2560*1600, 13.3")
-
-Other eDP panels not on this list should work as well.
-
-Change-Id: I0355d39a61956792e69bccd5274cfc2749d72bf0
-Signed-off-by: Alexander Couzens <lynxis@fe80.eu>
-Signed-off-by: Felix Singer <felixsinger@posteo.net>
---
- src/mainboard/lenovo/x230/Kconfig             |  15 ++++++++-----
- src/mainboard/lenovo/x230/Kconfig.name        |   3 +++
- src/mainboard/lenovo/x230/Makefile.inc        |   5 +++++
- .../lenovo/x230/variants/x230_edp/data.vbt    | Bin 0 -> 4281 bytes
- .../x230/variants/x230_edp/gma-mainboard.ads  |  21 ++++++++++++++++++
- 5 files changed, 38 insertions(+), 6 deletions(-)
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
- create mode 100644 src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-
-diff --git a/src/mainboard/lenovo/x230/Kconfig b/src/mainboard/lenovo/x230/Kconfig
-index a6fd796206..7aa5af6d85 100644
--- a/src/mainboard/lenovo/x230/Kconfig
-+++ b/src/mainboard/lenovo/x230/Kconfig
-@@ -1,4 +1,4 @@
-if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S
-+if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
- 
- config BOARD_SPECIFIC_OPTIONS
- 	def_bool y
-@@ -11,7 +11,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select H8_HAS_BAT_TRESHOLDS_IMPL
- 	select H8_HAS_PRIMARY_FN_KEYS if BOARD_LENOVO_X230S
- 	select NO_UART_ON_SUPERIO
-	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select BOARD_ROMSIZE_KB_12288 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select BOARD_ROMSIZE_KB_16384 if BOARD_LENOVO_X230S
- 	select HAVE_ACPI_TABLES
- 	select HAVE_OPTION_TABLE
-@@ -20,7 +20,7 @@ config BOARD_SPECIFIC_OPTIONS
- 	select INTEL_INT15
- 	select DRIVERS_RICOH_RCE822
- 	select MAINBOARD_HAS_LPC_TPM
-	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	select MAINBOARD_HAS_TPM1 if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	select MAINBOARD_HAS_LIBGFXINIT
- 	select GFX_GMA_PANEL_1_ON_LVDS if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
- 	select INTEL_GMA_HAVE_VBT
-@@ -54,12 +54,12 @@ config MAINBOARD_DIR
- 
- config VARIANT_DIR
- 	string
-	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T
-+	default "x230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230T || BOARD_LENOVO_X230_EDP
- 	default "x230s" if BOARD_LENOVO_X230S
- 
- config MAINBOARD_PART_NUMBER
- 	string
-	default "ThinkPad X230" if BOARD_LENOVO_X230
-+	default "ThinkPad X230" if BOARD_LENOVO_X230 || BOARD_LENOVO_X230_EDP
- 	default "ThinkPad X230t" if BOARD_LENOVO_X230T
- 	default "ThinkPad X230s" if BOARD_LENOVO_X230S
- 
-@@ -67,6 +67,10 @@ config OVERRIDE_DEVICETREE
- 	string
- 	default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
- 
-+config INTEL_GMA_VBT_FILE
-+default "variants/x230_edp/data.vbt" if BOARD_LENOVO_X230_EDP
-++
-+
- config USBDEBUG_HCD_INDEX
- 	int
- 	default 2
-@@ -83,4 +86,4 @@ config PS2M_EISAID
- config THINKPADEC_HKEY_EISAID
- 	default "LEN0068"
- 
-endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S
-+endif # BOARD_LENOVO_X230 || BOARD_LENOVO_X230T ||  BOARD_LENOVO_X230S || BOARD_LENOVO_X230_EDP
-diff --git a/src/mainboard/lenovo/x230/Kconfig.name b/src/mainboard/lenovo/x230/Kconfig.name
-index 1a01436879..e7290a12dd 100644
--- a/src/mainboard/lenovo/x230/Kconfig.name
-+++ b/src/mainboard/lenovo/x230/Kconfig.name
-@@ -6,3 +6,6 @@ config BOARD_LENOVO_X230T
- 
- config BOARD_LENOVO_X230S
- 	bool "ThinkPad X230s"
-+
-+config BOARD_LENOVO_X230_EDP
-+	bool "ThinkPad X230 eDP Mod (2K/FHD)"
-diff --git a/src/mainboard/lenovo/x230/Makefile.inc b/src/mainboard/lenovo/x230/Makefile.inc
-index 8e801f145d..6e6f9f90b9 100644
--- a/src/mainboard/lenovo/x230/Makefile.inc
-+++ b/src/mainboard/lenovo/x230/Makefile.inc
-@@ -5,4 +5,9 @@ bootblock-y += variants/$(VARIANT_DIR)/gpio.c
- romstage-y += variants/$(VARIANT_DIR)/early_init.c
- romstage-y += variants/$(VARIANT_DIR)/gpio.c
- ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
-+
-+ifeq ($(CONFIG_BOARD_LENOVO_X230_EDP),y)
-+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/x230_edp/gma-mainboard.ads
-+else
- ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += variants/$(VARIANT_DIR)/gma-mainboard.ads
-+endif
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt b/src/mainboard/lenovo/x230/variants/x230_edp/data.vbt
-new file mode 100644
-index 0000000000000000000000000000000000000000..13384d45571ff76e592335143d01315e37893186
-GIT binary patch
-literal 4281
-zcmdT`Z)_aZ5&ym0y}P}=-MjTVC6^<yCLz$XvE%h&S*h!)@6LAcg^PXugKH2XcDRE^
-zHNiLuN+i^5TbBk=p_5vr0Ri$CB!v1Q6%yhL5TS}%ZG|E}(5mW(6!8It5AdN?tBP`+
-zx3_i!7V#AnmCow7GdpkI?0YkBW_RywafYVHi@l}UV$Y$8VyQezRd{&CInDRYR4h$Q
-zA08>p6b={56T^4V^SA+LolmX+RUx+79#iSqiP~ars*|P{j#W<|Sw32Qpw?S@B$TK!
-zT%y8#_th3_%L^xJRhpi?y+F#XZ5B@+U98gh$p??rmIq1sVr%N_-*;O-QJ>e_m+#Gc
-zeSJjvzQO*1!F<1Mj*JdZ9IBMcg_+XCI898^NNKt-Jw1A;SiXxYQxjvQVrgb{#5RMi
-z3_rAVdim%B-#tOO;ZDl)3wi>F!IEkCq2;B0R9IZ3DP?n<rfSD)%a7Em`)pG=xClcR
-zfQTY3AQJz|BVh>3(8mm!Gbk$bf{?ofjp)+WX;f0xKuMreM_FPop&M`zu|-4&b{lx}
-z6dXr%nIN^a1Q1g^?g`SApyQo+We^Ju;y^Soa0Kxp0ExE)gG^{(s5wk=5)@Iwe?zpD
-z@%1v$crW@+c=`T;{ewfYIC5a@V7W3iGdp+pJ^l}V_@k99K7NB27i?KEp$JF`50mi@
-zjG1XXrseRG7Qw69ek|x~_*Klqd$9}}jBGpu*K}~RX~1KAld;P%uwb}2&iFCo7mQyT
-zCSGP-Wc-%#2gY9*A29yLh$l?6F>Yks%;;r&gE7oF#P|+lf$=@YNyZt*<BXp%o@K;N
-z;^Rid2d9zA7a?zJayUAk?1cYJsDCEZCq4>N3Nz%%kOxj$xHTH_I6i5-#j$7@-%=}(
-z?1954MnX?xAuk79(<<Tf409Fpx$wEsNX+wNp0De7H-87y*XOlHqw#v9f#_UhUAnlg
-zi_2(JC*w<@<i}S-iI)}-&;1HW$=_hN&+7=v86dSJ5nbA)_y+kbU2PDFE??VVW9GW>
-zSr6;_4gTc~tacpa=As!xD;@CT7xX)U4}W57_`9~2N<i$1-Hq?ZdXRnseAKTSC4vUn
-zvU_KR`>pCP65!^@JyGbYMG6B#@{r1i&qF#431THdvdmK?gb!}@x&d86kH8RtSun)L
-zMg&qo8p@sxlqPr)H*t1i5Xc8fNK*dW_}wA77I--u)J{nAs;))bo<l6#G>8v<p5gy;
-z<c2$V&sxyMI7lIRD=DCSpmMmfaICgCzVKkJ#fR-<sP2F);1(})cA)7k<8|TuBs}RY
-zwKp{#FZ7<eJej>k&YfS^jD1^rM=s>0ytuB(<S=kXYsT9eI1^R*2UrsIpx#)DflmYL
-zcI2=F|Kw{2>VlIOTx;M223I$qhjl3%0pyLp$ECQ*_^UYE{?(M!zFMP3W9I<gN%(cT
-zyvs4>_cUj9w4&M7&s8K0k<cwUM!E2PTu7mct3rr`5sB*7)nZ4R`hWT~<uZuic%Tb%
-z5{?q{&YwfGl9W%nBS~{SNhgx-V@b1~q?eQKTGD(wN&iT?re$ukXwY)YmN{$Dqn7)m
-zWuCX_HOswZnSZhfw(HvFPMeChJ7b&o+O%T3=WKJ;rZ;W(kGA=)O-9Pirp&!5I+$|r
-zNtySj=%*?7xs>@rirz}Oms94I6gg>kPulEG+g%^&e&n+7+xV#SfijjY{5o+C7V}H-
-zZs9PGrN7SK-OZ8YGZ>yr(&i#tdss~q`sQ|0&fnIIOUJ;O2*-=b;v=kW?O}6KsoH4P
-z0smI&%EQn#cd@w$RZTVP=TtP?l7~|?nRTSIQO2qkgO+Z!=3#T$D-XeMvn68}T3Ey8
-zHleye(7mkLXe*JtfA{Q*lj!gc)Wck4IFj|C#q&~HiNmA&>Z|kF4(U<Y;5eIloj)C%
-zP4#WvIv2Sie|71?P3)md%>vj%v~DWNT8*x>a2}rST)i~8vd61DwO!2$JZMNNi6hyH
-z2d_)6&979w%w$-vyatVrqw??t&t%}iZhDAP3%j_I#cGANdzLq>W;J(F=Xwkxxj%^H
-zwQDmn=w}|@-y`RG{*wz0>A(ZGtk~AM=#-fE(LV1uZE98+Nk>UmiyyuJ8?##<Mr{1g
-p(B@uj-Va_SU#<T#GXLCvin_ms#}9BYOE7UKDyX7coWuJX{tbC=%boxL
-
-literal 0
-HcmV?d00001
-
-diff --git a/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-new file mode 100644
-index 0000000000..f7cf0bc264
--- /dev/null
-+++ b/src/mainboard/lenovo/x230/variants/x230_edp/gma-mainboard.ads
-@@ -0,0 +1,21 @@
-+-- SPDX-License-Identifier: GPL-2.0-or-later
-+
-+with HW.GFX.GMA;
-+with HW.GFX.GMA.Display_Probing;
-+
-+use HW.GFX.GMA;
-+use HW.GFX.GMA.Display_Probing;
-+
-+private package GMA.Mainboard is
-+
-+   ports : constant Port_List :=
-+     (DP1,
-+      DP2,
-+      DP3,
-+      HDMI1,
-+      HDMI2,
-+      HDMI3,
-+      Analog,
-+      others => Disabled);
-+
-+end GMA.Mainboard;
-- 
-2.30.2
--- a/patches/coreboot-4.14/0001-soc-cannonlake-me.c-Always-print-ME-status.patch
+++ b/patches/coreboot-4.14/0001-soc-cannonlake-me.c-Always-print-ME-status.patch
@ -1,31 +0,0 @@
-From ce401513ac08b0c5b121e0f9c4bb38ee6e99a47d Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Fri, 19 Jun 2020 17:02:22 -0500
-Subject: [PATCH] soc/cannonlake/me.c: Always print ME status
-
-Print the ME status even if the CSE device is disabled, so
-we know which disabled state it's in.
-
-Change-Id: I939333199aa699039fec727beb094e4eb2ad7149
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- src/soc/intel/cannonlake/me.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/src/soc/intel/cannonlake/me.c b/src/soc/intel/cannonlake/me.c
-index 7bbe1ae730..4fe5a96ade 100644
--- a/src/soc/intel/cannonlake/me.c
-+++ b/src/soc/intel/cannonlake/me.c
-@@ -103,9 +103,6 @@ void dump_me_status(void *unused)
- 	union me_hfsts5 hfsts5;
- 	union me_hfsts6 hfsts6;
- 
-	if (!is_cse_enabled())
-		return;
-
- 	hfsts1.data = me_read_config32(PCI_ME_HFSTS1);
- 	hfsts2.data = me_read_config32(PCI_ME_HFSTS2);
- 	hfsts3.data = me_read_config32(PCI_ME_HFSTS3);
-- 
-2.20.1
-
--- a/patches/coreboot-4.14/0002-mb-purism-librem_14-set-SA-slew-rate-to-fast-16.patch
+++ b/patches/coreboot-4.14/0002-mb-purism-librem_14-set-SA-slew-rate-to-fast-16.patch
@ -1,30 +0,0 @@
-From 154c2089204962d290860eeecee58165f72868eb Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Tue, 18 May 2021 11:07:16 -0500
-Subject: [PATCH 1/4] mb/purism/librem_14: set SA slew rate to fast/16
-
-Decrease SA slew rate to match other domains and reduce
-high-frequency noise slightly.
-
-Change-Id: I02cd93481f6bfba6249cb338a0e2f47d471a438e
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- .../purism/librem_cnl/variants/librem_14/devicetree.cb          | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
-diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb
-index f61eb2b60a..6d0eb205e7 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb
-+++ b/src/mainboard/purism/librem_cnl/variants/librem_14/devicetree.cb
-@@ -39,7 +39,7 @@ chip soc/intel/cannonlake
- 
- 	register "SlowSlewRateForIa" = "3"	# fast/16
- 	register "SlowSlewRateForGt" = "3"	# fast/16
-	register "SlowSlewRateForSa" = "2"	# fast/8
-+	register "SlowSlewRateForSa" = "3"	# fast/16
- 	register "SlowSlewRateForFivr" = "3"	# fast/16
- 
- 	# Power
-- 
-2.30.2
-
--- a/patches/coreboot-4.14/0003-mb-purism-librem_14-hda_verb.c-Fix-subsystem-verb-co.patch
+++ b/patches/coreboot-4.14/0003-mb-purism-librem_14-hda_verb.c-Fix-subsystem-verb-co.patch
@ -1,61 +0,0 @@
-From d41d57dcb15694b04bf0022a62b0867ead94e807 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Thu, 17 Jun 2021 18:54:16 -0500
-Subject: [PATCH 3/4] mb/purism/librem_14/hda_verb.c: Fix subsystem, verb
- count, jack detect
-
- set subsystem/subvendor ID to Realtek default, as the one dumped
-  from the vendor UEFI firmware provides no advantages
- fix the number of verb entries, which excluded the 4 following the
-  pin configs
- issue the reset *before* setting the subvendor, and use the Azalia macro
- disable jack detect for the 3.5mm jack, both line out and mic, since
-  it's not currently working, so that the outputs can be manually selected
-
-Change-Id: Icd961c3c5aec23cf61d6a9ad65c603c6dc04697a
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- .../librem_cnl/variants/librem_14/hda_verb.c    | 17 ++++++-----------
- 1 file changed, 6 insertions(+), 11 deletions(-)
-
-diff --git a/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c b/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c
-index 97422ef317..1256c1721b 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c
-+++ b/src/mainboard/purism/librem_cnl/variants/librem_14/hda_verb.c
-@@ -4,27 +4,22 @@
- 
- const u32 cim_verb_data[] = {
- 	0x10ec0256,	/* Codec Vendor/Device ID: Realtek ALC256 */
-	0x1b50580a,	/* Subsystem ID */
-	12,		/* Number of entries */
-+	0x10ec0256,	/* Subsystem ID */
-+	16,		/* Number of entries */
- 
-	AZALIA_SUBVENDOR(0, 0x1b50580a),
-
-	/* Widget node 0x01 */
-	0x0017ff00,
-	0x0017ff00,
-	0x0017ff00,
-	0x0017ff00,
-+	AZALIA_RESET(0x1),
- 
-+	AZALIA_SUBVENDOR(0, 0x10ec0256),
- 	AZALIA_PIN_CFG(0, 0x12, 0x90a60140), /* Front digital mic */
- 	AZALIA_PIN_CFG(0, 0x13, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x14, 0x90170110), /* Internal speakers */
- 	AZALIA_PIN_CFG(0, 0x18, 0x411111f0), /* NC */
-	AZALIA_PIN_CFG(0, 0x19, 0x04a11030), /* Jack analog mic */
-+	AZALIA_PIN_CFG(0, 0x19, 0x04a11130), /* Jack analog mic */
- 	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x1d, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x1e, 0x411111f0), /* NC */
-	AZALIA_PIN_CFG(0, 0x21, 0x04211020), /* Jack analog out */
-+	AZALIA_PIN_CFG(0, 0x21, 0x04211120), /* Jack analog out */
- 
- 	/* Hidden SW reset */
- 	0x0205001a,
-- 
-2.30.2
-
--- a/patches/coreboot-4.14/0004-mb-purism-librem_mini-Enable-acoustic-noise-mitigati.patch
+++ b/patches/coreboot-4.14/0004-mb-purism-librem_mini-Enable-acoustic-noise-mitigati.patch
@ -1,40 +0,0 @@
-From 8fed12fb31b9437934525a0389e5b4a45be56bd2 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Tue, 15 Jun 2021 10:50:17 -0500
-Subject: [PATCH 2/4] mb/purism/librem_mini: Enable acoustic noise mitigation
-
-Enable FastPkgCRampDisable for all domains, set SlowSlewRate
-to fast/16 for all domains.
-
-Test: boot Librem Mini v2, observe high frequency acoustic noise reduced.
-
-Change-Id: I10bc2a3e6b631b8c0b430e204f376aa9a81ac683
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- .../librem_cnl/variants/librem_mini/devicetree.cb      | 10 ++++++++++
- 1 file changed, 10 insertions(+)
-
-diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
-index 69d1b423bd..836f4aceaf 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
-+++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/devicetree.cb
-@@ -22,6 +22,16 @@ chip soc/intel/cannonlake
- 	# Misc
- 	register "AcousticNoiseMitigation" = "1"
- 
-+	register "FastPkgCRampDisableIa" = "1"
-+	register "FastPkgCRampDisableGt" = "1"
-+	register "FastPkgCRampDisableSa" = "1"
-+	register "FastPkgCRampDisableFivr" = "1"
-+
-+	register "SlowSlewRateForIa" = "3"	# fast/16
-+	register "SlowSlewRateForGt" = "3"	# fast/16
-+	register "SlowSlewRateForSa" = "3"	# fast/16
-+	register "SlowSlewRateForFivr" = "3"	# fast/16
-+
- 	# Power
- 	register "PchPmSlpS3MinAssert" = "3"	# 50ms
- 	register "PchPmSlpS4MinAssert" = "1"	# 1s
-- 
-2.30.2
-
--- a/patches/coreboot-4.14/0005-mb-purism-librem_mini-hda_verb.c-Fix-subsystem-jack-.patch
+++ b/patches/coreboot-4.14/0005-mb-purism-librem_mini-hda_verb.c-Fix-subsystem-jack-.patch
@ -1,50 +0,0 @@
-From 438a16b089f152eedb5a4b96f6b98c82635708f1 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Thu, 17 Jun 2021 18:58:45 -0500
-Subject: [PATCH 4/4] mb/purism/librem_mini/hda_verb.c: Fix subsystem, jack
- detect
-
- set subsystem/subvendor ID to Realtek default, as the one dumped
-  from the vendor UEFI firmware provides no advantages
- Add a codec reset before setting the subvendor ID using the Azalia macro
-  for consistency with all other Realtek HDA codecs
- disable jack detect for the external mic on the 3.5mm jack, since it's not
-  currently working, so that the external microphone can be manually selected
-
-Change-Id: Ib0f99e5088973a721c0a295899012c9aea5009cf
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- .../librem_cnl/variants/librem_mini/hda_verb.c       | 12 +++++++-----
- 1 file changed, 7 insertions(+), 5 deletions(-)
-
-diff --git a/src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c b/src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c
-index 93dd2702bf..5a9aead2e7 100644
--- a/src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c
-+++ b/src/mainboard/purism/librem_cnl/variants/librem_mini/hda_verb.c
-@@ -3,16 +3,18 @@
- #include <device/azalia_device.h>
- 
- const u32 cim_verb_data[] = {
-	0x10ec0269,	/* Codec Vendor/Device ID: Realtek ALC293 */
-	0x10ec0000,	/* Subsystem ID */
-	11,		/* Number of entries */
-+	0x10ec0269,	/* Codec Vendor/Device ID: Realtek ALC269 */
-+	0x10ec0269,	/* Subsystem ID */
-+	12,		/* Number of entries */
- 
-	AZALIA_SUBVENDOR(0, 0x10ec0000),
-+	AZALIA_RESET(0x1),
-+
-+	AZALIA_SUBVENDOR(0, 0x10ec0269),
- 	AZALIA_PIN_CFG(0, 0x12, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x14, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x15, 0x02211010), /* Jack analog out */
- 	AZALIA_PIN_CFG(0, 0x17, 0x411111f0), /* NC */
-	AZALIA_PIN_CFG(0, 0x18, 0x02a11020), /* Jack analog mic */
-+	AZALIA_PIN_CFG(0, 0x18, 0x02a11120), /* Jack analog mic, no presence detect */
- 	AZALIA_PIN_CFG(0, 0x19, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x1a, 0x411111f0), /* NC */
- 	AZALIA_PIN_CFG(0, 0x1b, 0x411111f0), /* NC */
-- 
-2.30.2
-
--- a/patches/coreboot-4.17/0001-soc-skylake-me.c-Print-status-regardless-of-device-e.patch
+++ b/patches/coreboot-4.17/0001-soc-skylake-me.c-Print-status-regardless-of-device-e.patch
@ -1,36 +0,0 @@
-From 74c443f9474245c28edddc0847d89ea4c82ba0b2 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Mon, 18 May 2020 14:02:27 -0500
-Subject: [PATCH 1/3] soc/skylake/me.c: Print status regardless of device
- enable state
-
-Checking the CSE device status before printing means it will skip
-printing for devices with the ME disabled, leaving the user no easy
-way to verify the ME is properly disabled. Remove the check.
-
-Test: build/boot Librem 13v4, verify ME status printed as expected
-on device with disabled/neutered ME.
-
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
-Change-Id: Iaa4f4a369d878a52136c3479027443ea4e731a36
---
- src/soc/intel/skylake/me.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/src/soc/intel/skylake/me.c b/src/soc/intel/skylake/me.c
-index 89491f89c3..08aceb3f83 100644
--- a/src/soc/intel/skylake/me.c
-+++ b/src/soc/intel/skylake/me.c
-@@ -188,9 +188,6 @@ void intel_me_status(void)
- 	union me_hfsts3 hfs3;
- 	union me_hfsts6 hfs6;
- 
-	if (!is_cse_enabled())
-		return;
-
- 	hfs1.data = me_read_config32(PCI_ME_HFSTS1);
- 	hfs2.data = me_read_config32(PCI_ME_HFSTS2);
- 	hfs3.data = me_read_config32(PCI_ME_HFSTS3);
-- 
-2.25.1
-
--- a/patches/coreboot-4.17/0002-soc-cannonlake-me.c-Print-status-regardless-of-devic.patch
+++ b/patches/coreboot-4.17/0002-soc-cannonlake-me.c-Print-status-regardless-of-devic.patch
@ -1,36 +0,0 @@
-From 5d905d79d5c6ac8fc8814d0baea1522f50ed48f9 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Fri, 19 Jun 2020 17:02:22 -0500
-Subject: [PATCH 2/3] soc/cannonlake/me.c: Print status regardless of device
- enable state
-
-Checking the CSE device status before printing means it will skip
-printing for devices with the ME disabled, leaving the user no easy
-way to verify the ME is properly disabled. Remove the check.
-
-Test: build/boot Librem Mini, verify ME status printed as expected
-on device with disabled/neutered ME.
-
-Change-Id: I939333199aa699039fec727beb094e4eb2ad7149
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- src/soc/intel/cannonlake/me.c | 3 ---
- 1 file changed, 3 deletions(-)
-
-diff --git a/src/soc/intel/cannonlake/me.c b/src/soc/intel/cannonlake/me.c
-index 7bbe1ae730..4fe5a96ade 100644
--- a/src/soc/intel/cannonlake/me.c
-+++ b/src/soc/intel/cannonlake/me.c
-@@ -103,9 +103,6 @@ void dump_me_status(void *unused)
- 	union me_hfsts5 hfsts5;
- 	union me_hfsts6 hfsts6;
- 
-	if (!is_cse_enabled())
-		return;
-
- 	hfsts1.data = me_read_config32(PCI_ME_HFSTS1);
- 	hfsts2.data = me_read_config32(PCI_ME_HFSTS2);
- 	hfsts3.data = me_read_config32(PCI_ME_HFSTS3);
-- 
-2.25.1
-
--- a/patches/coreboot-4.17/0003-x86-Zero-unused-part-of-SMBIOS-region.patch
+++ b/patches/coreboot-4.17/0003-x86-Zero-unused-part-of-SMBIOS-region.patch
@ -1,34 +0,0 @@
-From 517c2ad54bfc44b984457ca30c34410487eb2be9 Mon Sep 17 00:00:00 2001
-From: Jonathon Hall <jonathon.hall@puri.sm>
-Date: Wed, 27 Jul 2022 09:45:40 -0400
-Subject: [PATCH 3/3] x86: Zero unused part of SMBIOS region
-
-Since SMBIOS was increased from 4K to 32K, the unused region could include
-parts of the ACPI region from a prior boot, which may confuse the OS if it
-finds remanent table signatures.
-
-Change-Id: I0ebac7c70a6887c6d3380702d242618e86e84185
-Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
---
- src/arch/x86/tables.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
-diff --git a/src/arch/x86/tables.c b/src/arch/x86/tables.c
-index 8d2f7b6f20..282dfc58a8 100644
--- a/src/arch/x86/tables.c
-+++ b/src/arch/x86/tables.c
-@@ -151,6 +151,11 @@ static unsigned long write_smbios_table(unsigned long rom_table_end)
- 
- 		new_high_table_pointer =
- 			smbios_write_tables(high_table_pointer);
-+		/* Clear the unused part of the region, in case other table
-+		 * signatures could be present from a prior boot
-+		 */
-+		memset((void *)new_high_table_pointer, 0, high_table_pointer +
-+			MAX_SMBIOS_SIZE - new_high_table_pointer);
- 		rom_table_end = ALIGN_UP(rom_table_end, 16);
- 		memcpy((void *)rom_table_end, (void *)high_table_pointer,
- 			sizeof(struct smbios_entry));
-- 
-2.25.1
-
--- a/patches/coreboot-4.17/0004-acpi-unix2-mirror.patch
+++ b/patches/coreboot-4.17/0004-acpi-unix2-mirror.patch
@ -1,32 +0,0 @@
-From 8093bd4df682a49ab87845e4154e87885ad41734 Mon Sep 17 00:00:00 2001
-From: Jonathon Hall <jonathon.hall@puri.sm>
-Date: Tue, 11 Jul 2023 14:48:33 -0400
-Subject: [PATCH] util/crossgcc/buildgcc: Use different mirror
-
-acpica.org now redirects to Intel and all the links no longer work.
-
-Intel has a mirror of this archive, use it.
-
-Change-Id: I4fbfe33a4614aec97c631904d78ec391ed438bec
-Signed-off-by: Jonathon Hall <jonathon.hall@puri.sm>
---
- util/crossgcc/buildgcc | 3 ++-
- 1 file changed, 2 insertions(+), 1 deletion(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index b25b260807..24916c5ab8 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -52,7 +52,8 @@ MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
- MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
- GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
- BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
-IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+# acpica.org links rotted, use Intel mirror for 20220331
-+IASL_ARCHIVE="https://downloadmirror.intel.com/774879/acpica-unix2-${IASL_VERSION}.tar.gz"
- # CLANG toolchain archive locations
- LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
- CLANG_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/clang-${CLANG_VERSION}.src.tar.xz"
-- 
-2.30.2
-
--- a/patches/coreboot-4.8.1/0000-measuredboot.patch
+++ b/patches/coreboot-4.8.1/0000-measuredboot.patch
@ -1,476 +0,0 @@
-diff --git ./src/Kconfig ./src/Kconfig
-index 99a704d..004b4a7 100644
--- ./src/Kconfig
-+++ ./src/Kconfig
-@@ -260,6 +260,21 @@ config BOOTSPLASH_FILE
- 	  The path and filename of the file to use as graphical bootsplash
- 	  screen. The file format has to be jpg.
- 
-+config MEASURED_BOOT
-+	bool "Enable TPM measured boot"
-+	default n
-+	select TPM
-+	depends on MAINBOARD_HAS_LPC_TPM
-+	depends on !VBOOT
-+	help
-+	  Enable this option to measure the bootblock, romstage and
-+	  CBFS files into TPM PCRs.  This does not verify these values
-+	  (that is the job of something like vboot), but makes it possible
-+	  for the payload to validate the boot path and allow something
-+	  like Heads to attest to the user that the system is likely safe.
-+
-+	  You probably want to say N.
-+
- endmenu
- 
- menu "Mainboard"
-diff --git ./src/drivers/pc80/tpm/romstage.c ./src/drivers/pc80/tpm/romstage.c
-index b8e4705..7732e66 100644
--- ./src/drivers/pc80/tpm/romstage.c
-+++ ./src/drivers/pc80/tpm/romstage.c
-@@ -48,6 +48,12 @@ static const struct {
- 
- static const struct {
- 	u8 buffer[12];
-+} tpm2_startup_cmd = {
-+	{0x80, 0x01, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x01, 0x44, 0x0, 0x0 }
-+};
-+
-+static const struct {
-+	u8 buffer[12];
- } tpm_deactivate_cmd = {
- 	{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x3 }
- };
-@@ -229,9 +235,15 @@ void init_tpm(int s3resume)
- 			return;
- 		}
- 	} else {
-		printk(BIOS_SPEW, "TPM: Startup\n");
-		result = TlclSendReceive(tpm_startup_cmd.buffer,
-					response, sizeof(response));
-+		if (IS_ENABLED(CONFIG_TPM2)) {
-+			printk(BIOS_SPEW, "TPM2: Startup\n");
-+			result = TlclSendReceive(tpm2_startup_cmd.buffer,
-+						response, sizeof(response));
-+		} else {
-+			printk(BIOS_SPEW, "TPM: Startup\n");
-+			result = TlclSendReceive(tpm_startup_cmd.buffer,
-+						response, sizeof(response));
-+		}
- 	}
- 
- 	tis_close();
-diff --git ./src/drivers/pc80/tpm/tis.c ./src/drivers/pc80/tpm/tis.c
-index 3549173..11fc027 100644
--- ./src/drivers/pc80/tpm/tis.c
-+++ ./src/drivers/pc80/tpm/tis.c
-@@ -125,10 +125,11 @@ static const struct device_name atmel_devices[] = {
- 
- static const struct device_name infineon_devices[] = {
- 	{0x000b, "SLB9635 TT 1.2"},
-	{0x001a, "SLB9660 TT 1.2"},
- #if IS_ENABLED(CONFIG_TPM2)
-+	{0x001a, "SLB9665 TT 2.0"},
- 	{0x001b, "SLB9670 TT 2.0"},
- #else
-+	{0x001a, "SLB9660 TT 1.2"},
- 	{0x001b, "SLB9670 TT 1.2"},
- #endif
- 	{0xffff}
-diff --git ./src/include/program_loading.h ./src/include/program_loading.h
-index 7aba302..879c26e 100644
--- ./src/include/program_loading.h
-+++ ./src/include/program_loading.h
-@@ -24,6 +24,8 @@ enum {
- 	/* Last segment of program. Can be used to take different actions for
- 	 * cache maintenance of a program load. */
- 	SEG_FINAL = 1 << 0,
-+	/* Indicate that the program segment should not be measured */
-+	SEG_NO_MEASURE = 1 << 1,
- };
- 
- // The prog_type is a bit mask, so that in searches one can find, e.g.,
-diff --git ./src/lib/cbfs.c ./src/lib/cbfs.c
-index 87ab387..708d321 100644
--- ./src/lib/cbfs.c
-+++ ./src/lib/cbfs.c
-@@ -70,7 +70,13 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
- 	if (size != NULL)
- 		*size = fsize;
- 
-	return rdev_mmap(&fh.data, 0, fsize);
-+	void * buffer = rdev_mmap(&fh.data, 0, fsize);
-+
-+#ifndef __SMM__
-+	prog_segment_loaded((uintptr_t)buffer, fsize, 0);
-+#endif
-+
-+	return buffer;
- }
- 
- int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
-@@ -98,7 +104,8 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
- 			return 0;
- 		if (rdev_readat(rdev, buffer, offset, in_size) != in_size)
- 			return 0;
-		return in_size;
-+		out_size = in_size;
-+		break;
- 
- 	case CBFS_COMPRESS_LZ4:
- 		if ((ENV_BOOTBLOCK || ENV_VERSTAGE) &&
-@@ -116,7 +123,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
- 		timestamp_add_now(TS_START_ULZ4F);
- 		out_size = ulz4fn(compr_start, in_size, buffer, buffer_size);
- 		timestamp_add_now(TS_END_ULZ4F);
-		return out_size;
-+		break;
- 
- 	case CBFS_COMPRESS_LZMA:
- 		if (ENV_BOOTBLOCK || ENV_VERSTAGE)
-@@ -135,11 +142,15 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
- 
- 		rdev_munmap(rdev, map);
- 
-		return out_size;
-+		break;
- 
- 	default:
- 		return 0;
- 	}
-+
-+	prog_segment_loaded((uintptr_t)buffer, out_size, 0);
-+
-+	return out_size;
- }
- 
- static inline int tohex4(unsigned int c)
-diff --git ./src/lib/hardwaremain.c ./src/lib/hardwaremain.c
-index 6fd55d7..b5b7d91 100644
--- ./src/lib/hardwaremain.c
-+++ ./src/lib/hardwaremain.c
-@@ -33,6 +33,7 @@
- #include <reset.h>
- #include <boot/tables.h>
- #include <program_loading.h>
-+#include <security/tpm/tss.h>
- #include <lib.h>
- #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
- #include <arch/acpi.h>
-@@ -545,3 +546,13 @@ void boot_state_current_unblock(void)
- {
- 	boot_state_unblock(current_phase.state_id, current_phase.seq);
- }
-+
-+// ramstage measurements go into PCR3 if we are doing measured boot
-+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
-+{
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE))
-+	{
-+		tlcl_measure(2, (const void*) start, size);
-+	}
-+}
-+
-diff --git ./src/lib/rmodule.c ./src/lib/rmodule.c
-index 66d5120..b50afe7 100644
--- ./src/lib/rmodule.c
-+++ ./src/lib/rmodule.c
-@@ -198,7 +198,7 @@ int rmodule_load(void *base, struct rmodule *module)
- 	rmodule_clear_bss(module);
- 
- 	prog_segment_loaded((uintptr_t)module->location,
-				rmodule_memory_size(module), SEG_FINAL);
-+				rmodule_memory_size(module), SEG_FINAL | SEG_NO_MEASURE);
- 
- 	return 0;
- }
-diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
-index 2385635..0743a84 100644
--- ./src/security/tpm/Makefile.inc
-+++ ./src/security/tpm/Makefile.inc
-@@ -4,6 +4,15 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
- verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
- verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
- 
-+ifeq ($(CONFIG_MEASURED_BOOT),y)
-+ifneq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
-+romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
-+endif
-+romstage-$(CONFIG_TPM) += sha1.c
-+ramstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
-+ramstage-$(CONFIG_TPM) += sha1.c
-+endif # CONFIG_MEASURED_BOOT
-+
- ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
- romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
- romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
-diff --git ./src/security/tpm/sha1.c ./src/security/tpm/sha1.c
-new file mode 100644
-index 0000000..6b154f8
--- /dev/null
-+++ ./src/security/tpm/sha1.c
-@@ -0,0 +1,175 @@
-+/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved.
-+ * Use of this source code is governed by a BSD-style license that can be
-+ * found in the LICENSE file.
-+ *
-+ * SHA-1 implementation largely based on libmincrypt in the the Android
-+ * Open Source Project (platorm/system/core.git/libmincrypt/sha.c
-+ */
-+
-+#include <security/tpm/sha1.h>
-+#include <string.h>
-+
-+static uint32_t ror27(uint32_t val)
-+{
-+	return (val >> 27) | (val << 5);
-+}
-+static uint32_t ror2(uint32_t val)
-+{
-+	return (val >> 2) | (val << 30);
-+}
-+static uint32_t ror31(uint32_t val)
-+{
-+	return (val >> 31) | (val << 1);
-+}
-+
-+static void sha1_transform(struct sha1_ctx *ctx)
-+{
-+	uint32_t W[80];
-+	register uint32_t A, B, C, D, E;
-+	int t;
-+
-+	A = ctx->state[0];
-+	B = ctx->state[1];
-+	C = ctx->state[2];
-+	D = ctx->state[3];
-+	E = ctx->state[4];
-+
-+#define SHA_F1(A, B, C, D, E, t)					\
-+	E += ror27(A) +							\
-+			(W[t] = __builtin_bswap32(ctx->buf.w[t])) +	\
-+			(D^(B&(C^D))) + 0x5A827999;			\
-+	B = ror2(B);
-+
-+	for (t = 0; t < 15; t += 5) {
-+		SHA_F1(A, B, C, D, E, t + 0);
-+		SHA_F1(E, A, B, C, D, t + 1);
-+		SHA_F1(D, E, A, B, C, t + 2);
-+		SHA_F1(C, D, E, A, B, t + 3);
-+		SHA_F1(B, C, D, E, A, t + 4);
-+	}
-+	SHA_F1(A, B, C, D, E, t + 0);  /* 16th one, t == 15 */
-+
-+#undef SHA_F1
-+
-+#define SHA_F1(A, B, C, D, E, t)					      \
-+	E += ror27(A) +							      \
-+			(W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
-+			(D^(B&(C^D))) + 0x5A827999;			      \
-+	B = ror2(B);
-+
-+	SHA_F1(E, A, B, C, D, t + 1);
-+	SHA_F1(D, E, A, B, C, t + 2);
-+	SHA_F1(C, D, E, A, B, t + 3);
-+	SHA_F1(B, C, D, E, A, t + 4);
-+
-+#undef SHA_F1
-+
-+#define SHA_F2(A, B, C, D, E, t)					      \
-+	E += ror27(A) +							      \
-+			(W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
-+			(B^C^D) + 0x6ED9EBA1;				      \
-+	B = ror2(B);
-+
-+	for (t = 20; t < 40; t += 5) {
-+		SHA_F2(A, B, C, D, E, t + 0);
-+		SHA_F2(E, A, B, C, D, t + 1);
-+		SHA_F2(D, E, A, B, C, t + 2);
-+		SHA_F2(C, D, E, A, B, t + 3);
-+		SHA_F2(B, C, D, E, A, t + 4);
-+	}
-+
-+#undef SHA_F2
-+
-+#define SHA_F3(A, B, C, D, E, t)					      \
-+	E += ror27(A) +							      \
-+			(W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
-+			((B&C)|(D&(B|C))) + 0x8F1BBCDC;			      \
-+	B = ror2(B);
-+
-+	for (; t < 60; t += 5) {
-+		SHA_F3(A, B, C, D, E, t + 0);
-+		SHA_F3(E, A, B, C, D, t + 1);
-+		SHA_F3(D, E, A, B, C, t + 2);
-+		SHA_F3(C, D, E, A, B, t + 3);
-+		SHA_F3(B, C, D, E, A, t + 4);
-+	}
-+
-+#undef SHA_F3
-+
-+#define SHA_F4(A, B, C, D, E, t)					      \
-+	E += ror27(A) +							      \
-+			(W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
-+			(B^C^D) + 0xCA62C1D6;				      \
-+	B = ror2(B);
-+
-+	for (; t < 80; t += 5) {
-+		SHA_F4(A, B, C, D, E, t + 0);
-+		SHA_F4(E, A, B, C, D, t + 1);
-+		SHA_F4(D, E, A, B, C, t + 2);
-+		SHA_F4(C, D, E, A, B, t + 3);
-+		SHA_F4(B, C, D, E, A, t + 4);
-+	}
-+
-+#undef SHA_F4
-+
-+	ctx->state[0] += A;
-+	ctx->state[1] += B;
-+	ctx->state[2] += C;
-+	ctx->state[3] += D;
-+	ctx->state[4] += E;
-+}
-+
-+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len)
-+{
-+	int i = ctx->count % sizeof(ctx->buf);
-+	const uint8_t *p = (const uint8_t *)data;
-+
-+	ctx->count += len;
-+
-+	while (len > sizeof(ctx->buf) - i) {
-+		memcpy(&ctx->buf.b[i], p, sizeof(ctx->buf) - i);
-+		len -= sizeof(ctx->buf) - i;
-+		p += sizeof(ctx->buf) - i;
-+		sha1_transform(ctx);
-+		i = 0;
-+	}
-+
-+	while (len--) {
-+		ctx->buf.b[i++] = *p++;
-+		if (i == sizeof(ctx->buf)) {
-+			sha1_transform(ctx);
-+			i = 0;
-+		}
-+	}
-+}
-+
-+
-+uint8_t *sha1_final(struct sha1_ctx *ctx)
-+{
-+	uint32_t cnt = ctx->count * 8;
-+	int i;
-+
-+	sha1_update(ctx, (uint8_t *)"\x80", 1);
-+	while ((ctx->count % sizeof(ctx->buf)) != (sizeof(ctx->buf) - 8))
-+		sha1_update(ctx, (uint8_t *)"\0", 1);
-+
-+	for (i = 0; i < 8; ++i) {
-+		uint8_t tmp = cnt >> ((7 - i) * 8);
-+		sha1_update(ctx, &tmp, 1);
-+	}
-+
-+	for (i = 0; i < 5; i++)
-+		ctx->buf.w[i] = __builtin_bswap32(ctx->state[i]);
-+
-+	return ctx->buf.b;
-+}
-+
-+void sha1_init(struct sha1_ctx *ctx)
-+{
-+	ctx->state[0] = 0x67452301;
-+	ctx->state[1] = 0xEFCDAB89;
-+	ctx->state[2] = 0x98BADCFE;
-+	ctx->state[3] = 0x10325476;
-+	ctx->state[4] = 0xC3D2E1F0;
-+	ctx->count = 0;
-+}
-diff --git ./src/security/tpm/sha1.h ./src/security/tpm/sha1.h
-new file mode 100644
-index 0000000..e7e28e6
--- /dev/null
-+++ ./src/security/tpm/sha1.h
-@@ -0,0 +1,31 @@
-+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
-+ * Use of this source code is governed by a BSD-style license that can be
-+ * found in the LICENSE file.
-+ */
-+
-+/* SHA-1 functions */
-+
-+#ifndef _sha1_h_
-+#define _sha1_h_
-+
-+#include <stdint.h>
-+#include <commonlib/helpers.h>
-+
-+#define SHA1_DIGEST_SIZE 20
-+#define SHA1_BLOCK_SIZE 64
-+
-+/* SHA-1 context */
-+struct sha1_ctx {
-+	uint32_t count;
-+	uint32_t state[5];
-+	union {
-+		uint8_t b[SHA1_BLOCK_SIZE];
-+		uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))];
-+	} buf;
-+};
-+
-+void sha1_init(struct sha1_ctx *ctx);
-+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len);
-+uint8_t *sha1_final(struct sha1_ctx *ctx);
-+
-+#endif  /* _sha1_h_ */
-diff --git ./src/security/tpm/tss.h ./src/security/tpm/tss.h
-index 8f3f1cb..5c569cb 100644
--- ./src/security/tpm/tss.h
-+++ ./src/security/tpm/tss.h
-@@ -147,6 +147,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
- 		     uint8_t *out_digest);
- 
- /**
-+ * Perform a SHA1 hash on a region and extend a PCR with the hash.
-+ */
-+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len);
-+
-+/**
-  * Get the entire set of permanent flags.
-  */
- uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags);
-diff --git ./src/security/tpm/tss/tcg-1.2/tss.c ./src/security/tpm/tss/tcg-1.2/tss.c
-index 161d29f..95e55b9 100644
--- ./src/security/tpm/tss/tcg-1.2/tss.c
-+++ ./src/security/tpm/tss/tcg-1.2/tss.c
-@@ -17,6 +17,7 @@
- #include <arch/early_variables.h>
- #include <assert.h>
- #include <string.h>
-+#include <security/tpm/sha1.h>
- #include <security/tpm/tis.h>
- #include <vb2_api.h>
- #include <security/tpm/tss.h>
-@@ -354,3 +355,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
- 		       kPcrDigestLength);
- 	return result;
- }
-+
-+
-+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len)
-+{
-+	VBDEBUG("TPM: pcr %d measure %p @ %zu: ", pcr_num, start, len);
-+
-+	struct sha1_ctx sha;
-+	sha1_init(&sha);
-+	sha1_update(&sha, start, len);
-+
-+	const uint8_t * hash = sha1_final(&sha);
-+	for(unsigned i = 0 ; i < SHA1_DIGEST_SIZE ; i++)
-+		VBDEBUG("%02x", hash[i]);
-+	VBDEBUG("\n");
-+
-+	//hexdump(start, 128);
-+
-+	return tlcl_extend(pcr_num, hash, NULL);
-+}
-+
--- a/patches/coreboot-4.8.1/0001-mb-purism-librem_skl-add-support-for-13v4-15v4-board.patch
+++ b/patches/coreboot-4.8.1/0001-mb-purism-librem_skl-add-support-for-13v4-15v4-board.patch
@ -1,92 +0,0 @@
-From f45b4209ecbd231e3f5077eb90ce29bdc83bd6b3 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@puri.sm>
-Date: Fri, 18 Jan 2019 22:57:33 -0600
-Subject: [PATCH 1/2] mb/purism/librem_skl: add support for 13v4/15v4 boards
-
-Add support for Kabylake Librem 13v4/15v4 boards, reusing existing 13v2/15v3
-variants since board design unchanged (only SoC).
-Adjust identification strings, add Kabylake VGA PCI ID.
-
-Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
- src/mainboard/purism/librem_skl/Kconfig      | 16 +++++++++++++---
- src/mainboard/purism/librem_skl/Kconfig.name |  8 ++++++++
- 2 files changed, 21 insertions(+), 3 deletions(-)
-
-diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig
-index bbb6b7443f..36fe04da06 100644
--- a/src/mainboard/purism/librem_skl/Kconfig
-+++ b/src/mainboard/purism/librem_skl/Kconfig
-@@ -25,6 +25,8 @@ config VARIANT_DIR
- 	string
- 	default "librem13v2" if BOARD_PURISM_LIBREM13_V2
- 	default "librem15v3" if BOARD_PURISM_LIBREM15_V3
-+	default "librem13v2" if BOARD_PURISM_LIBREM13_V4
-+	default "librem15v3" if BOARD_PURISM_LIBREM15_V4
- 
- config MAINBOARD_VENDOR
- 	string
-@@ -34,16 +36,22 @@ config MAINBOARD_FAMILY
- 	string
- 	default "Librem 13" if BOARD_PURISM_LIBREM13_V2
- 	default "Librem 15" if BOARD_PURISM_LIBREM15_V3
-+	default "Librem 13" if BOARD_PURISM_LIBREM13_V4
-+	default "Librem 15" if BOARD_PURISM_LIBREM15_V4
- 
- config MAINBOARD_PART_NUMBER
- 	string
- 	default "Librem 13 v2" if BOARD_PURISM_LIBREM13_V2
- 	default "Librem 15 v3" if BOARD_PURISM_LIBREM15_V3
-+	default "Librem 13 v4" if BOARD_PURISM_LIBREM13_V4
-+	default "Librem 15 v4" if BOARD_PURISM_LIBREM15_V4
- 
- config MAINBOARD_VERSION
- 	string
- 	default "2.0" if BOARD_PURISM_LIBREM13_V2
- 	default "3.0" if BOARD_PURISM_LIBREM15_V3
-+	default "4.0" if BOARD_PURISM_LIBREM13_V4
-+	default "4.0" if BOARD_PURISM_LIBREM15_V4
- 
- config MAINBOARD_DIR
- 	string
-@@ -51,8 +59,7 @@ config MAINBOARD_DIR
- 
- config DEVICETREE
- 	string
-	default "variants/librem13v2/devicetree.cb" if BOARD_PURISM_LIBREM13_V2
-	default "variants/librem15v3/devicetree.cb" if BOARD_PURISM_LIBREM15_V3
-+	default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
- 
- config MAX_CPUS
- 	int
-@@ -66,7 +73,10 @@ config NO_POST
- 
- config VGA_BIOS_ID
- 	string
-	default "8086,1916"
-+	default "8086,1916" if BOARD_PURISM_LIBREM13_V2
-+	default "8086,1916" if BOARD_PURISM_LIBREM15_V3
-+	default "8086,5916" if BOARD_PURISM_LIBREM13_V4
-+	default "8086,5916" if BOARD_PURISM_LIBREM15_V4
- 
- config DIMM_MAX
- 	int
-diff --git a/src/mainboard/purism/librem_skl/Kconfig.name b/src/mainboard/purism/librem_skl/Kconfig.name
-index 3f43f68752..6a66e45950 100644
--- a/src/mainboard/purism/librem_skl/Kconfig.name
-+++ b/src/mainboard/purism/librem_skl/Kconfig.name
-@@ -5,3 +5,11 @@ config BOARD_PURISM_LIBREM13_V2
- config BOARD_PURISM_LIBREM15_V3
- 	bool "Librem 15 v3"
- 	select BOARD_PURISM_BASEBOARD_LIBREM_SKL
-+
-+config BOARD_PURISM_LIBREM13_V4
-+	bool "Librem 13 v4"
-+	select BOARD_PURISM_BASEBOARD_LIBREM_SKL
-+
-+config BOARD_PURISM_LIBREM15_V4
-+	bool "Librem 15 v4"
-+	select BOARD_PURISM_BASEBOARD_LIBREM_SKL
-- 
-2.19.1
-
--- a/patches/coreboot-4.8.1/0002-arch-x86-acpi-Add-DMAR-RMRR-helper-functions.patch
+++ b/patches/coreboot-4.8.1/0002-arch-x86-acpi-Add-DMAR-RMRR-helper-functions.patch
@ -1,357 +0,0 @@
-From e40c2710e715fc7fed344189227bd048652268f1 Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@gmail.com>
-Date: Thu, 29 Mar 2018 14:59:57 +0200
-Subject: [PATCH 2/2] arch/x86/acpi: Add DMAR RMRR helper functions
-
-Add DMAR RMRR table entry and helper functions, using the existing
-DRHD functions as a model. As the DRHD device scope (DS) functions
-aren't DRHD-specific, genericize them to be used with RMRR tables as
-well. Correct DRHD bar size to match table entry in creator function,
-as noted in comments from patchset below.
-
-Adapted from/supersedes https://review.coreboot.org/25445
-
-Change-Id: I912b1d7244ca4dd911bb6629533d453b1b4a06be
-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
-Reviewed-on: https://review.coreboot.org/27269
-Reviewed-by: Youness Alaoui <snifikino@gmail.com>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
-Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
- src/arch/x86/acpi.c                      | 40 ++++++++++++++++++------
- src/arch/x86/include/arch/acpi.h         | 22 ++++++++++---
- src/northbridge/intel/gm45/acpi.c        | 14 ++++-----
- src/northbridge/intel/haswell/acpi.c     |  6 ++--
- src/northbridge/intel/sandybridge/acpi.c |  8 ++---
- src/soc/intel/broadwell/acpi.c           |  6 ++--
- src/soc/intel/fsp_broadwell_de/acpi.c    |  8 ++---
- src/soc/intel/skylake/acpi.c             |  6 ++--
- 8 files changed, 71 insertions(+), 39 deletions(-)
-
-diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
-index 8b6b2c1d28..60d2879219 100644
--- a/src/arch/x86/acpi.c
-+++ b/src/arch/x86/acpi.c
-@@ -449,7 +449,7 @@ void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
- }
- 
- unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
-	u16 segment, u32 bar)
-+	u16 segment, u64 bar)
- {
- 	dmar_entry_t *drhd = (dmar_entry_t *)current;
- 	memset(drhd, 0, sizeof(*drhd));
-@@ -462,6 +462,20 @@ unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
- 	return drhd->length;
- }
- 
-+unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
-+				    u64 bar, u64 limit)
-+{
-+	dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)current;
-+	memset(rmrr, 0, sizeof(*rmrr));
-+	rmrr->type = DMAR_RMRR;
-+	rmrr->length = sizeof(*rmrr); /* will be fixed up later */
-+	rmrr->segment = segment;
-+	rmrr->bar = bar;
-+	rmrr->limit = limit;
-+
-+	return rmrr->length;
-+}
-+
- unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
- 	u16 segment)
- {
-@@ -481,13 +495,19 @@ void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current)
- 	drhd->length = current - base;
- }
- 
-+void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current)
-+{
-+	dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)base;
-+	rmrr->length = current - base;
-+}
-+
- void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current)
- {
- 	dmar_atsr_entry_t *atsr = (dmar_atsr_entry_t *)base;
- 	atsr->length = current - base;
- }
- 
-static unsigned long acpi_create_dmar_drhd_ds(unsigned long current,
-+static unsigned long acpi_create_dmar_ds(unsigned long current,
- 	enum dev_scope_type type, u8 enumeration_id, u8 bus, u8 dev, u8 fn)
- {
- 	/* we don't support longer paths yet */
-@@ -505,31 +525,31 @@ static unsigned long acpi_create_dmar_drhd_ds(unsigned long current,
- 	return ds->length;
- }
- 
-unsigned long acpi_create_dmar_drhd_ds_pci_br(unsigned long current, u8 bus,
-+unsigned long acpi_create_dmar_ds_pci_br(unsigned long current, u8 bus,
- 	u8 dev, u8 fn)
- {
-	return acpi_create_dmar_drhd_ds(current,
-+	return acpi_create_dmar_ds(current,
- 			SCOPE_PCI_SUB, 0, bus, dev, fn);
- }
- 
-unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current, u8 bus,
-+unsigned long acpi_create_dmar_ds_pci(unsigned long current, u8 bus,
- 	u8 dev, u8 fn)
- {
-	return acpi_create_dmar_drhd_ds(current,
-+	return acpi_create_dmar_ds(current,
- 			SCOPE_PCI_ENDPOINT, 0, bus, dev, fn);
- }
- 
-unsigned long acpi_create_dmar_drhd_ds_ioapic(unsigned long current,
-+unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
- 	u8 enumeration_id, u8 bus, u8 dev, u8 fn)
- {
-	return acpi_create_dmar_drhd_ds(current,
-+	return acpi_create_dmar_ds(current,
- 			SCOPE_IOAPIC, enumeration_id, bus, dev, fn);
- }
- 
-unsigned long acpi_create_dmar_drhd_ds_msi_hpet(unsigned long current,
-+unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
- 	u8 enumeration_id, u8 bus, u8 dev, u8 fn)
- {
-	return acpi_create_dmar_drhd_ds(current,
-+	return acpi_create_dmar_ds(current,
- 			SCOPE_MSI_HPET, enumeration_id, bus, dev, fn);
- }
- 
-diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
-index 5480834eb2..5be2e6399e 100644
--- a/src/arch/x86/include/arch/acpi.h
-+++ b/src/arch/x86/include/arch/acpi.h
-@@ -331,6 +331,15 @@ typedef struct dmar_entry {
- 	u64 bar;
- } __packed dmar_entry_t;
- 
-+typedef struct dmar_rmrr_entry {
-+	u16 type;
-+	u16 length;
-+	u16 reserved;
-+	u16 segment;
-+	u64 bar;
-+	u64 limit;
-+} __packed dmar_rmrr_entry_t;
-+
- typedef struct dmar_atsr_entry {
- 	u16 type;
- 	u16 length;
-@@ -738,19 +747,22 @@ unsigned long acpi_write_dbg2_pci_uart(acpi_rsdp_t *rsdp, unsigned long current,
- void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
- 		      unsigned long (*acpi_fill_dmar)(unsigned long));
- unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
-				    u16 segment, u32 bar);
-+				    u16 segment, u64 bar);
-+unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
-+				    u64 bar, u64 limit);
- unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
- 				    u16 segment);
- void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current);
-+void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current);
- void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current);
-unsigned long acpi_create_dmar_drhd_ds_pci_br(unsigned long current,
-+unsigned long acpi_create_dmar_ds_pci_br(unsigned long current,
- 					   u8 bus, u8 dev, u8 fn);
-unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current,
-+unsigned long acpi_create_dmar_ds_pci(unsigned long current,
- 					   u8 bus, u8 dev, u8 fn);
-unsigned long acpi_create_dmar_drhd_ds_ioapic(unsigned long current,
-+unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
- 					      u8 enumeration_id,
- 					      u8 bus, u8 dev, u8 fn);
-unsigned long acpi_create_dmar_drhd_ds_msi_hpet(unsigned long current,
-+unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
- 						u8 enumeration_id,
- 						u8 bus, u8 dev, u8 fn);
- void acpi_write_hest(acpi_hest_t *hest,
-diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
-index 73b098f610..d208eed4ab 100644
--- a/src/northbridge/intel/gm45/acpi.c
-+++ b/src/northbridge/intel/gm45/acpi.c
-@@ -78,24 +78,24 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 
- 	unsigned long tmp = current;
- 	current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
-	current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x1b, 0);
-+	current += acpi_create_dmar_ds_pci(current, 0, 0x1b, 0);
- 	acpi_dmar_drhd_fixup(tmp, current);
- 
- 	if (stepping != STEPPING_B2) {
- 		tmp = current;
- 		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE2);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 0);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 1);
-+		current += acpi_create_dmar_ds_pci(current, 0, 0x2, 0);
-+		current += acpi_create_dmar_ds_pci(current, 0, 0x2, 1);
- 		acpi_dmar_drhd_fixup(tmp, current);
- 	}
- 
- 	if (me_active) {
- 		tmp = current;
- 		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE3);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 0);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 1);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 2);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 3);
-+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 0);
-+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 1);
-+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 2);
-+		current += acpi_create_dmar_ds_pci(current, 0, 0x3, 3);
- 		acpi_dmar_drhd_fixup(tmp, current);
- 	}
- 
-diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
-index 9d76ba8ce2..3cd3bc0730 100644
--- a/src/northbridge/intel/haswell/acpi.c
-+++ b/src/northbridge/intel/haswell/acpi.c
-@@ -85,7 +85,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 		const unsigned long tmp = current;
- 
- 		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
-+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
- 
- 		acpi_dmar_drhd_fixup(tmp, current);
- 	}
-@@ -95,11 +95,11 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 		const unsigned long tmp = current;
- 		current += acpi_create_dmar_drhd(current,
- 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
-		current += acpi_create_dmar_drhd_ds_ioapic(current,
-+		current += acpi_create_dmar_ds_ioapic(current,
- 				2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
- 		size_t i;
- 		for (i = 0; i < 8; ++i)
-			current += acpi_create_dmar_drhd_ds_msi_hpet(current,
-+			current += acpi_create_dmar_ds_msi_hpet(current,
- 					0, PCH_HPET_PCI_BUS,
- 					PCH_HPET_PCI_SLOT, i);
- 		acpi_dmar_drhd_fixup(tmp, current);
-diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
-index 91ecac5956..88ac2b1e38 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
-+++ b/src/northbridge/intel/sandybridge/acpi.c
-@@ -74,19 +74,19 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 	if (igfx && igfx->enabled) {
- 		const unsigned long tmp = current;
- 		current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 1);
-+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
-+		current += acpi_create_dmar_ds_pci(current, 0, 2, 1);
- 		acpi_dmar_drhd_fixup(tmp, current);
- 	}
- 
- 	const unsigned long tmp = current;
- 	current += acpi_create_dmar_drhd(current,
- 			DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE2);
-	current += acpi_create_dmar_drhd_ds_ioapic(current,
-+	current += acpi_create_dmar_ds_ioapic(current,
- 			2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
- 	size_t i;
- 	for (i = 0; i < 8; ++i)
-		current += acpi_create_dmar_drhd_ds_msi_hpet(current,
-+		current += acpi_create_dmar_ds_msi_hpet(current,
- 				0, PCH_HPET_PCI_BUS, PCH_HPET_PCI_SLOT, i);
- 	acpi_dmar_drhd_fixup(tmp, current);
- 
-diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
-index 162542fe3e..a1df089fd7 100644
--- a/src/soc/intel/broadwell/acpi.c
-+++ b/src/soc/intel/broadwell/acpi.c
-@@ -586,7 +586,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 		const unsigned long tmp = current;
- 
- 		current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
-+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
- 
- 		acpi_dmar_drhd_fixup(tmp, current);
- 	}
-@@ -596,11 +596,11 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 		const unsigned long tmp = current;
- 		current += acpi_create_dmar_drhd(current,
- 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
-		current += acpi_create_dmar_drhd_ds_ioapic(current,
-+		current += acpi_create_dmar_ds_ioapic(current,
- 				2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
- 		size_t i;
- 		for (i = 0; i < 8; ++i)
-			current += acpi_create_dmar_drhd_ds_msi_hpet(current,
-+			current += acpi_create_dmar_ds_msi_hpet(current,
- 					0, PCH_HPET_PCI_BUS,
- 					PCH_HPET_PCI_SLOT, i);
- 		acpi_dmar_drhd_fixup(tmp, current);
-diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
-index 4c6417d5d8..8bb4596ff5 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
-+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
-@@ -331,12 +331,12 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 	current += acpi_create_dmar_drhd(current,
- 			DRHD_INCLUDE_PCI_ALL, 0, vtbar);
- 	/* The IIO I/O APIC is fixed on PCI 00:05.4 on Broadwell-DE */
-	current += acpi_create_dmar_drhd_ds_ioapic(current,
-+	current += acpi_create_dmar_ds_ioapic(current,
- 			9, 0, 5, 4);
- 	/* Get the PCI BDF for the PCH I/O APIC */
- 	dev = dev_find_slot(0, LPC_DEV_FUNC);
- 	bdf = pci_read_config16(dev, 0x6c);
-	current += acpi_create_dmar_drhd_ds_ioapic(current,
-+	current += acpi_create_dmar_ds_ioapic(current,
- 			8, (bdf >> 8), PCI_SLOT(bdf), PCI_FUNC(bdf));
- 
- 	/*
-@@ -365,7 +365,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 	/* Create one HPET entry in DMAR for every unique HPET PCI path. */
- 	for (i = 0; i < ARRAY_SIZE(hpet_bdf); i++) {
- 		if (hpet_bdf[i])
-			current += acpi_create_dmar_drhd_ds_msi_hpet(current,
-+			current += acpi_create_dmar_ds_msi_hpet(current,
- 				0, (hpet_bdf[i] >> 8), PCI_SLOT(hpet_bdf[i]),
- 				PCI_FUNC(hpet_bdf[i]));
- 	}
-@@ -380,7 +380,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 		dev = dev_find_class(PCI_CLASS_BRIDGE_PCI << 8, dev);
- 		if (dev && dev->bus->secondary == 0 &&
- 		    PCI_SLOT(dev->path.pci.devfn) <= 3)
-			current += acpi_create_dmar_drhd_ds_pci_br(current,
-+			current += acpi_create_dmar_ds_pci_br(current,
- 					dev->bus->secondary,
- 					PCI_SLOT(dev->path.pci.devfn),
- 					PCI_FUNC(dev->path.pci.devfn));
-diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
-index 914b9d51a3..760be590a3 100644
--- a/src/soc/intel/skylake/acpi.c
-+++ b/src/soc/intel/skylake/acpi.c
-@@ -551,7 +551,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 		const unsigned long tmp = current;
- 
- 		current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
-		current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
-+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
- 
- 		acpi_dmar_drhd_fixup(tmp, current);
- 	}
-@@ -576,9 +576,9 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 
- 		current += acpi_create_dmar_drhd(current,
- 				DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
-		current += acpi_create_dmar_drhd_ds_ioapic(current,
-+		current += acpi_create_dmar_ds_ioapic(current,
- 				2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf));
-		current += acpi_create_dmar_drhd_ds_msi_hpet(current,
-+		current += acpi_create_dmar_ds_msi_hpet(current,
- 				0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf));
- 
- 		acpi_dmar_drhd_fixup(tmp, current);
-- 
-2.19.1
-
--- a/patches/coreboot-4.8.1/0003-soc-intel-skylake-Generate-ACPI-RMRR-table.patch
+++ b/patches/coreboot-4.8.1/0003-soc-intel-skylake-Generate-ACPI-RMRR-table.patch
@ -1,80 +0,0 @@
-From 7267021c2a36ecd92aafdad2cae9ecab09e7e20d Mon Sep 17 00:00:00 2001
-From: Matt DeVillier <matt.devillier@gmail.com>
-Date: Mon, 25 Jun 2018 14:40:53 -0500
-Subject: [PATCH 3/3] soc/intel/skylake: Generate ACPI RMRR table
-
-An ACPI RMRR table is requried for IOMMU to work properly with an
-iGPU (without using passthrough mode), so create one along with the
-DRHD DMAR table if the iGPU is present and enabled.
-
-Test: build/boot google/chell and purism/librem13v2 with kernel
-parameter 'intel_iommu=on' but without 'iommu=pt;' observe integrated
-graphics functional without corruption.
-
-Change-Id: I202fb3eb8618f99d41f3d1c5bbb83b2ec982aca4
-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
-Reviewed-on: https://review.coreboot.org/27270
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
-Reviewed-by: Youness Alaoui <snifikino@gmail.com>
---
- .../common/block/include/intelblocks/systemagent.h     |  2 ++
- .../intel/common/block/systemagent/systemagent_early.c |  2 +-
- src/soc/intel/skylake/acpi.c                           | 10 +++++++++-
- 3 files changed, 12 insertions(+), 2 deletions(-)
-
-diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
-index a731b9cb0b..babf9cec95 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
-+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
-@@ -77,6 +77,8 @@ void enable_power_aware_intr(void);
- uintptr_t sa_get_tolud_base(void);
- /* API to get DSM size */
- size_t sa_get_dsm_size(void);
-+/* API to get GSM base address */
-+uintptr_t sa_get_gsm_base(void);
- /* API to get GSM size */
- size_t sa_get_gsm_size(void);
- /* API to get TSEG base address */
-diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c
-index 609e1596c9..c1cef5daf1 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_early.c
-+++ b/src/soc/intel/common/block/systemagent/systemagent_early.c
-@@ -174,7 +174,7 @@ size_t sa_get_dsm_size(void)
- 		return (prealloc_memory - 0xEF) * 4*MiB;
- }
- 
-static uintptr_t sa_get_gsm_base(void)
-+uintptr_t sa_get_gsm_base(void)
- {
- 	/* All regions concerned for have 1 MiB alignment. */
- 	return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, BGSM), 1*MiB);
-diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
-index 760be590a3..eac9e0ac91 100644
--- a/src/soc/intel/skylake/acpi.c
-+++ b/src/soc/intel/skylake/acpi.c
-@@ -548,12 +548,20 @@ static unsigned long acpi_fill_dmar(unsigned long current)
- 	/* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */
- 	if (igfx_dev && igfx_dev->enabled && gfxvten &&
- 	    gfx_vtbar && !MCHBAR32(GFXVTBAR + 4)) {
-		const unsigned long tmp = current;
-+		unsigned long tmp = current;
- 
- 		current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
- 		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
- 
- 		acpi_dmar_drhd_fixup(tmp, current);
-+
-+		/* Add RMRR entry */
-+		tmp = current;
-+
-+		current += acpi_create_dmar_rmrr(current, 0,
-+				sa_get_gsm_base(), sa_get_tolud_base() - 1);
-+		current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
-+		acpi_dmar_rmrr_fixup(tmp, current);
- 	}
- 
- 	struct device *const p2sb_dev = dev_find_slot(0, PCH_DEVFN_P2SB);
-- 
-2.19.1
-
--- a/patches/coreboot-4.8.1/0007-intel-fsp-fsp2_0-Fix-FSP-2.0-headers-to-match-github.patch
+++ b/patches/coreboot-4.8.1/0007-intel-fsp-fsp2_0-Fix-FSP-2.0-headers-to-match-github.patch
@ -1,43 +0,0 @@
-From 8e7e0e390fcfda226f0d78bfa883ffee12f751a8 Mon Sep 17 00:00:00 2001
-From: Youness Alaoui <youness.alaoui@puri.sm>
-Date: Fri, 9 Feb 2018 18:32:51 -0500
-Subject: [PATCH 7/9] intel/fsp/fsp2_0: Fix FSP 2.0 headers to match github
- version
-
-The current FSP 2.0 headers do not match the headers from the official
-FSP 2.0 image that was released on github [1].
-
-[1] https://github.com/IntelFsp/FSP/tree/Kabylake/KabylakeFspBinPkg
-
-Change-Id: I233bf7cf6f62e9e1b389d42a09461717a3285f0f
-Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
- src/vendorcode/intel/fsp/fsp2_0/skykabylake/MemInfoHob.h | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
-diff --git a/src/vendorcode/intel/fsp/fsp2_0/skykabylake/MemInfoHob.h b/src/vendorcode/intel/fsp/fsp2_0/skykabylake/MemInfoHob.h
-index 248b4d5ef1..3abc877a19 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/skykabylake/MemInfoHob.h
-+++ b/src/vendorcode/intel/fsp/fsp2_0/skykabylake/MemInfoHob.h
-@@ -207,10 +207,6 @@ typedef struct {
-   UINT8             RevisionId;              ///< The PCI revision id of this memory controller.
-   UINT8             ChannelCount;            ///< Number of valid channels that exist on the controller.
-   CHANNEL_INFO      ChannelInfo[MAX_CH];     ///< The following are channel level definitions.
-  MRC_TA_TIMING     tRd2Rd;                  ///< Read-to-Read   Turn Around Timings
-  MRC_TA_TIMING     tRd2Wr;                  ///< Read-to-Write  Turn Around Timings
-  MRC_TA_TIMING     tWr2Rd;                  ///< Write-to-Read  Turn Around Timings
-  MRC_TA_TIMING     tWr2Wr;                  ///< Write-to-Write Turn Around Timings
- } CONTROLLER_INFO;
- 
- typedef struct {
-@@ -228,6 +224,7 @@ typedef struct {
-   UINT8             ErrorCorrectionType;
- 
-   SiMrcVersion      Version;
-+  UINT32            FreqMax;
-   BOOLEAN           EccSupport;
-   UINT8             MemoryProfile;
-   UINT32            TotalPhysicalMemorySize;
-- 
-2.14.3
-
--- a/patches/coreboot-4.8.1/0009-Add-heads-TPM-measurements-to-Skylake-Kabylake.patch
+++ b/patches/coreboot-4.8.1/0009-Add-heads-TPM-measurements-to-Skylake-Kabylake.patch
@ -1,132 +0,0 @@
-diff --git ./src/arch/x86/postcar.c ./src/arch/x86/postcar.c
-index 6497b73..485b051 100644
--- ./src/arch/x86/postcar.c
-+++ ./src/arch/x86/postcar.c
-@@ -19,6 +19,7 @@
- #include <console/console.h>
- #include <main_decl.h>
- #include <program_loading.h>
-+#include <security/tpm/tss.h>
- #include <soc/intel/common/util.h>
- 
- /*
-@@ -43,3 +44,11 @@ void main(void)
- 	/* Load and run ramstage. */
- 	run_ramstage();
- }
-+
-+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
-+{
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) {
-+		tlcl_measure(2, (const void*) start, size);
-+	}
-+}
-+
-diff --git ./src/drivers/intel/fsp2_0/memory_init.c ./src/drivers/intel/fsp2_0/memory_init.c
-index 30987ce..4957bc0 100644
--- ./src/drivers/intel/fsp2_0/memory_init.c
-+++ ./src/drivers/intel/fsp2_0/memory_init.c
-@@ -150,10 +150,11 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
- 
- 	/*
- 	 * Initialize the TPM, unless the TPM was already initialized
-	 * in verstage and used to verify romstage.
-+	 * in verstage and used to verify romstage, or for measured boot.
- 	 */
- 	if (IS_ENABLED(CONFIG_LPC_TPM) &&
-	    !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
-+		!IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK) &&
-+		!IS_ENABLED(CONFIG_MEASURED_BOOT))
- 		init_tpm(s3wake);
- }
- 
-@@ -483,8 +484,29 @@ void fsp_memory_init(bool s3wake)
- 	if (status != CB_SUCCESS)
- 		die("Loading FSPM failed!\n");
- 
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
-+		// we don't know if we are coming out of a resume
-+		// at this point, but want to setup the tpm ASAP
-+		init_tpm(0);
-+		tlcl_lib_init();
-+		const void * const bootblock = (const void*) 0xFFFFF800;
-+		const unsigned bootblock_size = 0x800;
-+		tlcl_measure(2, bootblock, bootblock_size);
-+
-+		tlcl_measure(2, _romstage, _eromstage - _romstage);
-+	}
-+
- 	/* Signal that FSP component has been loaded. */
-+	// Don't measure since it is relocated at this point
- 	prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);
- 
- 	do_fsp_memory_init(&hdr, s3wake, &memmap);
- }
-+
-+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
-+{
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) {
-+		tlcl_measure(2, (const void*) start, size);
-+	}
-+}
-+
-diff --git ./src/drivers/intel/fsp2_0/silicon_init.c ./src/drivers/intel/fsp2_0/silicon_init.c
-index bda88d1..49568f6 100644
--- ./src/drivers/intel/fsp2_0/silicon_init.c
-+++ ./src/drivers/intel/fsp2_0/silicon_init.c
-@@ -18,6 +18,7 @@
- #include <fsp/api.h>
- #include <fsp/util.h>
- #include <program_loading.h>
-+#include <security/tpm/tss.h>
- #include <stage_cache.h>
- #include <string.h>
- #include <timestamp.h>
-@@ -101,6 +102,10 @@ void fsps_load(bool s3wake)
- 	if (rdev_readat(&rdev, dest, 0, size) < 0)
- 		die("Failed to read FSPS!\n");
- 
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT)) {
-+		tlcl_measure(2, (const void*) dest, size);
-+	}
-+
- 	if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0)
- 		die("Unable to relocate FSPS!\n");
- 
-@@ -115,7 +120,7 @@ void fsps_load(bool s3wake)
- 	stage_cache_add(STAGE_REFCODE, &fsps);
- 
- 	/* Signal that FSP component has been loaded. */
-	prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL);
-+	prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL | SEG_NO_MEASURE);
- 	load_done = 1;
- }
- 
-diff --git ./src/drivers/pc80/tpm/Makefile.inc ./src/drivers/pc80/tpm/Makefile.inc
-index 9d428b5..1d2364f 100644
--- ./src/drivers/pc80/tpm/Makefile.inc
-+++ ./src/drivers/pc80/tpm/Makefile.inc
-@@ -3,6 +3,7 @@ ifeq ($(CONFIG_ARCH_X86),y)
- verstage-$(CONFIG_LPC_TPM) += tis.c
- romstage-$(CONFIG_LPC_TPM) += tis.c
- ramstage-$(CONFIG_LPC_TPM) += tis.c
-+postcar-$(CONFIG_LPC_TPM) += tis.c
- romstage-$(CONFIG_LPC_TPM) += romstage.c
- 
- endif
-diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
-index 2385635..7ef24cc 100644
--- ./src/security/tpm/Makefile.inc
-+++ ./src/security/tpm/Makefile.inc
-@@ -4,6 +4,11 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
- verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
- verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
- 
-+ifeq ($(CONFIG_MEASURED_BOOT),y)
-+postcar-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
-+postcar-$(CONFIG_TPM) += sha1.c
-+endif # CONFIG_MEASURED_BOOT
-+
- ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
- romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
- romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
--- a/patches/coreboot-4.8.1/0020-kgpe-d16.patch
+++ b/patches/coreboot-4.8.1/0020-kgpe-d16.patch
@ -1,152 +0,0 @@
-diff --git ./src/mainboard/asus/kgpe-d16/Kconfig ./src/mainboard/asus/kgpe-d16/Kconfig
-index 531ba4f..5227d28 100644
--- ./src/mainboard/asus/kgpe-d16/Kconfig
-+++ ./src/mainboard/asus/kgpe-d16/Kconfig
-@@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
- 	select BOARD_ROMSIZE_KB_2048
- 	select ENABLE_APIC_EXT_ID
- 	select SPI_FLASH
-+	select TPM2
- 	select MAINBOARD_HAS_LPC_TPM
- 	select HAVE_ACPI_RESUME
- 	select DRIVERS_I2C_W83795
-diff --git ./src/mainboard/asus/kgpe-d16/devicetree.cb ./src/mainboard/asus/kgpe-d16/devicetree.cb
-index 9039f6d..0ea4216 100644
--- ./src/mainboard/asus/kgpe-d16/devicetree.cb
-+++ ./src/mainboard/asus/kgpe-d16/devicetree.cb
-@@ -217,6 +217,9 @@ chip northbridge/amd/amdfam10/root_complex	# Root complex
- 						chip drivers/pc80/tpm
- 							device pnp 4e.0 on end		# TPM module
- 						end
-+						chip drivers/generic/generic		# BMC KCS
-+							device pnp ca2.0 on end
-+						end
- 					end
- 					device pci 14.4 on			# Bridge
- 						device pci 1.0 on end		# VGA
-diff --git ./src/mainboard/asus/kgpe-d16/dsdt.asl ./src/mainboard/asus/kgpe-d16/dsdt.asl
-index 6a25b4d..cfcbc98 100644
--- ./src/mainboard/asus/kgpe-d16/dsdt.asl
-+++ ./src/mainboard/asus/kgpe-d16/dsdt.asl
-@@ -50,6 +50,9 @@ DefinitionBlock (
- 	/* HPET enable */
- 	Name (HPTE, 0x1)
- 
-+	/* IPMI KCS enable */
-+	Name (KCSE, 0x1)
-+
- 	#include <southbridge/amd/common/acpi/sleepstates.asl>
- 
- 	/* The _PIC method is called by the OS to choose between interrupt
-@@ -485,6 +488,13 @@ DefinitionBlock (
- 				Name (_HID, EisaId ("PNP0A05"))
- 				Name (_ADR, 0x00140003)
- 
-+				OperationRegion(BMRG, SystemIO, 0xca2, 0x02) /* BMC KCS registers */
-+					Field(BMRG, AnyAcc, NoLock, Preserve)
-+				{
-+					BMRI, 8,  /* Index */
-+					BMRD, 8,  /* Data */
-+				}
-+
- 				/* Real Time Clock Device */
- 				Device(RTC0) {
- 					Name(_HID, EISAID("PNP0B00"))   /* AT Real Time Clock (not PIIX4 compatible) */
-@@ -606,6 +616,27 @@ DefinitionBlock (
- 						})
- 					}
- 				}
-+
-+				Device(KCS1) {   /* IPMI KCS */
-+					Name(_HID,EISAID("IPI0001"))		/* ASpeed BMC */
-+					Method (_STA, 0, NotSerialized) {
-+						If(KCSE) {			/* Detection enabled */
-+							If(LNotEqual(BMRD, 0xff)) {
-+								Return(0x0f)	/* Device present */
-+							}
-+							Return(Zero)
-+						}
-+						Return(Zero)
-+					}
-+					Method(_CRS, 0) {
-+						Return(ResourceTemplate() {
-+							IO(Decode16, 0x0ca2, 0x0ca2, 0x01, 0x02)
-+						})
-+					}
-+					Method (_IFT, 0, NotSerialized) {	/* Interface type */
-+						Return(One)			/* KCS interface */
-+					}
-+				}
- 			}
- 
- 			/* High Precision Event Timer */
-diff --git ./src/mainboard/asus/kgpe-d16/mainboard.c ./src/mainboard/asus/kgpe-d16/mainboard.c
-index 65029d4..8ee3a5e 100644
--- ./src/mainboard/asus/kgpe-d16/mainboard.c
-+++ ./src/mainboard/asus/kgpe-d16/mainboard.c
-@@ -70,6 +70,13 @@ static void mainboard_enable(device_t dev)
- 
- 	set_pcie_dereset();
- 	/* get_ide_dma66(); */
-+
-+	/* Enable access to the BMC IPMI via KCS */
-+	device_t lpc_sio_dev = dev_find_slot_pnp(0xca2, 0);
-+	struct resource *res = new_resource(lpc_sio_dev, 0xca2);
-+	res->base = 0xca2;
-+	res->size = 1;
-+	res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
- }
- 
- /* override the default SATA PHY setup */
-diff --git ./src/mainboard/asus/kgpe-d16/romstage.c ./src/mainboard/asus/kgpe-d16/romstage.c
-index 63b93c1..bb4f181 100644
--- ./src/mainboard/asus/kgpe-d16/romstage.c
-+++ ./src/mainboard/asus/kgpe-d16/romstage.c
-@@ -88,6 +88,47 @@ static void switch_spd_mux(uint8_t channel)
- 	byte &= ~0xc0;			/* Enable SPD mux GPIO output drivers */
- 	byte |= (channel << 2) & 0xc;	/* Set SPD mux GPIOs */
- 	pci_write_config8(PCI_DEV(0, 0x14, 0), 0x54, byte);
-+
-+	/* Temporary AST PCI mapping */
-+	uint32_t base_memory = 0xfc000000;
-+	uint32_t memory_limit = 0xfc800000;
-+
-+	/* Temporarily enable the SP5100 PCI bridge */
-+	uint16_t prev_sec_cfg = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x04);
-+	uint8_t prev_sec_bus = pci_read_config8(PCI_DEV(0, 0x14, 4), 0x19);
-+	uint8_t prev_sec_sub_bus = pci_read_config8(PCI_DEV(0, 0x14, 4), 0x1a);
-+	uint16_t prev_sec_mem_base = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x20);
-+	uint16_t prev_sec_mem_limit = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x22);
-+	pci_write_config8(PCI_DEV(0, 0x14, 4), 0x19, 0x01);
-+	pci_write_config8(PCI_DEV(0, 0x14, 4), 0x1a, 0xff);
-+	pci_write_config16(PCI_DEV(0, 0x14, 4), 0x20, (base_memory >> 20));
-+	pci_write_config16(PCI_DEV(0, 0x14, 4), 0x22, (memory_limit >> 20));
-+	pci_write_config16(PCI_DEV(0, 0x14, 4), 0x04, 0x2);
-+
-+	/* Temporarily enable AST BAR1 */
-+	uint32_t prev_ast_cfg = pci_read_config32(PCI_DEV(1, 0x1, 0), 0x04);
-+	uint32_t prev_ast_bar1 = pci_read_config32(PCI_DEV(1, 0x1, 0), 0x14);
-+	pci_write_config32(PCI_DEV(1, 0x1, 0), 0x14, base_memory);
-+	pci_write_config32(PCI_DEV(1, 0x1, 0), 0x04, 0x02100002);
-+
-+	/* Use the P2A bridge to set ASpeed SPD mux GPIOs to the same values as the SP5100 */
-+	void* ast_bar1 = (void*)base_memory;
-+	write32(ast_bar1 + 0xf004, 0x1e780000);								/* Enable access to GPIO controller */
-+	write32(ast_bar1 + 0xf000, 0x1);
-+	write32(ast_bar1 + 0x10024, read32(ast_bar1 + 0x10024) | 0x3000);				/* Enable SPD mux GPIO output drivers */
-+	write32(ast_bar1 + 0x10020, (read32(ast_bar1 + 0x10020) & ~0x3000) | ((channel & 0x3) << 12));	/* Set SPD mux GPIOs */
-+	write32(ast_bar1 + 0xf000, 0x0);
-+
-+	/* Deconfigure AST BAR1 */
-+	pci_write_config32(PCI_DEV(1, 0x1, 0), 0x04, prev_ast_cfg);
-+	pci_write_config32(PCI_DEV(1, 0x1, 0), 0x14, prev_ast_bar1);
-+
-+	/* Deconfigure SP5100 PCI bridge */
-+	pci_write_config16(PCI_DEV(0, 0x14, 4), 0x04, prev_sec_cfg);
-+	pci_write_config16(PCI_DEV(0, 0x14, 4), 0x22, prev_sec_mem_limit);
-+	pci_write_config16(PCI_DEV(0, 0x14, 4), 0x20, prev_sec_mem_base);
-+	pci_write_config8(PCI_DEV(0, 0x14, 4), 0x1a, prev_sec_sub_bus);
-+	pci_write_config8(PCI_DEV(0, 0x14, 4), 0x19, prev_sec_bus);
- }
- 
- static const uint8_t spd_addr_fam15[] = {
--- a/patches/coreboot-4.8.1/0030-sandybridge.patch
+++ b/patches/coreboot-4.8.1/0030-sandybridge.patch
@ -1,58 +0,0 @@
-diff --git ./src/northbridge/intel/sandybridge/romstage.c ./src/northbridge/intel/sandybridge/romstage.c
-index 0426b83..d348b9e 100644
--- ./src/northbridge/intel/sandybridge/romstage.c
-+++ ./src/northbridge/intel/sandybridge/romstage.c
-@@ -29,6 +29,8 @@
- #include <device/device.h>
- #include <halt.h>
- #include <security/tpm/tis.h>
-+#include <security/tpm/tss.h>
-+#include <program_loading.h>
- #include <northbridge/intel/sandybridge/chip.h>
- #include "southbridge/intel/bd82x6x/pch.h"
- #include <southbridge/intel/common/gpio.h>
-@@ -72,6 +74,19 @@ void mainboard_romstage_entry(unsigned long bist)
- 	/* Initialize superio */
- 	mainboard_config_superio();
- 
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
-+		// we don't know if we are coming out of a resume
-+		// at this point, but want to setup the tpm ASAP
-+		init_tpm(0);
-+		tlcl_lib_init();
-+		const void * const bootblock = (const void*) 0xFFFFF800;
-+		const unsigned bootblock_size = 0x800;
-+		tlcl_measure(2, bootblock, bootblock_size);
-+
-+		extern char _romstage, _eromstage;
-+		tlcl_measure(2, &_romstage, &_eromstage - &_romstage);
-+	}
-+
- 	/* USB is initialized in MRC if MRC is used.  */
- 	if (CONFIG_USE_NATIVE_RAMINIT) {
- 		early_usb_init(mainboard_usb_ports);
-@@ -117,9 +132,23 @@ void mainboard_romstage_entry(unsigned long bist)
- 
- 	northbridge_romstage_finalize(s3resume);
- 
-	if (IS_ENABLED(CONFIG_LPC_TPM)) {
-+	// the normal TPM init happens here, if we haven't already
-+	// set it up as part of the measured boot.
-+	if (!IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
- 		init_tpm(s3resume);
- 	}
- 
-+	printk(BIOS_DEBUG, "%s: romstage complete\n", __FILE__);
-+
- 	post_code(0x3f);
- }
-+
-+
-+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
-+{
-+	if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE))
-+	{
-+		tlcl_measure(2, (const void*) start, size);
-+	}
-+}
-+
--- a/patches/coreboot-4.8.1/0050-buildgcc-Do-not-try-to-install-GCC-if-build-failed.patch
+++ b/patches/coreboot-4.8.1/0050-buildgcc-Do-not-try-to-install-GCC-if-build-failed.patch
@ -1,44 +0,0 @@
-From 659f40bb348dd2ca02f9483ed2668465177b6a40 Mon Sep 17 00:00:00 2001
-From: Nico Huber <nico.h@gmx.de>
-Date: Wed, 23 May 2018 17:06:53 +0200
-Subject: [PATCH 50/59] buildgcc: Do not try to install GCC if build failed
-
-We didn't bail out if configuring or building of GCC failed but run
-`make install` and later steps instead. This resulted in very confusing
-logs that concealed the actual error.
-
-Change-Id: Ia064e0bfd96f0cbad391da3bb19e4dc304d988ff
-Signed-off-by: Nico Huber <nico.h@gmx.de>
-Reviewed-on: https://review.coreboot.org/26496
-Reviewed-by: Martin Roth <martinroth@google.com>
-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
- util/crossgcc/buildgcc | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index edcea7ab42..53f9782cb5 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -751,12 +751,12 @@ build_cross_GCC() {
- 		--with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
- 		--with-mpc=$DESTDIR$TARGETDIR \
- 		--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
-		|| touch .failed
-	$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc || touch .failed
-+		&& \
-+	$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
- 	$MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
- 
-	if [ "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
-		$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc || touch .failed
-+	if [ ! -f .failed -a "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
-+		$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc && \
- 		$MAKE install-target-libgcc DESTDIR=$DESTDIR || touch .failed
- 	fi
- }
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0051-buildgcc-Update-IASL-to-20180531.patch
+++ b/patches/coreboot-4.8.1/0051-buildgcc-Update-IASL-to-20180531.patch
@ -1,130 +0,0 @@
-From 46fb8b6f051b1844ef92098119e4ffa12395e26a Mon Sep 17 00:00:00 2001
-From: Iru Cai <mytbk920423@gmail.com>
-Date: Fri, 28 Jul 2017 23:36:25 +0800
-Subject: [PATCH 51/59] buildgcc: Update IASL to 20180531
-
-Change-Id: I6c14f3aad59749896816bb8789788fc513e7176f
-Signed-off-by: Iru Cai <mytbk920423@gmail.com>
-Signed-off-by: Martin Roth <martinroth@google.com>
-Reviewed-on: https://review.coreboot.org/21156
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Nico Huber <nico.h@gmx.de>
---
- util/crossgcc/buildgcc                        |  6 ++---
- .../patches/acpica-unix2-20161222_iasl.patch  | 27 -------------------
- .../patches/acpica-unix2-20180531_iasl.patch  | 27 +++++++++++++++++++
- .../sum/acpica-unix2-20161222.tar.gz.cksum    |  1 -
- .../sum/acpica-unix2-20180531.tar.gz.cksum    |  1 +
- 5 files changed, 31 insertions(+), 31 deletions(-)
- delete mode 100644 util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
- create mode 100644 util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
- delete mode 100644 util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
- create mode 100644 util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index 53f9782cb5..bbe74eb2b8 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -18,8 +18,8 @@
- 
- cd $(dirname $0)
- 
-CROSSGCC_DATE="October 15th, 2017"
-CROSSGCC_VERSION="1.50"
-+CROSSGCC_DATE="June 3rd, 2018"
-+CROSSGCC_VERSION="1.51"
- CROSSGCC_COMMIT=$( git describe )
- 
- # default settings
-@@ -42,7 +42,7 @@ GCC_VERSION=6.3.0
- GCC_AUTOCONF_VERSION=2.69
- BINUTILS_VERSION=2.29.1
- GDB_VERSION=8.0
-IASL_VERSION=20161222
-+IASL_VERSION=20180531
- PYTHON_VERSION=3.5.1
- EXPAT_VERSION=2.2.1
- # CLANG version number
-diff --git a/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch b/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
-deleted file mode 100644
-index 24bde98a32..0000000000
--- a/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
-+++ /dev/null
-@@ -1,27 +0,0 @@
-diff -Naur acpica-unix2-20161222/source/compiler/asloptions.c acpica-unix2-20161222/source/compiler/asloptions.c
---- acpica-unix2-20161222/source/compiler/asloptions.c
-+++ acpica-unix2-20161222/source/compiler/asloptions.c
-@@ -100,6 +100,7 @@
-     if (argc < 2)
-     {
-         printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+        printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
-         Usage ();
-         exit (1);
-     }
-@@ -130,6 +131,7 @@
-     if (Gbl_DoSignon)
-     {
-         printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+        printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
-         if (Gbl_IgnoreErrors)
-         {
-             printf ("Ignoring all errors, forcing AML file generation\n\n");
-@@ -711,6 +713,7 @@
-         case '^':
-
-             printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+            printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
-             exit (0);
-
-         case 'a':
-diff --git a/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch b/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
-new file mode 100644
-index 0000000000..fea5cd3c47
--- /dev/null
-+++ b/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
-@@ -0,0 +1,27 @@
-+diff -Naur acpica-unix2-20180531_/source/compiler/asloptions.c acpica-unix2-20180531/source/compiler/asloptions.c > acpica-unix2-20180531_iasl.patch
-+--- acpica-unix2-20180531_/source/compiler/asloptions.c
-++++ acpica-unix2-20180531/source/compiler/asloptions.c
-+@@ -126,6 +126,7 @@
-+     if (Gbl_DoSignon)
-+     {
-+         printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-++        printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
-+         if (Gbl_IgnoreErrors)
-+         {
-+             printf ("Ignoring all errors, forcing AML file generation\n\n");
-+@@ -753,6 +754,7 @@
-+         case '^':
-+
-+             printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-++            printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
-+             exit (0);
-+
-+         case 'a':
-+@@ -766,6 +768,7 @@
-+
-+             printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+             printf (ACPI_COMMON_BUILD_TIME);
-++            printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
-+             exit (0);
-+
-+         case 'e':
-diff --git a/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
-deleted file mode 100644
-index d857678871..0000000000
--- a/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
-+++ /dev/null
-@@ -1 +0,0 @@
-73e57d4d558c9bc831165c71adbff577b526f256  tarballs/acpica-unix2-20161222.tar.gz
-diff --git a/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
-new file mode 100644
-index 0000000000..700185839a
--- /dev/null
-+++ b/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
-@@ -0,0 +1 @@
-+17717140438d506533b4a56e34350749d7b84d6c  tarballs/acpica-unix2-20180531.tar.gz
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0052-crossgcc-Update-to-clang-6.0-cmake-3.11.3.patch
+++ b/patches/coreboot-4.8.1/0052-crossgcc-Update-to-clang-6.0-cmake-3.11.3.patch
@ -1,132 +0,0 @@
-From 575f1d7784041461d02c892b4846165dd742654c Mon Sep 17 00:00:00 2001
-From: Martin Roth <gaumless@gmail.com>
-Date: Tue, 5 Jun 2018 20:56:29 -0600
-Subject: [PATCH 52/59] crossgcc: Update to clang 6.0 & cmake 3.11.3
-
-Change-Id: I1a0db60b527c2f7ffe77743c0d75b78a7c8bc4cc
-Signed-off-by: Martin Roth <gaumless@gmail.com>
-Reviewed-on: https://review.coreboot.org/26877
-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
- util/crossgcc/buildgcc                                     | 6 +++---
- util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum               | 1 -
- util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum               | 1 +
- util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum | 1 -
- util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum | 1 +
- util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum                | 1 +
- util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum             | 1 -
- util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum       | 1 -
- util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum       | 1 +
- util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum              | 1 -
- util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum              | 1 +
- 11 files changed, 8 insertions(+), 8 deletions(-)
- delete mode 100644 util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
- create mode 100644 util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
- delete mode 100644 util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
- create mode 100644 util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
- create mode 100644 util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
- delete mode 100644 util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
- delete mode 100644 util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
- create mode 100644 util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
- delete mode 100644 util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
- create mode 100644 util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index bbe74eb2b8..addc61f186 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -46,9 +46,9 @@ IASL_VERSION=20180531
- PYTHON_VERSION=3.5.1
- EXPAT_VERSION=2.2.1
- # CLANG version number
-CLANG_VERSION=4.0.0
-+CLANG_VERSION=6.0.0
- MAKE_VERSION=4.2.1
-CMAKE_VERSION=3.9.0-rc3
-+CMAKE_VERSION=3.11.3
- 
- # GCC toolchain archive locations
- # These are sanitized by the jenkins toolchain test builder, so if
-@@ -69,7 +69,7 @@ CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src
- CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
- CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
- MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
-CMAKE_ARCHIVE="https://cmake.org/files/v3.9/cmake-${CMAKE_VERSION}.tar.gz"
-+CMAKE_ARCHIVE="https://cmake.org/files/v3.11/cmake-${CMAKE_VERSION}.tar.gz"
- 
- ALL_ARCHIVES="$GMP_ARCHIVE $MPFR_ARCHIVE $MPC_ARCHIVE \
- 	$GCC_ARCHIVE $BINUTILS_ARCHIVE $GDB_ARCHIVE $IASL_ARCHIVE \
-diff --git a/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
-deleted file mode 100644
-index 00a5596878..0000000000
--- a/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
-+++ /dev/null
-@@ -1 +0,0 @@
-e2762800c93d9335781ea6a45af3f80845542ef5  tarballs/cfe-4.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
-new file mode 100644
-index 0000000000..523445035f
--- /dev/null
-+++ b/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
-@@ -0,0 +1 @@
-+4cc7bef72fda70ac5e065ca0ae2d66957abe6f2a  tarballs/cfe-6.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
-deleted file mode 100644
-index dbf642c461..0000000000
--- a/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
-+++ /dev/null
-@@ -1 +0,0 @@
-bdb543c4bb87bd80fe65711114ca0a5c25329ae3  tarballs/clang-tools-extra-4.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
-new file mode 100644
-index 0000000000..9fcb8280d1
--- /dev/null
-+++ b/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
-@@ -0,0 +1 @@
-+c960a0d565e46e4c4f6976fac389f753076ca72e  tarballs/clang-tools-extra-6.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
-new file mode 100644
-index 0000000000..14a4b22c8d
--- /dev/null
-+++ b/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
-@@ -0,0 +1 @@
-+73261a5b7f71abf7277c1d2a418ca3c4cf170c89  tarballs/cmake-3.11.3.tar.gz
-diff --git a/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
-deleted file mode 100644
-index 809ce3c7ca..0000000000
--- a/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
-+++ /dev/null
-@@ -1 +0,0 @@
-d568e74e2e4a1cdeae1820cc2cb36fd2d6afc8fe  tarballs/cmake-3.9.0-rc3.tar.gz
-diff --git a/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
-deleted file mode 100644
-index 95da5148ed..0000000000
--- a/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
-+++ /dev/null
-@@ -1 +0,0 @@
-a879b610e427ef3bba482bdc031ae371cabab81e  tarballs/compiler-rt-4.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
-new file mode 100644
-index 0000000000..88186dbf38
--- /dev/null
-+++ b/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
-@@ -0,0 +1 @@
-+5725f19be611034e77196461cdb4989f4258cfa4  tarballs/compiler-rt-6.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
-deleted file mode 100644
-index 410f95fb1a..0000000000
--- a/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
-+++ /dev/null
-@@ -1 +0,0 @@
-aee4524e2407f9fe5afc6f70c753180b907011d0  tarballs/llvm-4.0.0.src.tar.xz
-diff --git a/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
-new file mode 100644
-index 0000000000..ac079eccf5
--- /dev/null
-+++ b/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
-@@ -0,0 +1 @@
-+f61e0a35feb76644ba160a413ee209dd24c88f47  tarballs/llvm-6.0.0.src.tar.xz
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0053-src-Get-rid-of-unneeded-whitespace.patch
+++ b/patches/coreboot-4.8.1/0053-src-Get-rid-of-unneeded-whitespace.patch
@ -1,55 +0,0 @@
-From b0f1988f893bf5f581917816b11e810309955143 Mon Sep 17 00:00:00 2001
-From: Elyes HAOUAS <ehaouas@noos.fr>
-Date: Sat, 9 Jun 2018 11:59:00 +0200
-Subject: [PATCH 53/59] src: Get rid of unneeded whitespace
-
-Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da
-Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
-Reviewed-on: https://review.coreboot.org/26991
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
- util/crossgcc/buildgcc | 8 ++++----
- 1 file changed, 4 insertions(+), 4 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index addc61f186..cd8a091989 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -1191,7 +1191,7 @@ export PATH=$DESTDIR$TARGETDIR/bin:$PATH
- 
- # Download, unpack, patch and build all packages
- 
-printf "Downloading and verifing tarballs ... \n"
-+printf "Downloading and verifing tarballs ...\n"
- mkdir -p tarballs
- for P in $PACKAGES; do
- 	download "$P" || exit "$?"
-@@ -1199,21 +1199,21 @@ for P in $PACKAGES; do
- done
- printf "Downloaded tarballs ... ${green}ok${NC}\n"
- 
-printf "Unpacking and patching ... \n"
-+printf "Unpacking and patching ...\n"
- for P in $PACKAGES; do
- 	unpack_and_patch $P || exit 1
- done
- printf "Unpacked and patched ... ${green}ok${NC}\n"
- 
- if [ -n "$BOOTSTRAPONLY" ]; then
-	printf "Building bootstrap compiler only ... \n"
-+	printf "Building bootstrap compiler only ...\n"
- 	for pkg in GMP MPFR MPC GCC; do
- 		build_for_host $pkg
- 	done
- 	exit 0
- fi
- 
-printf "Building packages ... \n"
-+printf "Building packages ...\n"
- for package in $PACKAGES; do
- 	build $package
- done
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0054-util-crossgcc-Allow-building-a-new-gcc-against-new-b.patch
+++ b/patches/coreboot-4.8.1/0054-util-crossgcc-Allow-building-a-new-gcc-against-new-b.patch
@ -1,54 +0,0 @@
-From 095db339f7463b09b52968fa3747aef329c7b83e Mon Sep 17 00:00:00 2001
-From: Patrick Georgi <pgeorgi@chromium.org>
-Date: Tue, 26 Jun 2018 21:00:58 +0200
-Subject: [PATCH 54/59] util/crossgcc: Allow building a new gcc against new
- binutils with -D
-
-With -D, the newly built toolchain isn't installed into $prefix/...
-but into $DESTDIR/$prefix/... while being built for $prefix alone.
-
-This is useful for distributions, but it breaks down when the build
-host already has the toolchain installed in $prefix without proper
-build isolation (cf. gentoo):
-
-In such cases libgcc etc are built using the new compiler (as gcc's
-build system is smart enough to state the path explicitly), but that
-compiler then uses its regular algorithm to determine the path to as,
-ld, ...
-That makes it use the tools from $prefix, which might differ in formats
-(assembly, certain object file flags, ...): nds32le-elf in particular
-has rather unstable formats still, and so new compilers can't work
-with old binutils.
-
-The approach to deal with this is to take an unused path that's
-specified by gcc's build system ($out/gcc/$arch/$version) and symlink
-it to the new toolchain - these explicitly given directories take
-precedence over the default search path, and so the new binutils
-are used.
-
-Change-Id: Ia9a262e73f56cd486a2ae07422b598c205a03aed
-Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
-Reviewed-on: https://review.coreboot.org/27241
-Reviewed-by: Martin Roth <martinroth@google.com>
-Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
- util/crossgcc/buildgcc | 2 ++
- 1 file changed, 2 insertions(+)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index cd8a091989..ef0c4d5d8f 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -752,6 +752,8 @@ build_cross_GCC() {
- 		--with-mpc=$DESTDIR$TARGETDIR \
- 		--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
- 		&& \
-+	mkdir -p gcc/$TARGETARCH && \
-+	ln -s $DESTDIR$TARGETDIR/$TARGETARCH/bin gcc/$TARGETARCH/$GCC_VERSION && \
- 	$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
- 	$MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
- 
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0055-crosgcc-patches-Add-make-patch-for-GLIBC-glob-interf.patch
+++ b/patches/coreboot-4.8.1/0055-crosgcc-patches-Add-make-patch-for-GLIBC-glob-interf.patch
@ -1,46 +0,0 @@
-From 11f8c9d9be8eb492d00b8d7a29614fdc0553387e Mon Sep 17 00:00:00 2001
-From: Martin Roth <gaumless@gmail.com>
-Date: Wed, 6 Jun 2018 22:36:14 -0600
-Subject: [PATCH 55/59] crosgcc/patches: Add make patch for GLIBC glob
- interface v2
-
-Copied from the GNU make repository
-author	Paul Smith <psmith@gnu.org>
-commit 48c8a116
-configure.ac: Support GLIBC glob interface version 2
-
-Change-Id: Id70a2b98dad6349ee56985d8dd6d4f0d87b470e6
-Signed-off-by: Martin Roth <gaumless@gmail.com>
-Reviewed-on: https://review.coreboot.org/26939
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
- .../make-4.2.1_gnu_glob_interface_v2.patch        | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
- create mode 100644 util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
-
-diff --git a/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch b/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
-new file mode 100644
-index 0000000000..466d6fdd70
--- /dev/null
-+++ b/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
-@@ -0,0 +1,15 @@
-+diff -Naur make-4.2.1/configure.ac make-4.2.1/configure.ac
-+--- make-4.2.1/configure.ac
-++++ make-4.2.1/configure.ac
-+@@ -399,10 +399,9 @@
-+ #include <glob.h>
-+ #include <fnmatch.h>
-+ 
-+-#define GLOB_INTERFACE_VERSION 1
-+ #if !defined _LIBC && defined __GNU_LIBRARY__ && __GNU_LIBRARY__ > 1
-+ # include <gnu-versions.h>
-+-# if _GNU_GLOB_INTERFACE_VERSION == GLOB_INTERFACE_VERSION
-++# if _GNU_GLOB_INTERFACE_VERSION == 1 || _GNU_GLOB_INTERFACE_VERSION == 2
-+    gnu glob
-+ # endif
-+ #endif],
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0056-util-crossgcc-update-to-gcc-8.1.0-and-binutils-2.30.patch
+++ b/patches/coreboot-4.8.1/0056-util-crossgcc-update-to-gcc-8.1.0-and-binutils-2.30.patch
--- a/patches/coreboot-4.8.1/0057-util-crosgcc-patches-update-make-4.2.1-patches.patch
+++ b/patches/coreboot-4.8.1/0057-util-crosgcc-patches-update-make-4.2.1-patches.patch
@ -1,156 +0,0 @@
-From 234eabaa8da28dfa750826c200c08959bb917b28 Mon Sep 17 00:00:00 2001
-From: Martin Roth <gaumless@gmail.com>
-Date: Sat, 21 Jul 2018 14:17:22 -0600
-Subject: [PATCH 57/59] util/crosgcc/patches: update make-4.2.1 patches
-
- Add the Do-not-assume-glibc-glob-internals patch to fix segfaults.
- Update glob_interface_v2 patch to the patch directly from the
-make git repository instead of translating it. This gives better
-attributution to the original author.
-
-Change-Id: Ibc936fc00925a4ca2170a6f5dca7c2b8d8d62f02
-Signed-off-by: Martin Roth <gaumless@gmail.com>
-Reviewed-on: https://review.coreboot.org/27591
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
- ...b-Do-not-assume-glibc-glob-internals.patch | 67 +++++++++++++++++++
- ...pport-GLIBC-glob-interface-version-2.patch | 28 ++++++++
- .../make-4.2.1_gnu_glob_interface_v2.patch    | 15 -----
- 3 files changed, 95 insertions(+), 15 deletions(-)
- create mode 100644 util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch
- create mode 100644 util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch
- delete mode 100644 util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
-
-diff --git a/util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch b/util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch
-new file mode 100644
-index 0000000000..3d45025fe1
--- /dev/null
-+++ b/util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch
-@@ -0,0 +1,67 @@
-+From 193f1e81edd6b1b56b0eb0ff8aa4b41c7b4257b4 Mon Sep 17 00:00:00 2001
-+From: Paul Eggert <eggert@cs.ucla.edu>
-+Date: Sun, 24 Sep 2017 09:12:58 -0400
-+Subject: [PATCH 53/78] glob: Do not assume glibc glob internals.
-+
-+It has been proposed that glibc glob start using gl_lstat,
-+which the API allows it to do.  GNU 'make' should not get in
-+the way of this.  See:
-+https://sourceware.org/ml/libc-alpha/2017-09/msg00409.html
-+
-+* dir.c (local_lstat): New function, like local_stat.
-+(dir_setup_glob): Use it to initialize gl_lstat too, as the API
-+requires.
-+---
-+ dir.c | 29 +++++++++++++++++++++++++++--
-+ 1 file changed, 27 insertions(+), 2 deletions(-)
-+
-+diff --git a/dir.c b/dir.c
-+index adbb8a9..c343e4c 100644
-+--- a/dir.c
-++++ b/dir.c
-+@@ -1299,15 +1299,40 @@ local_stat (const char *path, struct stat *buf)
-+ }
-+ #endif
-+ 
-++/* Similarly for lstat.  */
-++#if !defined(lstat) && !defined(WINDOWS32) || defined(VMS)
-++# ifndef VMS
-++#  ifndef HAVE_SYS_STAT_H
-++int lstat (const char *path, struct stat *sbuf);
-++#  endif
-++# else
-++    /* We are done with the fake lstat.  Go back to the real lstat */
-++#   ifdef lstat
-++#     undef lstat
-++#   endif
-++# endif
-++# define local_lstat lstat
-++#elif defined(WINDOWS32)
-++/* Windows doesn't support lstat().  */
-++# define local_lstat local_stat
-++#else
-++static int
-++local_lstat (const char *path, struct stat *buf)
-++{
-++  int e;
-++  EINTRLOOP (e, lstat (path, buf));
-++  return e;
-++}
-++#endif
-++
-+ void
-+ dir_setup_glob (glob_t *gl)
-+ {
-+   gl->gl_opendir = open_dirstream;
-+   gl->gl_readdir = read_dirstream;
-+   gl->gl_closedir = free;
-++  gl->gl_lstat = local_lstat;
-+   gl->gl_stat = local_stat;
-+-  /* We don't bother setting gl_lstat, since glob never calls it.
-+-     The slot is only there for compatibility with 4.4 BSD.  */
-+ }
-+ 
-+ void
-+-- 
-+2.18.0
-+
-diff --git a/util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch b/util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch
-new file mode 100644
-index 0000000000..53e61b8bf7
--- /dev/null
-+++ b/util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch
-@@ -0,0 +1,28 @@
-+From 48c8a116a914a325a0497721f5d8b58d5bba34d4 Mon Sep 17 00:00:00 2001
-+From: Paul Smith <psmith@gnu.org>
-+Date: Sun, 19 Nov 2017 15:09:16 -0500
-+Subject: [PATCH 68/78] * configure.ac: Support GLIBC glob interface version 2
-+
-+---
-+ configure.ac | 3 +--
-+ 1 file changed, 1 insertion(+), 2 deletions(-)
-+
-+diff --git a/configure.ac b/configure.ac
-+index 8c72568..4710832 100644
-+--- a/configure.ac
-++++ b/configure.ac
-+@@ -404,10 +404,9 @@ AC_CACHE_CHECK([if system libc has GNU glob], [make_cv_sys_gnu_glob],
-+ #include <glob.h>
-+ #include <fnmatch.h>
-+ 
-+-#define GLOB_INTERFACE_VERSION 1
-+ #if !defined _LIBC && defined __GNU_LIBRARY__ && __GNU_LIBRARY__ > 1
-+ # include <gnu-versions.h>
-+-# if _GNU_GLOB_INTERFACE_VERSION == GLOB_INTERFACE_VERSION
-++# if _GNU_GLOB_INTERFACE_VERSION == 1 || _GNU_GLOB_INTERFACE_VERSION == 2
-+    gnu glob
-+ # endif
-+ #endif],
-+-- 
-+2.18.0
-+
-diff --git a/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch b/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
-deleted file mode 100644
-index 466d6fdd70..0000000000
--- a/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
-+++ /dev/null
-@@ -1,15 +0,0 @@
-diff -Naur make-4.2.1/configure.ac make-4.2.1/configure.ac
---- make-4.2.1/configure.ac
-+++ make-4.2.1/configure.ac
-@@ -399,10 +399,9 @@
- #include <glob.h>
- #include <fnmatch.h>
- 
--#define GLOB_INTERFACE_VERSION 1
- #if !defined _LIBC && defined __GNU_LIBRARY__ && __GNU_LIBRARY__ > 1
- # include <gnu-versions.h>
--# if _GNU_GLOB_INTERFACE_VERSION == GLOB_INTERFACE_VERSION
-+# if _GNU_GLOB_INTERFACE_VERSION == 1 || _GNU_GLOB_INTERFACE_VERSION == 2
-    gnu glob
- # endif
- #endif],
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0058-util-crosgcc-Fix-most-shellcheck-errors-in-buildgcc.patch
+++ b/patches/coreboot-4.8.1/0058-util-crosgcc-Fix-most-shellcheck-errors-in-buildgcc.patch
@ -1,826 +0,0 @@
-From 987d42da1de420cb28cb7f4f979cbb01511877d6 Mon Sep 17 00:00:00 2001
-From: Martin Roth <gaumless@gmail.com>
-Date: Sun, 22 Jul 2018 11:45:29 -0600
-Subject: [PATCH 58/59] util/crosgcc: Fix most shellcheck errors in buildgcc
-
-This fixes most of the simpler shellcheck errors in shellcheck 0.4.6.
-
-There are still a few warnings left that weren't simple to fix or
-would have required more testing before I was confident in them.
-
-Change-Id: I79ab3614cc1d69d3dfe1e0374e930313f2011cbf
-Signed-off-by: Martin Roth <gaumless@gmail.com>
-Reviewed-on: https://review.coreboot.org/27598
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
- util/crossgcc/buildgcc | 298 ++++++++++++++++++++++++-----------------
- 1 file changed, 172 insertions(+), 126 deletions(-)
-
-diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
-index a9d90572cd..5823707acf 100755
--- a/util/crossgcc/buildgcc
-+++ b/util/crossgcc/buildgcc
-@@ -1,4 +1,16 @@
- #!/bin/sh
-+# shellcheck disable=SC2030,SC2031,SC2059
-+# The above line must be directly after the shebang line.
-+# Disables these warnings:
-+# 2030 - Modification of var is local (to subshell caused by pipeline).
-+#        shell check 0.4.6 gets confused by the read -t 1 command and interprets
-+#        the '1' as $1 getting modified.
-+# 2031 - var was modified in a subshell. That change might be lost.
-+#        caused by shell check bug with SC2030?  This causes any $1 from that
-+#        point on to be flagged.
-+# 2059 - Don't use variables in the printf format string. Use printf "..%s.." "$foo".
-+#        This is used for all of our color printing.
-+
- #
- # Copyright (C) 2008-2010 by coresystems GmbH
- # written by Patrick Georgi <patrick.georgi@coresystems.de> and
-@@ -16,7 +28,7 @@
- # GNU General Public License for more details.
- #
- 
-cd $(dirname $0)
-+cd "$(dirname "$0")" || exit 1
- 
- CROSSGCC_DATE="June 11th, 2018"
- CROSSGCC_VERSION="1.52"
-@@ -80,7 +92,9 @@ ALL_ARCHIVES="$GMP_ARCHIVE $MPFR_ARCHIVE $MPC_ARCHIVE \
- GMP_DIR="gmp-${GMP_VERSION}"
- MPFR_DIR="mpfr-${MPFR_VERSION}"
- MPC_DIR="mpc-${MPC_VERSION}"
-+# shellcheck disable=SC2034
- GCC_DIR="gcc-${GCC_VERSION}"
-+# shellcheck disable=SC2034
- BINUTILS_DIR="binutils-${BINUTILS_VERSION}"
- GDB_DIR="gdb-${GDB_VERSION}"
- IASL_DIR="acpica-unix2-${IASL_VERSION}"
-@@ -101,51 +115,49 @@ RED='\033[1;31m'
- green='\033[0;32m'
- GREEN='\033[1;32m'
- blue='\033[0;34m'
-BLUE='\033[1;34m'
-cyan='\033[0;36m'
- CYAN='\033[1;36m'
- NC='\033[0m' # No Color
- 
-UNAME=$(uname | grep -iq cygwin && echo Cygwin || uname)
-+UNAME=$(if uname | grep -iq cygwin; then echo Cygwin; else uname; fi)
- HALT_FOR_TOOLS=0
- 
- hostcc()
- {
- 	# $1 "host" or "target"
-	if [ "$BOOTSTRAP" = 1 -a "$1" = target ]; then
-		echo $DESTDIR$TARGETDIR/bin/gcc
-+	if [ "$BOOTSTRAP" = 1 ] && [ "$1" = target ]; then
-+		echo "$DESTDIR$TARGETDIR/bin/gcc"
- 	else
-		echo $CC
-+		echo "$CC"
- 	fi
- }
- 
- hostcxx()
- {
- 	# $1 "host" or "target"
-	if [ "$BOOTSTRAP" = 1 -a "$1" = target ]; then
-		echo $DESTDIR$TARGETDIR/bin/g++
-+	if [ "$BOOTSTRAP" = 1 ] && [ "$1" = target ]; then
-+		echo "$DESTDIR$TARGETDIR/bin/g++"
- 	else
-		echo $CXX
-+		echo "$CXX"
- 	fi
- }
- 
- normalize_dirs()
- {
-	mkdir -p $DESTDIR$TARGETDIR/lib
-	test -d $DESTDIR$TARGETDIR/lib32 && mv $DESTDIR$TARGETDIR/lib32/* $DESTDIR$TARGETDIR/lib
-	test -d $DESTDIR$TARGETDIR/lib64 && mv $DESTDIR$TARGETDIR/lib64/* $DESTDIR$TARGETDIR/lib
-	rmdir -p $DESTDIR$TARGETDIR/lib32 $DESTDIR$TARGETDIR/lib64
-+	mkdir -p "$DESTDIR$TARGETDIR/lib"
-+	test -d "$DESTDIR$TARGETDIR/lib32" && mv "$DESTDIR$TARGETDIR"/lib32/* "$DESTDIR$TARGETDIR/lib"
-+	test -d "$DESTDIR$TARGETDIR/lib64" && mv "$DESTDIR$TARGETDIR"/lib64/* "$DESTDIR$TARGETDIR/lib"
-+	rmdir -p "$DESTDIR$TARGETDIR/lib32" "$DESTDIR$TARGETDIR/lib64"
- 
-	perl -pi -e "s,/lib32,/lib," $DESTDIR$TARGETDIR/lib/*.la
-	perl -pi -e "s,/lib64,/lib," $DESTDIR$TARGETDIR/lib/*.la
-+	perl -pi -e "s,/lib32,/lib," "$DESTDIR$TARGETDIR"/lib/*.la
-+	perl -pi -e "s,/lib64,/lib," "$DESTDIR$TARGETDIR"/lib/*.la
- }
- 
- countdown()
- {
- 	tout=${1:-10}
- 
-	printf "\nPress Ctrl-C to abort, Enter to continue... %2ds" $tout
-	while [ $tout -gt 0 ]; do
-+	printf "\nPress Ctrl-C to abort, Enter to continue... %2ds" "$tout"
-+	while [ "$tout" -gt 0 ]; do
- 		sleep 1
- 		tout=$((tout - 1))
- 		printf "\b\b\b%2ds" $tout
-@@ -162,11 +174,12 @@ timeout()
- 	# Clean up in case the user aborts.
- 	trap 'kill $counter > /dev/null 2>&1' EXIT
- 
-	(countdown $tout; kill -USR1 $$)&
-+	(countdown "$tout"; kill -USR1 $$)&
- 	counter=$!
- 
- 	# Some shells with sh compatibility mode (e.g. zsh, mksh) only
- 	# let us interrupt `read` if a non-standard -t parameter is given.
-+	# shellcheck disable=SC2034,SC2039,SC2162
- 	if echo | read -t 1 foo 2>/dev/null; then
- 		read -t $((tout + 1)) foo
- 	else
-@@ -180,6 +193,7 @@ timeout()
- please_install()
- {
- 	HALT_FOR_TOOLS=1
-+	# shellcheck disable=SC1091
- 	test -r /etc/os-release && . /etc/os-release
- 	# vanilla debian doesn't define `ID_LIKE`, just `ID`
- 	if [ -z "${ID_LIKE}" ] && [ -n "${ID}" ]; then
-@@ -210,59 +224,60 @@ searchtool()
- 		search="$2"
- 	fi
- 	for i in "$1" "g$1" "gnu$1"; do
-		if [ -x "$(command -v $i 2>/dev/null)" ]; then
-+		if [ -x "$(command -v "$i" 2>/dev/null)" ]; then
- 			if [ "$(cat /dev/null | $i --version 2>&1 | grep -c "$search")" \
- 			    -gt 0 ]; then
-				echo $i
-+				echo "$i"
- 				return
- 			fi
- 		fi
- 	done
- 	# A workaround for OSX 10.9 and some BSDs, whose nongnu
- 	# patch and tar also work.
-	if [ $UNAME = "Darwin" -o $UNAME = "FreeBSD" -o $UNAME = "NetBSD" -o $UNAME = "OpenBSD" ]; then
-		if [ "$1" = "patch" -o "$1" = "tar" ]; then
-			if [ -x "$(command -v $1 2>/dev/null)" ]; then
-				echo $1
-+	if [ "$UNAME" = "Darwin" ] || [ "$UNAME" = "FreeBSD" ] || [ "$UNAME" = "NetBSD" ] || [ "$UNAME" = "OpenBSD" ]; then
-+		if [ "$1" = "patch" ] || [ "$1" = "tar" ]; then
-+			if [ -x "$(command -v "$1" 2>/dev/null)" ]; then
-+				echo "$1"
- 				return
- 			fi
- 		fi
- 	fi
-	if echo $1 | grep -q "sum" ; then
-		algor=$(echo $1 | sed -e 's,sum,,')
-		if [ -x "$(command -v $1 2>/dev/null)" ]; then
-+	if echo "$1" | grep -q "sum" ; then
-+		algor=$(echo "$1" | sed -e 's,sum,,')
-+		if [ -x "$(command -v "$1" 2>/dev/null)" ]; then
- 			#xxxsum [file]
-			echo $1
-+			echo "$1"
- 			return
-		elif [ -x "$(command -v $algor 2>/dev/null)" ]; then
-+		elif [ -x "$(command -v "$algor" 2>/dev/null)" ]; then
- 			#xxx [file]
-			echo $algor
-+			echo "$algor"
- 			return
- 		elif [ -x "$(command -v openssl 2>/dev/null)" ]; then
- 			#openssl xxx [file]
-			echo openssl $algor
-+			echo openssl "$algor"
- 			return
- 		elif [ -x "$(command -v cksum 2>/dev/null)" ]; then
- 			#cksum -a xxx [file]
- 			#cksum has special options in NetBSD. Actually, NetBSD will use the second case above.
-			echo "buildgcc" | cksum -a $algor > /dev/null 2>/dev/null && \
-			echo cksum -a $algor
-+			echo "buildgcc" | cksum -a "$algor" > /dev/null 2>/dev/null && \
-+			echo cksum -a "$algor"
- 			return
- 		fi
- 	fi
- 
-	[ -z "$3" ] && please_install $1 $4
-+	[ -z "$3" ] && please_install "$1" "$4"
- 	false
- }
- 
- # Run a compile check of the specified library option to see if it's installed
- check_for_library() {
-	local LIBRARY_FLAGS=$1
-	local LIBRARY_PACKAGES="$2"
-	local LIBTEST_FILE=.libtest
-+	LIBRARY_FLAGS="$1"
-+	LIBRARY_PACKAGES="$2"
-+	LIBTEST_FILE=.libtest
- 
- 	echo "int main(int argc, char **argv) { (void) argc; (void) argv; return 0; }" > "${LIBTEST_FILE}.c"
- 
-+	# shellcheck disable=SC2086
- 	"$CC" $CFLAGS $LIBRARY_FLAGS "${LIBTEST_FILE}.c" -o "${LIBTEST_FILE}" >/dev/null 2>&1 || \
- 		please_install "$LIBRARY_PACKAGES"
- 	rm -rf "${LIBTEST_FILE}.c" "${LIBTEST_FILE}"
-@@ -307,22 +322,23 @@ ada_requested() {
- 
- download() {
- 	package=$1
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
- 
-	FILE=$(basename $archive)
-+	FILE=$(basename "$archive")
- 	printf " * $FILE "
- 
-	if test -f tarballs/$FILE; then
-+	if test -f "tarballs/$FILE"; then
- 		printf "(cached)... "
- 	else
- 		printf "(downloading from $archive)"
-		rm -f tarballs/$FILE
-		cd tarballs
-		download_showing_percentage $archive
-+		rm -f "tarballs/$FILE"
-+		cd tarballs || exit 1
-+		download_showing_percentage "$archive"
- 		cd ..
- 	fi
- 
-	if [ ! -f tarballs/$FILE ]; then
-+	if [ ! -f "tarballs/$FILE" ]; then
- 		printf "${RED}Failed to download $FILE.${NC}\n"
- 		exit 1
- 	fi
-@@ -332,6 +348,7 @@ download() {
- # hexadecimal hash).
- compute_hash() {
- 	package=$1
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
- 	file="$(basename "$archive")"
- 
-@@ -345,6 +362,7 @@ compute_hash() {
- 
- error_hash_missing() {
- 	package="$1"
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
- 	file="$(basename "$archive")"
- 
-@@ -361,6 +379,7 @@ error_hash_missing() {
- # Read the known hash file of the package given in $1, and print it raw.
- get_known_hash() {
- 	package=$1
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
- 	file="$(basename "$archive")"
- 	hashfile="sum/$file.cksum"
-@@ -373,13 +392,14 @@ get_known_hash() {
- 		exit 1
- 	fi
- 
-	cat "$hashfile" | sed -e 's@.*\([0-9a-f]\{40,\}\).*@\1@'
-+	sed -e 's@.*\([0-9a-f]\{40,\}\).*@\1@' < "$hashfile"
- }
- 
- error_hash_mismatch() {
- 	package=$1
- 	known_hash="$2"
- 	computed_hash="$3"
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
- 	file="$(basename "$archive")"
- 
-@@ -400,6 +420,7 @@ error_hash_mismatch() {
- # hash; Bail out on mismatch or missing hash file.
- verify_hash() {
- 	package=$1
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
- 
- 	known_hash="$(get_known_hash "$package")" || exit "$?"
-@@ -410,17 +431,19 @@ verify_hash() {
- 		exit 1
- 	fi
- 
-	printf "${GREEN}hash verified ("$known_hash")${NC}\n"
-+	printf "${GREEN}hash verified (\"$known_hash\")${NC}\n"
- }
- 
- unpack_and_patch() {
-	package=$1
-+	package="$1"
-+	# shellcheck disable=SC2086
- 	archive="$(eval echo \$$package"_ARCHIVE")"
-+	# shellcheck disable=SC2086
- 	dir="$(eval echo \$$package"_DIR")"
-	test -d ${dir} && test -f ${dir}/.unpack_success || (
-		printf " * $(basename $archive)\n"
-+	test -d "${dir}" && test -f "${dir}/.unpack_success" || (
-+		printf " * $(basename "$archive")\n"
- 		FLAGS=zxf
-		suffix=$(echo $archive | sed 's,.*\.,,')
-+		suffix=$(echo "$archive" | sed 's,.*\.,,')
- 		if [ "$suffix" = "gz" ] && [ -n "$PIGZ" ]; then FLAGS="-I pigz -xf"
- 		elif [ "$suffix" = "gz" ]; then FLAGS=zxf
- 		elif [ "$suffix" = "bz2" ] && [ -n "$LBZIP2" ]; then FLAGS="-I lbzip2 -xf"
-@@ -428,22 +451,24 @@ unpack_and_patch() {
- 		elif [ "$suffix" = "xz" ]; then FLAGS="--xz -xf"
- 		elif [ "$suffix" = "lzma" ]; then FLAGS="--lzma -xf"
- 		fi
-		$TAR $FLAGS tarballs/$(basename $archive)
-+		# shellcheck disable=SC2086
-+		$TAR $FLAGS "tarballs/$(basename "$archive")"
- 		for patch in patches/${dir}_*.patch; do
-			test -r $patch || continue
-			printf "   o $(basename $patch)\n"
-			(cd ${dir} && $PATCH -s -N -p1 <../${patch}) || {
-+			test -r "$patch" || continue
-+			printf "   o $(basename "$patch")\n"
-+			(cd "${dir}" || exit 1; $PATCH -s -N -p1 <"../${patch}") || {
- 				printf "\n${RED}Failed $patch.${NC}\n"
- 				exit 1
- 			}
- 		done
-		touch ${dir}/.unpack_success
-+		touch "${dir}/.unpack_success"
- 	)
- }
- 
- fn_exists()
- {
-	type $1 >/dev/null 2>&1
-+	# shellcheck disable=SC2039
-+	type "$1" >/dev/null 2>&1
- }
- 
- is_package_enabled()
-@@ -468,7 +493,7 @@ generic_build()
- 	success=$4
- 	version=$5
- 
-	fn_exists build_$package || return
-+	fn_exists "build_$package" || return
- 
- 	mkdir -p "$builddir"
- 
-@@ -477,10 +502,10 @@ generic_build()
- 	else
- 		printf "Building $package v$version for $host_target ... "
- 		DIR="$PWD"
-		cd "$builddir"
-+		cd "$builddir" || exit 1
- 		rm -f .failed
-		build_${package} $host_target > build.log 2>&1
-		cd "$DIR"
-+		"build_${package}" "$host_target" > build.log 2>&1
-+		cd "$DIR" || exit 1
- 		if [ ! -f "$builddir/.failed" ]; then
- 			touch "$success";
- 		else
-@@ -494,6 +519,7 @@ generic_build()
- build_for_host()
- {
- 	package="$1"
-+	# shellcheck disable=SC2086
- 	version="$(eval echo \$$package"_VERSION")"
- 	generic_build "$package" host "build-$package" "${DESTDIR}${TARGETDIR}/.${package}.${version}.success" "$version"
- }
-@@ -501,19 +527,20 @@ build_for_host()
- build_for_target()
- {
- 	package="$1"
-+	# shellcheck disable=SC2086
- 	version="$(eval echo \$$package"_VERSION")"
- 	generic_build "$package" target "build-${TARGETARCH}-$package" "${DESTDIR}${TARGETDIR}/.${TARGETARCH}-${package}.${version}.success" "$version"
- }
- 
- build()
- {
-	if package_uses_targetarch $1; then
-		if [ $BOOTSTRAP -eq 1 -a ! -f "${DESTDIR}${TARGETDIR}/.GCC.${GCC_VERSION}.success" ]; then
-+	if package_uses_targetarch "$1"; then
-+		if [ $BOOTSTRAP -eq 1 ] && [ ! -f "${DESTDIR}${TARGETDIR}/.GCC.${GCC_VERSION}.success" ]; then
- 			build_for_host GCC
- 		fi
-		build_for_target $1
-+		build_for_target "$1"
- 	else
-		build_for_host $1
-+		build_for_host "$1"
- 	fi
- }
- 
-@@ -532,7 +559,8 @@ cleanup()
- 
- 	printf "Cleaning up temporary files... "
- 	for package in $PACKAGES; do
-		rm -rf build-${TARGETARCH}-$package build-$package $(eval echo \$$package"_DIR")
-+		# shellcheck disable=SC2086
-+		rm -rf "build-${TARGETARCH}-$package" "build-$package" "$(eval echo \$$package"_DIR")"
- 	done
- 	rm -f getopt
- 	printf "${green}ok${NC}\n"
-@@ -601,14 +629,15 @@ EOF
- }
- 
- have_hostcflags_from_gmp() {
-	grep -q __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h >/dev/null 2>&1
-+	grep -q __GMP_CFLAGS "$DESTDIR$TARGETDIR/include/gmp.h" >/dev/null 2>&1
- }
- 
- set_hostcflags_from_gmp() {
- 	# Now set CFLAGS to match GMP CFLAGS but strip out -pedantic
- 	# as GCC 4.6.x fails if it's there.
-	export HOSTCFLAGS="$(grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2 |\
-+	HOSTCFLAGS="$(grep __GMP_CFLAGS "$DESTDIR$TARGETDIR/include/gmp.h" |cut -d\" -f2 |\
- 	    sed s,-pedantic,,)"
-+	export HOSTCFLAGS
- }
- 
- build_GMP() {
-@@ -619,10 +648,12 @@ build_GMP() {
- 		OPTIONS="$OPTIONS --with-pic"
- 	fi
- 
-+	# shellcheck disable=SC2086
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" \
- 	../${GMP_DIR}/configure --disable-shared --enable-fat \
-		--prefix=$TARGETDIR $OPTIONS \
-+		--prefix="$TARGETDIR" $OPTIONS \
- 		|| touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- 
-@@ -632,12 +663,13 @@ build_GMP() {
- }
- 
- build_MPFR() {
-	test $UNAME = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL"
-+	test "$UNAME" = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL"
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" \
-	../${MPFR_DIR}/configure --disable-shared --prefix=$TARGETDIR \
-		--infodir=$TARGETDIR/info \
-		--with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \
-+	../${MPFR_DIR}/configure --disable-shared --prefix="$TARGETDIR" \
-+		--infodir="$TARGETDIR/info" \
-+		--with-gmp="$DESTDIR$TARGETDIR" CFLAGS="$HOSTCFLAGS" || \
- 		touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- 
-@@ -645,28 +677,29 @@ build_MPFR() {
- 
- 	# work around build problem of libgmp.la
- 	if [ "$DESTDIR" != "" ]; then
-	    perl -pi -e "s,$DESTDIR,," $DESTDIR$TARGETDIR/lib/libgmp.la
-+	    perl -pi -e "s,$DESTDIR,," "$DESTDIR$TARGETDIR/lib/libgmp.la"
- 	fi
- }
- 
- build_MPC() {
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" \
-	../${MPC_DIR}/configure --disable-shared --prefix=$TARGETDIR \
-		--infodir=$TARGETDIR/info --with-mpfr=$DESTDIR$TARGETDIR \
-		--with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \
-+	../${MPC_DIR}/configure --disable-shared --prefix="$TARGETDIR" \
-+		--infodir="$TARGETDIR/info" --with-mpfr="$DESTDIR$TARGETDIR" \
-+		--with-gmp="$DESTDIR$TARGETDIR" CFLAGS="$HOSTCFLAGS" || \
- 		touch .failed
- 
- 	# work around build problem of libmpfr.la
- 	if [ "$DESTDIR" != "" ]; then
-	    perl -pi -e "s,$TARGETDIR/lib/libgmp.la,$DESTDIR\$&," $DESTDIR$TARGETDIR/lib/libmpfr.la
-+	    perl -pi -e "s,$TARGETDIR/lib/libgmp.la,$DESTDIR\$&," "$DESTDIR$TARGETDIR/lib/libmpfr.la"
- 	fi
- 
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- 
- 	# work around build problem of libmpfr.la
- 	if [ "$DESTDIR" != "" ]; then
-	    perl -pi -e "s,$DESTDIR,," $DESTDIR$TARGETDIR/lib/libmpfr.la
-+	    perl -pi -e "s,$DESTDIR,," "$DESTDIR$TARGETDIR/lib/libmpfr.la"
- 	fi
- 
- 	normalize_dirs
-@@ -677,7 +710,7 @@ build_BINUTILS() {
- 		ADDITIONALTARGET=",i386-elf"
- 	fi
- 	CC="$(hostcc target)" CXX="$(hostcxx target)" \
-	../binutils-${BINUTILS_VERSION}/configure --prefix=$TARGETDIR \
-+	../binutils-${BINUTILS_VERSION}/configure --prefix="$TARGETDIR" \
- 		--target=${TARGETARCH} --enable-targets=${TARGETARCH}${ADDITIONALTARGET} \
- 		--disable-werror --disable-nls --enable-lto --enable-gold \
- 		--enable-interwork --enable-multilib \
-@@ -685,11 +718,13 @@ build_BINUTILS() {
- 		CFLAGS="$HOSTCFLAGS" \
- 		CXXFLAGS="$HOSTCFLAGS" \
- 		|| touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- }
- 
- bootstrap_GCC() {
-+	# shellcheck disable=SC2086
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" \
- 		CFLAGS="$HOSTCFLAGS" \
- 		CFLAGS_FOR_BUILD="$HOSTCFLAGS" \
-@@ -698,17 +733,18 @@ bootstrap_GCC() {
- 		CXXFLAGS_FOR_BUILD="$HOSTCFLAGS" \
- 		CXXFLAGS_FOR_TARGET="$HOSTCFLAGS -fPIC" \
- 		../gcc-${GCC_VERSION}/configure \
-		--prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
-+		--prefix="$TARGETDIR" --libexecdir="$TARGETDIR/lib" \
- 		--enable-bootstrap \
- 		--disable-werror --disable-nls \
- 		--disable-shared --disable-multilib \
- 		--disable-libssp --disable-libquadmath --disable-libcc1 \
- 		--disable-libsanitizer \
- 		${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
-		--with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
-		--with-mpc=$DESTDIR$TARGETDIR \
-+		--with-gmp="$DESTDIR$TARGETDIR" --with-mpfr="$DESTDIR$TARGETDIR" \
-+		--with-mpc="$DESTDIR$TARGETDIR" \
- 		--with-pkgversion="coreboot bootstrap v$CROSSGCC_VERSION $CROSSGCC_DATE" \
- 		&& \
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS BOOT_CFLAGS="$HOSTCFLAGS" BUILD_CONFIG="" bootstrap && \
- 	$MAKE	install-gcc \
- 		install-target-libgcc \
-@@ -731,6 +767,7 @@ build_cross_GCC() {
- 	# libiberty is not compiled with CFLAGS_FOR_BUILD.
- 	# Also set the CXX version of the flags because GCC is now compiled
- 	# using C++.
-+	# shellcheck disable=SC2086
- 	CC="$(hostcc target)" CXX="$(hostcxx target)" \
- 		CFLAGS_FOR_TARGET="-O2 -Dinhibit_libc" \
- 		CFLAGS="$HOSTCFLAGS $CLANGFLAGS" \
-@@ -738,7 +775,7 @@ build_cross_GCC() {
- 		CXXFLAGS="$HOSTCFLAGS $CLANGCXXFLAGS" \
- 		CXXFLAGS_FOR_BUILD="$HOSTCFLAGS $CLANGCXXFLAGS" \
- 		../gcc-${GCC_VERSION}/configure \
-		--prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
-+		--prefix="$TARGETDIR" --libexecdir="$TARGETDIR/lib" \
- 		--target=${TARGETARCH} --disable-werror --disable-shared \
- 		--enable-lto --enable-plugins --enable-gold --enable-ld=default \
- 		--disable-libssp --disable-bootstrap --disable-nls \
-@@ -748,16 +785,17 @@ build_cross_GCC() {
- 		--disable-libatomic --disable-libcc1 --disable-decimal-float \
- 		${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
- 		--with-system-zlib \
-		--with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
-		--with-mpc=$DESTDIR$TARGETDIR \
-+		--with-gmp="$DESTDIR$TARGETDIR" --with-mpfr="$DESTDIR$TARGETDIR" \
-+		--with-mpc="$DESTDIR$TARGETDIR" \
- 		--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
- 		&& \
- 	mkdir -p gcc/$TARGETARCH && \
-	ln -s $DESTDIR$TARGETDIR/$TARGETARCH/bin gcc/$TARGETARCH/$GCC_VERSION && \
-+	ln -s "$DESTDIR$TARGETDIR/$TARGETARCH/bin" "gcc/$TARGETARCH/$GCC_VERSION" && \
- 	$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
-	$MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
-+	$MAKE install-gcc DESTDIR="$DESTDIR" || touch .failed
- 
-	if [ ! -f .failed -a "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
-+	if [ ! -f .failed ] && [ "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
-+		# shellcheck disable=SC2086
- 		$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc && \
- 		$MAKE install-target-libgcc DESTDIR=$DESTDIR || touch .failed
- 	fi
-@@ -765,15 +803,15 @@ build_cross_GCC() {
- 
- build_GCC() {
- 	if [ "$1" = host ]; then
-		bootstrap_GCC $1
-+		bootstrap_GCC "$1"
- 	else
-		build_cross_GCC $1
-+		build_cross_GCC "$1"
- 	fi
- }
- 
- build_EXPAT() {
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS"
-	../${EXPAT_DIR}/configure --disable-shared --prefix=$TARGETDIR \
-+	../${EXPAT_DIR}/configure --disable-shared --prefix="$TARGETDIR" \
- 		|| touch .failed
- 	$MAKE || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
-@@ -783,8 +821,9 @@ build_EXPAT() {
- 
- build_PYTHON() {
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS"
-	../${PYTHON_DIR}/configure --prefix=$TARGETDIR \
-+	../${PYTHON_DIR}/configure --prefix="$TARGETDIR" \
- 		|| touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- 
-@@ -793,62 +832,66 @@ build_PYTHON() {
- 
- build_GDB() {
- 	export PYTHONHOME=$DESTDIR$TARGETDIR
-	if [ $(uname) != "FreeBSD" -a $(uname) != "NetBSD" ]; then
-+	if [ "$UNAME" != "FreeBSD" ] && [ "$UNAME" != "NetBSD" ]; then
- 		LIBDL="-ldl"
- 	fi
- 	LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$TARGETDIR/lib \
- 		 -lpthread $LIBDL -lutil" \
- 	CC="$(hostcc target)" CXX="$(hostcxx target)" \
- 	CFLAGS="$HOSTCFLAGS -I$DESTDIR$TARGETDIR/include" \
-	../${GDB_DIR}/configure --prefix=$TARGETDIR \
-+	../${GDB_DIR}/configure --prefix="$TARGETDIR" \
- 		--target=${TARGETARCH} --disable-werror --disable-nls
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- }
- 
- build_IASL() {
- 	RDIR=$PWD
-	cd ../$IASL_DIR/generate/unix
-+	cd ../$IASL_DIR/generate/unix || exit 1
- 	CFLAGS="$HOSTCFLAGS"
- 	HOST="_LINUX"
-	test $UNAME = "Darwin" && HOST="_APPLE"
-	test $UNAME = "FreeBSD" && HOST="_FreeBSD"
-	test $UNAME = "Cygwin" && HOST="_CYGWIN"
-+	test "$UNAME" = "Darwin" && HOST="_APPLE"
-+	test "$UNAME" = "FreeBSD" && HOST="_FreeBSD"
-+	test "$UNAME" = "Cygwin" && HOST="_CYGWIN"
- 	HOST="$HOST" CFLAGS="$CFLAGS" \
- 	OPT_CFLAGS="-O -D_FORTIFY_SOURCE=2 -D COREBOOT_TOOLCHAIN_VERSION='\"coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE\"' " \
-	$MAKE CC="$(hostcc host)" iasl || touch $RDIR/.failed
-	rm -f $DESTDIR$TARGETDIR/bin/iasl || touch $RDIR/.failed
-	cp bin/iasl $DESTDIR$TARGETDIR/bin || touch $RDIR/.failed
-+	$MAKE CC="$(hostcc host)" iasl || touch "$RDIR/.failed"
-+	rm -f "$DESTDIR$TARGETDIR/bin/iasl" || touch "$RDIR/.failed"
-+	cp bin/iasl "$DESTDIR$TARGETDIR/bin" || touch "$RDIR/.failed"
- }
- 
- build_LLVM() {
-	cd ..
-	ln -sf $PWD/$CFE_DIR  $LLVM_DIR/tools/clang
-	ln -sf $PWD/$CTE_DIR  $LLVM_DIR/tools/clang/tools/extra
-	ln -sf $PWD/$CRT_DIR  $LLVM_DIR/projects/compiler-rt
-	cd -
- 
-	$CMAKE -G "Unix Makefiles" -DCMAKE_INSTALL_PREFIX=$DESTDIR$TARGETDIR \
-+	cd .. || exit 1
-+	ln -sf "$PWD/$CFE_DIR"  "$LLVM_DIR/tools/clang"
-+	ln -sf "$PWD/$CTE_DIR"  "$LLVM_DIR/tools/clang/tools/extra"
-+	ln -sf "$PWD/$CRT_DIR"  "$LLVM_DIR/projects/compiler-rt"
-+	cd - || exit 1
-+
-+	$CMAKE -G "Unix Makefiles" -DCMAKE_INSTALL_PREFIX="$DESTDIR$TARGETDIR" \
- 		-DCLANG_VENDOR="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE - " \
- 		-DCMAKE_BUILD_TYPE=Release ../$LLVM_DIR || touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install || touch .failed
- 
-	cp -a ../$CFE_DIR/tools/scan-build/* $DESTDIR$TARGETDIR/bin
-	cp -a ../$CFE_DIR/tools/scan-view/* $DESTDIR$TARGETDIR/bin
-+	cp -a ../$CFE_DIR/tools/scan-build/* "$DESTDIR$TARGETDIR/bin"
-+	cp -a ../$CFE_DIR/tools/scan-view/* "$DESTDIR$TARGETDIR/bin"
- 
- 	# create symlinks to work around broken --print-librt-file-name
- 	# when used with -target.
-	cd $DESTDIR$TARGETDIR/lib/clang/${CLANG_VERSION}/lib
-+	cd "$DESTDIR$TARGETDIR/lib/clang/${CLANG_VERSION}/lib" || exit 1
- 	for i in */libclang_rt.builtins*.a; do
-		ln -s $i .
-+		ln -s "$i" .
- 	done
- }
- 
- build_MAKE() {
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS" \
-	../${MAKE_DIR}/configure --prefix=$TARGETDIR --disable-nls \
-+	../${MAKE_DIR}/configure --prefix="$TARGETDIR" --disable-nls \
- 		|| touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- 
-@@ -857,8 +900,9 @@ build_MAKE() {
- 
- build_CMAKE() {
- 	CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS" \
-	../${CMAKE_DIR}/configure --prefix=$TARGETDIR \
-+	../${CMAKE_DIR}/configure --prefix="$TARGETDIR" \
- 		 || touch .failed
-+	# shellcheck disable=SC2086
- 	$MAKE $JOBS || touch .failed
- 	$MAKE install DESTDIR=$DESTDIR || touch .failed
- 
-@@ -900,6 +944,7 @@ else
- 	# Detected non-GNU getopt
- 	args=$(getopt Vhcd:bBp:l:P:j:D:tSys:un $*)
- 	getopt_ret=$?
-+	# shellcheck disable=SC2086
- 	set -- $args
- fi
- 
-@@ -1026,8 +1071,8 @@ if searchtool wget "GNU" nofail > /dev/null; then
- 	download_showing_percentage() {
- 		url=$1
- 		printf "... ${red}  0%%"
-		wget $url 2>&1 | while read line; do
-			echo $line | grep -o "[0-9]\+%" | awk '{printf("\b\b\b\b%4s", $1)}'
-+		wget "$url" 2>&1 | while read -r line; do
-+			echo "$line" | grep -o "[0-9]\+%" | awk '{printf("\b\b\b\b%4s", $1)}'
- 		done
- 		printf "${NC}... "
- 	}
-@@ -1035,7 +1080,7 @@ elif searchtool curl "^curl " > /dev/null; then
- 	download_showing_percentage() {
- 		url=$1
- 		echo
-		curl -#OL $url
-+		curl -#OL "$url"
- 	}
- fi
- 
-@@ -1089,7 +1134,7 @@ if is_package_enabled "GCC"; then
- # sane preset: let the configure script figure out things by itself
- # more importantly, avoid any values that might already linger in the variable
- OPTIONS="ABI="
-if [ $UNAME = "Darwin" ]; then
-+if [ "$UNAME" = "Darwin" ]; then
- 	#GCC_OPTIONS="$GCC_OPTIONS --enable-threads=posix"
- 
- 	# generally the OS X compiler can create x64 binaries.
-@@ -1097,7 +1142,7 @@ if [ $UNAME = "Darwin" ]; then
- 	# binaries in 10.6 (even if the kernel is 32bit)
- 	# For some weird reason, 10.5 autodetects an ABI=64 though
- 	# so we're setting the ABI explicitly here.
-	if [ $(sysctl -n hw.optional.x86_64 2>/dev/null) -eq 1 ] 2>/dev/null; then
-+	if [ "$(sysctl -n hw.optional.x86_64 2>/dev/null)" -eq 1 ] 2>/dev/null; then
- 		OPTIONS="ABI=64"
- 	else
- 		OPTIONS="ABI=32"
-@@ -1109,13 +1154,13 @@ if [ $UNAME = "Darwin" ]; then
- 	if $CC -v 2>&1 | grep -q LLVM; then
- 		CC=llvm-gcc
- 	fi
-elif [ $UNAME = "Linux" -o $UNAME = "Cygwin" ]; then
-+elif [ "$UNAME" = "Linux" ] || [ "$UNAME" = "Cygwin" ]; then
- 	# gmp is overeager with detecting 64bit CPUs even if they run
- 	# a 32bit kernel and userland.
- 	if [ "$(uname -m 2>/dev/null)" = "i686" ]; then
- 		OPTIONS="ABI=32"
- 	fi
-elif [ $UNAME = "NetBSD" ]; then
-+elif [ "$UNAME" = "NetBSD" ]; then
- 	# same for NetBSD but this one reports an i386
- 	if [ "$(uname -m 2>/dev/null)" = "i386" ]; then
- 		OPTIONS="ABI=32"
-@@ -1149,9 +1194,10 @@ if [ -z "${LANGUAGES}" ]; then
- fi
- if ada_requested; then
- 	if have_gnat; then
-		if [ "$BOOTSTRAP" != 1 -a \
-		     \( "$(hostcc_major)" -lt 4 -o \
-		        \( "$(hostcc_major)" -eq 4 -a "$(hostcc_minor)" -lt 9 \) \) ]
-+		if [ "$BOOTSTRAP" != 1 ] && \
-+			\( [ "$(hostcc_major)" -lt 4 ] || \
-+			\( [ "$(hostcc_major)" -eq 4 ] && \
-+			[ "$(hostcc_minor)" -lt 9 ] \) \) ]
- 		then
- 			printf "\n${red}WARNING${NC}\n"
- 			printf "Building the Ada compiler (GNAT $(buildcc_version)) with a host compiler older\n"
-@@ -1167,7 +1213,7 @@ if ada_requested; then
- 		exit 1
- 	fi
- else
-	if [ "$(hostcc_major)" -lt 4 -a "$BOOTSTRAP" != 1 ]; then
-+	if [ "$(hostcc_major)" -lt 4 ] && [ "$BOOTSTRAP" != 1 ]; then
- 		printf "\n${red}WARNING${NC}\n"
- 		printf "Building GCC $(buildcc_version) with a very old host compiler ($(hostcc_version)).\n"
- 		printf "Bootstrapping (-b) is recommended.\n"
-@@ -1187,8 +1233,8 @@ fi
- 
- # Prepare target directory for building GCC
- # (dependencies must be in the PATH)
-mkdir -p $DESTDIR$TARGETDIR/bin
-mkdir -p $DESTDIR$TARGETDIR/share
-+mkdir -p "$DESTDIR$TARGETDIR/bin"
-+mkdir -p "$DESTDIR$TARGETDIR/share"
- export PATH=$DESTDIR$TARGETDIR/bin:$PATH
- 
- # Download, unpack, patch and build all packages
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0059-util-Add-description.md-to-each-util.patch
+++ b/patches/coreboot-4.8.1/0059-util-Add-description.md-to-each-util.patch
@ -1,29 +0,0 @@
-From 8ba9e8cf63f92902cdb71eb5c4d3b3ea579380f4 Mon Sep 17 00:00:00 2001
-From: Tom Hiller <thrilleratplay@gmail.com>
-Date: Sat, 21 Jul 2018 00:14:00 -0400
-Subject: [PATCH 59/59] util: Add description.md to each util
-
-Descriptions are taken from the files themselves or READMEs. Description
-followed by a space with the language in marked up as code.
-
-Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c
-Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
-Reviewed-on: https://review.coreboot.org/27563
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
---
- util/crossgcc/description.md | 1 +
- 1 file changed, 1 insertion(+)
- create mode 100644 util/crossgcc/description.md
-
-diff --git a/util/crossgcc/description.md b/util/crossgcc/description.md
-new file mode 100644
-index 0000000000..fa37c2b6ab
--- /dev/null
-+++ b/util/crossgcc/description.md
-@@ -0,0 +1 @@
-+A cross toolchain builder for -elf toolchains (ie. no libc support)
-- 
-2.17.1
-
--- a/patches/coreboot-4.8.1/0060-enable-tpm-on-t430.patch
+++ b/patches/coreboot-4.8.1/0060-enable-tpm-on-t430.patch
@ -1,23 +0,0 @@
-mb/lenovo/t430/devicetree: Add missing TPM entry
-Tested on Lenovo T430:
-The TPM is advertised through ACPI tables and the version can be
-read using tpm_version, tcsd and tpm_tis.
-Change-Id: I0b0c39e7aa1be4a479325d4b5eff5892a7e2f69f
-Signed-off-by: Patrick Rudolph <siro@das-labor.org>
-Reviewed-on: https://review.coreboot.org/26780
-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
-Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-Original Commit at: https://review.coreboot.org/c/coreboot/+/26780
--- ./src/mainboard/lenovo/t430/devicetree.cb	2020-01-15 17:42:17.441317488 +0000
-+++ ./src/mainboard/lenovo/t430/devicetree.cb	2020-01-15 17:37:39.889846000 +0000
-@@ -165,6 +165,9 @@
- 
- 					register "has_thinker1" = "0"
- 				end
-+				chip drivers/pc80/tpm
-+					device pnp 0c31.0 on end
-+				end
- 			end
- 			device pci 1f.2 on # SATA Controller 1
- 				subsystemid 0x17aa 0x21f3
--- a/patches/coreboot-4.8.1/0061-bincfg-Intel_GBE_82579LM_set_and_spec.patch
+++ b/patches/coreboot-4.8.1/0061-bincfg-Intel_GBE_82579LM_set_and_spec.patch
@ -1,471 +0,0 @@
-diff --git a/util/bincfg/Makefile b/util/bincfg/Makefile
-index 1b3e936..f568e67 100644
--- a/util/bincfg/Makefile
-+++ b/util/bincfg/Makefile
-
-@@ -19,6 +19,13 @@
- 	cat gbe1.bin gbe1.bin > flashregion_3_gbe.bin
- 	rm -f gbe1.bin
- 
-+# Use this target to generate GbE for X220/x230
-+gen-gbe-82579LM:
-+	./bincfg gbe-82579LM.spec gbe-82579LM.set gbe1.bin
-+	# duplicate binary as per spec
-+	cat gbe1.bin gbe1.bin > flashregion_3_gbe.bin
-+	rm -f gbe1.bin
-+
- # Use this target to generate IFD for X200
- gen-ifd-x200:
- 	./bincfg ifd-x200.spec ifd-x200.set flashregion_0_fd.bin
-
-diff --git a/util/bincfg/gbe-82579LM.set b/util/bincfg/gbe-82579LM.set
-new file mode 100644
-index 0000000..01ae470
--- /dev/null
-+++ b/util/bincfg/gbe-82579LM.set
-
-@@ -0,0 +1,288 @@
-+# SPDX-License-Identifier: GPL-3.0-or-later
-+
-+#
-+# Datasheets:
-+#
-+# https://cdrdv2.intel.com/v1/dl/getContent/613456
-+
-+# The datasheet says that this spec covers the following pci ids:
-+# 8086:1502 - Intel 82579LM gigabit ethernet controller
-+# 8086:1503 - Intel 82579V gigabit ethernet controller
-+
-+# Naming convention
-+# * Word groups separated by a blank line
-+# * Word groups with known meaning given a prefix
-+#	* prefix will be defined in comment before group
-+# * Variable names to be named using a prefix, descriptive name and bit offset
-+#   within the word, separated by an underscore.
-+#	* Example: "prefix_description_0"
-+# * Unidentified reserved word groups will be named reserved and LAN Word
-+#	* EXCEPTION: Word 0x24, Word 0x25, Word 0x26 also include bit offset
-+#   	  within the word
-+#   Offset hex address, separated by an underscore.
-+#	* Example: "reserved_x03"
-+# * Nonprefixed names will be  named reserved and LAN Word Offset hex address,
-+#   separated by an underscore.
-+#	* Example: "imageversioninfo_x05"
-+# * Unspecified words are prefixed with "offset_"
-+
-+# GbE values for 82579LM
-+{
-+	# This example sets MAC address to 00:DE:AD:C0:FF:EE
-+	# USE YOUR DEVICES MAC ADDRESS!!
-+	# prefix: "mac_"
-+	"mac_address_0" = 0x00,
-+	"mac_address_1" = 0xDE,
-+	"mac_address_2" = 0xAD,
-+	"mac_address_3" = 0xC0,
-+	"mac_address_4" = 0xFF,
-+	"mac_address_5" = 0xEE,
-+
-+	# Reserved (Word 0x3)
-+	"reserved_x03" = 0x0800,
-+
-+	# Reserved (Word 0x04)
-+	"reserved_x04" = 0xffff,
-+
-+	# Image Version Information (Word 0x05)
-+	"imageversioninfo_x05" = 0x00D3,
-+
-+	"reserved_x06" = 0xffff,
-+	"reserved_x07" = 0xffff,
-+
-+	# PBA Low and PBA High (Words 0x08 and 0x09)
-+	# prefix: "pba_"
-+	"pba_low_x08" = 0xffff,
-+	"pba_high_x09" = 0xffff,
-+
-+	# PCI Init Control Word (Word 0x0A)
-+	# prefix: "pci_"
-+	"pci_loaddeviceid_0" = 1,
-+	"pci_loadsubsystemid_1" = 1,
-+	"pci_reserved_2" = 0,
-+	"pci_reserved_3" = 0x0,
-+	"pci_pmenable_6" = 1,
-+	"pci_auxpwr_7" = 1,
-+	"pci_reserved_8" = 0x10,
-+
-+	# ************* Configurable PCI IDs ****************
-+	# TODO: make command line switch for these
-+	# Subsystem ID (Word 0x0B)
-+	"subsystemid_x0B" = 0,
-+	# Subsystem Vendor ID (Word 0x0C)
-+	"subsystemvendorid_x0C" = 0x8086,
-+	# Device ID (Word 0x0D)
-+	# TODO: 82579V uses "deviceid_x0D" = 0x1503,
-+	"deviceid_x0D" = 0x1502,
-+	# ************* END Configurable PCI IDs ****************
-+
-+	# Words 0x0E and 0x0F Are Reserved
-+	"reserved_x0E" = 0x0,
-+	"reserved_x0F" = 0x0,
-+
-+	# LAN Power Consumption (Word 0x10)
-+	# prefix: "lanpwr_"
-+	"lanpwr_d3pwr_0" = 0x2,
-+	"lanpwr_reserved_5" = 0,
-+	"lanpwr_d0pwr_8" = 0x7,
-+
-+	# Word 0x12 and Word 0x11 Are Reserved
-+	"reserved_x11" = 0x0000,
-+	"reserved_x12" = 0x0000,
-+
-+	# Shared Init Control Word (Word 0x13)
-+	# prefix: "sicw_"
-+	"sicw_dynamicclock_0" = 1,
-+	"sicw_clkcnt_1" = 0,
-+	"sicw_reserved_2" = 1,
-+	"sicw_fullduplex_3" = 0,
-+	"sicw_forcespeed_4" = 0,
-+	"sicw_reserved_5" = 0,
-+	"sicw_phydeviceype_6" = 0,
-+	"sicw_reserved_8" = 1,
-+	"sicw_phy_enpwrdown_9" = 0,
-+	"sicw_reserved_10" = 1,
-+	"sicw_macsecdisable_13" = 1,
-+	"sicw_sign_14" = 0x2,
-+
-+	# Extended Configuration Word 1 (Word 0x14)
-+	# prefix: "ecw1_"
-+	"ecw1_extcfgptr_0" = 0x0028,
-+	"ecw1_oemload_12" = 1,
-+	"ecw1_phyload_13" = 1,
-+	"ecw1_reserved_14" = 0,
-+
-+	# Extended Configuration Word 2 (Word 0x15)
-+	# prefix: "ecw2_"
-+	"ecw2_reserved_0" = 0x00,
-+	"ecw2_extphylen_8" = 0x12,
-+
-+	# Extended Configuration Word 3 (Word 0x16)
-+	# prefix: "ecw3_"
-+	"ecw3_extcfg1_0" = 0x00,
-+
-+	# OEM Configuration Defaults (Word 0x17)
-+	# prefix: "oem_"
-+	"oem_reserved_0" = 0x000,
-+	"oem_lpluenind0a_9" = 0,
-+	"oem_lplueninnond0a_10" = 1,
-+	"oem_gbedisinnond0a_11" = 1,
-+	"oem_reserved_12" = 0,
-+	"oem_gbedis_14" = 0,
-+	"oem_reserved_15" = 0,
-+
-+	# LED 0 - 2 Configuration Defaults (Word 0x18)
-+	# prefix: "l02_"
-+	# Lenovo default values
-+	"l02_led0mode_0" = 0x4,
-+	"l02_led0invert_3" = 0,
-+	"l02_led0blink_4" = 0,
-+	"l02_led1mode_5" = 0x3,
-+	"l02_led1invert_8" = 0,
-+	"l02_led1blink_9" = 1,
-+	"l02_led2mode_10" = 0x2,
-+	"l02_led2invert_13" = 1,
-+	"l02_led2blink_14" = 0,
-+	"l02_blinkrate_15" = 0,
-+
-+	# Intel default Values
-+	#"l02_led0mode_0" = 0x4,
-+	#"l02_led0invert_3" = 0,
-+	#"l02_led0blink_4" = 1,
-+	#"l02_led1mode_5" = 0x7,
-+	#"l02_led1invert_8" = 0,
-+	#"l02_led1blink_9" = 0,
-+	#"l02_led2mode_10" = 0x6,
-+	#"l02_led2invert_13" = 0,
-+	#"l02_led2blink_14" = 0,
-+	#"l02_blinkrate_15" = 0,
-+
-+
-+	# Reserved (Word 0x19)
-+	# NOTE: bit 6 must be 1 for validation.  See datasheet.
-+	"reserved_x19" = 0x2B40,
-+
-+	# Reserved (Word 0x1A)
-+	# Advanced Power Management Wake Up Enable
-+	# prefix: "amp_"
-+	"amp_enable_0" = 1,
-+	"amp_reserved_1" = 0x0421,
-+
-+	# Reserved (Word 0x1B)
-+	"reserved_x1B" = 0x0113,
-+
-+	# Reserved (Word 0x1C)
-+	"reserved_x1C" = 0x1502,
-+
-+	# Reserved (Word 0x1D)
-+	"reserved_x1D" = 0xBAAD,
-+
-+	# Reserved (Word 0x1E)
-+	"reserved_x1E" = 0x1502,
-+
-+	# Reserved (Word 0x1F)
-+	"reserved_x1F" = 0x1503,
-+
-+	# Reserved (Word 0x20)
-+	"reserved_x20" = 0xBAAD,
-+
-+	# Reserved (Word 0x21)
-+	"reserved_x21" = 0xBAAD,
-+
-+	# Reserved (Word 0x22)
-+	"reserved_x22" = 0xBAAD,
-+
-+	# Reserved (Word 0x23)
-+	"reserved_x23" = 0x1502,
-+
-+	# Reserved (Word 0x24)
-+	"reserved_x24_0" = 0x0000,
-+	"reserved_x24_14" = 0,
-+	"reserved_x24_15" = 1,
-+
-+	# Reserved (Word 0x25)
-+	"reserved_x25_0" = 0x0000,
-+	"reserved_x25_4" = 1,
-+	"reserved_x25_5" = 0,
-+	"reserved_x25_7" = 1,
-+	"reserved_x25_8" = 0x00,
-+	"reserved_x25_15" = 1,
-+
-+	# Reserved (Word 0x26)
-+	"reserved_x26_0" = 0x00,
-+	"reserved_x26_9" = 1,
-+	"reserved_x26_10" = 1,
-+	"reserved_x26_11" = 1,
-+	"reserved_x26_12" = 0,
-+	"reserved_x26_14" = 1,
-+	"reserved_x26_15" = 0,
-+
-+	# Reserved (Word 0x27)
-+	"reserved_x27" = 0x80,
-+
-+	# Offsets 0x28-0x2F
-+	"offset_x28" = 0x0000,
-+	"offset_x29" = 0x0000,
-+	"offset_x2A" = 0x0000,
-+	"offset_x2B" = 0x0000,
-+	"offset_x2C" = 0x0000,
-+	"offset_x2D" = 0x0000,
-+	"offset_x2E" = 0x0000,
-+	"offset_x2F" = 0x0000,
-+
-+	# Boot Agent Main Setup Options (Word 0x30)
-+	# Hardcoded PXE setup (disabled)
-+	# prefix: "pxe30_"
-+	"pxe30_protocolsel_0" = 0,
-+	"pxe30_reserved_2" = 0,
-+	"pxe30_defbootsel_3" = 0x3,
-+	"pxe30_reserved_5" = 0,
-+	"pxe30_prompttime_6" = 0x3,
-+	"pxe30_dispsetup_8" = 0,
-+	"pxe30_reserved_9" = 0,
-+	"pxe30_forcespeed_10" = 0,
-+	"pxe30_forcefullduplex_12" = 0,
-+	"pxe30_reserved_13" = 0,
-+	"pxe30_reserved_14" = 0,
-+
-+	# Boot Agent Configuration Customization Options (Word 0x31)
-+	# prefix: "pxe31_"
-+	"pxe31_disablemenu_0" = 1,
-+ 	"pxe31_disabletitle_1" = 1,
-+	"pxe31_disableprotsel_2" = 0,
-+	"pxe31_disbootorder_3" = 0,
-+	"pxe31_dislegacywak_4" = 0,
-+	"pxe31_disableflasicwpro_5" = 0,
-+	"pxe31_reserved_6" = 0,
-+	"pxe31_ibootagentmode_8" = 0,
-+	"pxe31_contretrydis_11" = 0,
-+	"pxe31_reserved_12" = 0,
-+	"pxe31_signature_14" = 10,
-+
-+	# Boot Agent Configuration Customization Options (Word 0x32)
-+	# prefix: "pxe32_"
-+	"pxe32_buildnum_0" = 0x28,
-+	"pxe32_minorversion_8" = 0x2,
-+	"pxe32_majorversion_12" = 0x1,
-+
-+	# IBA Capabilities (Word 0x33)
-+	# prefix: "pxe33_"
-+	"pxe33_basecodepresent_0" = 1,
-+	"pxe33_undipresent_1" = 1,
-+	"pxe33_reserved_2" = 1,
-+	"pxe33_efiundipresent_3" = 0,
-+	"pxe33_iscsi_4" = 0,
-+	"pxe33_reserved_5" = 0,
-+	"pxe33_signature_14" = 10,
-+
-+	"pxe_padding"[11] = 0xffff,
-+
-+	# Checksum is generated by bincfg
-+	# "checksum_gbe" = xxx,
-+
-+	# G3 -> S5 PHY Configuration
-+	"g3_s5_phy_conf"[0x16] = 0,
-+
-+	# Padding 0xf80 bytes
-+	"padding"[0xf6a] = 0xff
-+}
-
-diff --git a/util/bincfg/gbe-82579LM.spec b/util/bincfg/gbe-82579LM.spec
-new file mode 100644
-index 0000000..0367aff
--- /dev/null
-+++ b/util/bincfg/gbe-82579LM.spec
-
-@@ -0,0 +1,147 @@
-+# SPDX-License-Identifier: GPL-3.0-or-later
-+#
-+# Datasheets:
-+#
-+# https://cdrdv2.intel.com/v1/dl/getContent/613456
-+
-+# The datasheet says that this spec covers the following pci ids:
-+# 8086:1502 - Intel 82579LM gigabit ethernet controller
-+# 8086:1503 - Intel 82579V gigabit ethernet controller
-+
-+# GbE SPEC for 82579LM/82579V
-+{
-+	"mac_address_"[6]	: 8,
-+	"reserved_x03"		: 16,
-+	"reserved_x04"		: 16,
-+	"imageversioninfo_x05"	: 16,
-+	"reserved_x06"		: 16,
-+	"reserved_x07"		: 16,
-+	"pba_low_x08"		: 16,
-+	"pba_high_x09"		: 16,
-+	"pci_loaddeviceid_0"	: 1,
-+	"pci_loadsubsystemid_1"	: 1,
-+	"pci_reserved_2"	: 1,
-+	"pci_reserved_3"	: 3,
-+	"pci_pmenable_6"	: 1,
-+	"pci_auxpwr_7"		: 1,
-+	"pci_reserved_8"	: 8,
-+	"subsystemid_x0B"	: 16,
-+	"subsystemvendorid_x0C"	: 16,
-+	"deviceid_x0D"		: 16,
-+	"reserved_x0E"		: 16,
-+	"reserved_x0F"		: 16,
-+	"lanpwr_d3pwr_0"	: 5,
-+	"lanpwr_reserved_5"	: 3,
-+	"lanpwr_d0pwr_8"	: 8,
-+	"reserved_x11"		: 16,
-+	"reserved_x12"		: 16,
-+	"sicw_dynamicclock_0"	: 1,
-+	"sicw_clkcnt_1"		: 1,
-+	"sicw_reserved_2"	: 1,
-+	"sicw_fullduplex_3"	: 1,
-+	"sicw_forcespeed_4"	: 1,
-+	"sicw_reserved_5"	: 1,
-+	"sicw_phydeviceype_6"	: 2,
-+	"sicw_reserved_8"	: 1,
-+	"sicw_phy_enpwrdown_9"	: 1,
-+	"sicw_reserved_10"	: 3,
-+	"sicw_macsecdisable_13"	: 1,
-+	"sicw_sign_14"		: 2,
-+	"ecw1_extcfgptr_0"	: 12,
-+	"ecw1_oemload_12"	: 1,
-+	"ecw1_phyload_13"	: 1,
-+	"ecw1_reserved_14"	: 2,
-+	"ecw2_reserved_0"	: 8,
-+	"ecw2_extphylen_8"	: 8,
-+	"ecw3_extcfg1_0"	: 16,
-+	"oem_reserved_0"	: 9,
-+	"oem_lpluenind0a_9" 	: 1,
-+	"oem_lplueninnond0a_10"	: 1,
-+	"oem_gbedisinnond0a_11"	: 1,
-+	"oem_reserved_12"	: 2,
-+	"oem_gbedis_14"		: 1,
-+	"oem_reserved_15"	: 1,
-+	"l02_led0mode_0"	: 3,
-+	"l02_led0invert_3"	: 1,
-+	"l02_led0blink_4"	: 1,
-+	"l02_led1mode_5"	: 3,
-+	"l02_led1invert_8"	: 1,
-+	"l02_led1blink_9"	: 1,
-+	"l02_led2mode_10"	: 3,
-+	"l02_led2invert_13"	: 1,
-+	"l02_led2blink_14"	: 1,
-+	"l02_blinkrate_15"	: 1,
-+	"reserved_x19"		: 16,
-+	"amp_enable_0"		: 1,
-+	"amp_reserved_1"	: 15,
-+	"reserved_x1B"		: 16,
-+	"reserved_x1C"		: 16,
-+	"reserved_x1D"		: 16,
-+	"reserved_x1E"		: 16,
-+	"reserved_x1F"		: 16,
-+	"reserved_x20"		: 16,
-+	"reserved_x21"		: 16,
-+	"reserved_x22"		: 16,
-+	"reserved_x23"		: 16,
-+	"reserved_x24_0"	: 14,
-+	"reserved_x24_14"	: 1,
-+	"reserved_x24_15"	: 1,
-+	"reserved_x25_0"	: 4,
-+	"reserved_x25_4"	: 1,
-+	"reserved_x25_5"	: 2,
-+	"reserved_x25_7"	: 1,
-+	"reserved_x25_8"	: 7,
-+	"reserved_x25_15"	: 1,
-+	"reserved_x26_0"	: 9,
-+	"reserved_x26_9"	: 1,
-+	"reserved_x26_10"	: 1,
-+	"reserved_x26_11"	: 1,
-+	"reserved_x26_12"	: 2,
-+	"reserved_x26_14"	: 1,
-+	"reserved_x26_15"	: 1,
-+	"reserved_x27"		: 16,
-+	"offset_x28"		: 16,
-+	"offset_x29"		: 16,
-+	"offset_x2A"		: 16,
-+	"offset_x2B"		: 16,
-+	"offset_x2C"		: 16,
-+	"offset_x2D"		: 16,
-+	"offset_x2E"		: 16,
-+	"offset_x2F"		: 16,
-+	"pxe30_protocolsel_0"	: 2,
-+	"pxe30_reserved_2"	: 1,
-+	"pxe30_defbootsel_3"	: 2,
-+	"pxe30_reserved_5"	: 1,
-+	"pxe30_prompttime_6"	: 2,
-+	"pxe30_dispsetup_8"	: 1,
-+	"pxe30_reserved_9"	: 1,
-+	"pxe30_forcespeed_10"	: 2,
-+	"pxe30_forcefullduplex_12" : 1,
-+	"pxe30_reserved_13"	: 1,
-+	"pxe30_reserved_14"	: 2,
-+	"pxe31_disablemenu_0"	: 1,
-+	"pxe31_disabletitle_1"	: 1,
-+	"pxe31_disableprotsel_2" : 1,
-+	"pxe31_disbootorder_3"	: 1,
-+	"pxe31_dislegacywak_4"	: 1,
-+	"pxe31_disableflasicwpro_5" : 1,
-+	"pxe31_reserved_6"	: 2,
-+	"pxe31_ibootagentmode_8" : 3,
-+	"pxe31_contretrydis_11"	: 1,
-+	"pxe31_reserved_12"	: 2,
-+	"pxe31_signature_14"	: 2,
-+	"pxe32_buildnum_0"	: 8,
-+	"pxe32_minorversion_8"	: 4,
-+	"pxe32_majorversion_12"	: 4,
-+	"pxe33_basecodepresent_0" : 1,
-+	"pxe33_undipresent_1"	: 1,
-+	"pxe33_reserved_2"	: 1,
-+	"pxe33_efiundipresent_3" : 1,
-+	"pxe33_iscsi_4"		: 1,
-+	"pxe33_reserved_5"	: 9,
-+	"pxe33_signature_14"	: 2,
-+	"pxe_padding"[11]	: 16,
-+	"checksum_gbe"		: 16,
-+	"g3_s5_phy_conf"[0x16]  : 8,
-+	"padding"[0xf6a]	: 8
-+}
-
--- a/patches/coreboot-4.8.1/0080-util-crossgcc-builgcc_temp_fix_from_https_to_http.patch
+++ b/patches/coreboot-4.8.1/0080-util-crossgcc-builgcc_temp_fix_from_https_to_http.patch
@ -1,40 +0,0 @@
--- a/util/crossgcc/buildgcc.orig	2021-01-03 19:47:10.583000000 -0500
-+++ b/util/crossgcc/buildgcc	2021-01-03 19:47:18.000000000 -0500
-@@ -66,22 +66,22 @@
- # These are sanitized by the jenkins toolchain test builder, so if
- # a completely new URL is added here, it probably needs to be added
- # to the jenkins build as well, or the builder won't download it.
-GMP_ARCHIVE="https://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
-MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
-MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
-GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
-BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
-GDB_ARCHIVE="https://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
-IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-PYTHON_ARCHIVE="https://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
-EXPAT_ARCHIVE="https://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
-+GMP_ARCHIVE="http://ftpmirror.gnu.org/gmp/gmp-${GMP_VERSION}.tar.xz"
-+MPFR_ARCHIVE="http://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
-+MPC_ARCHIVE="http://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
-+GCC_ARCHIVE="http://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
-+BINUTILS_ARCHIVE="http://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
-+GDB_ARCHIVE="http://ftpmirror.gnu.org/gdb/gdb-${GDB_VERSION}.tar.xz"
-+IASL_ARCHIVE="http://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
-+PYTHON_ARCHIVE="http://www.python.org/ftp/python/${PYTHON_VERSION}/Python-${PYTHON_VERSION}.tar.xz"
-+EXPAT_ARCHIVE="http://downloads.sourceforge.net/sourceforge/expat/expat-${EXPAT_VERSION}.tar.bz2"
- # CLANG toolchain archive locations
-LLVM_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
-CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src.tar.xz"
-CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
-CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
-MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
-CMAKE_ARCHIVE="https://cmake.org/files/v3.11/cmake-${CMAKE_VERSION}.tar.gz"
-+LLVM_ARCHIVE="http://releases.llvm.org/${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
-+CFE_ARCHIVE="http://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src.tar.xz"
-+CRT_ARCHIVE="http://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
-+CTE_ARCHIVE="http://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
-+MAKE_ARCHIVE="http://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
-+CMAKE_ARCHIVE="http://cmake.org/files/v3.11/cmake-${CMAKE_VERSION}.tar.gz"
- 
- ALL_ARCHIVES="$GMP_ARCHIVE $MPFR_ARCHIVE $MPC_ARCHIVE \
- 	$GCC_ARCHIVE $BINUTILS_ARCHIVE $GDB_ARCHIVE $IASL_ARCHIVE \