mirror of
https://github.com/linuxboot/heads.git
synced 2024-12-19 21:17:55 +00:00
Merge pull request #1430 from gaspar-ilom/w541-support
Support Thinkpad W541
This commit is contained in:
commit
f540f2a335
@ -474,6 +474,20 @@ workflows:
|
||||
requires:
|
||||
- x230-hotp-maximized
|
||||
|
||||
- build:
|
||||
name: w541-maximized
|
||||
target: w541-maximized
|
||||
subcommand: ""
|
||||
requires:
|
||||
- x230-hotp-maximized
|
||||
|
||||
- build:
|
||||
name: w541-hotp-maximized
|
||||
target: w541-hotp-maximized
|
||||
subcommand: ""
|
||||
requires:
|
||||
- x230-hotp-maximized
|
||||
|
||||
- build:
|
||||
name: qemu-coreboot-fbwhiptail-tpm2-hotp
|
||||
target: qemu-coreboot-fbwhiptail-tpm2-hotp
|
||||
|
40
blobs/w541/README.md
Normal file
40
blobs/w541/README.md
Normal file
@ -0,0 +1,40 @@
|
||||
# W541 Blobs
|
||||
|
||||
- [Overview](#overview)
|
||||
- [Using Your Own Blobs](#using-your-own-blobs)
|
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|
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## Overview
|
||||
|
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Coreboot on the W541 requires the following binary blobs:
|
||||
|
||||
- `mrc.bin` - Consists of Intel’s Memory Reference Code (MRC) and [is used to initialize the DRAM](https://doc.coreboot.org/northbridge/intel/haswell/mrc.bin.html).
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- `me.bin` - Consists of Intel’s Management Engine (ME), which we modify using [me_cleaner](https://github.com/corna/me_cleaner) to remove all but the modules which are necessary for the CPU to function.
|
||||
- `gbe.bin` - Consists of hardware/software configuration data for the Gigabit Ethernet (GbE) controller. Intel publishes the data structure [here](https://web.archive.org/web/20230122164346/https://www.intel.com/content/dam/www/public/us/en/documents/design-guides/i-o-controller-hub-8-9-nvm-map-guide.pdf), and an [ImHex](https://github.com/WerWolv/ImHex) hex editor pattern is available [here](https://github.com/rbreslow/ImHex-Patterns/blob/rb/intel-ich8/patterns/intel/ich8_lan_nvm.hexpat).
|
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- `ifd.bin` - Consists of the Intel Flash Descriptor (IFD). Intel publishes the data structure [here](https://web.archive.org/web/20221208011432/https://www.intel.com/content/dam/www/public/us/en/documents/datasheets/io-controller-hub-8-datasheet.pdf), and an ImHex hex editor pattern is available [here](https://github.com/rbreslow/ImHex-Patterns/blob/rb/intel-ich8/patterns/intel/ich8_flash_descriptor.hexpat).
|
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|
||||
Heads supplies an IFD and GbE blob, which we extracted from a donor board. We changed the MAC address of the GbE blob to `00:de:ad:c0:ff:ee` using [nvmutil](https://libreboot.org/docs/install/nvmutil.html), to support anonymity and build reproducibility.
|
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|
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When building any W541 board variant with `make`, the build system will download a copy of the MRC and Intel ME. We extract `mrc.bin` from a Chromebook firmware image and `me.bin` from a Lenovo firmware update.
|
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|
||||
## Using Your Own Blobs
|
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|
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You can compile Heads using the Intel ME, GbE, and and IFD blobs from your original ROM.
|
||||
|
||||
First, make sure you've built Heads at least once in order to download the Coreboot sources:
|
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|
||||
```console
|
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$ make BOARD=w541-hotp-maximized
|
||||
```
|
||||
|
||||
Then, supply the path to the Coreboot sources via the `COREBOOT_DIR` environment variable, and run the blob-extraction script:
|
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|
||||
```console
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$ export COREBOOT_DIR="./build/x86/coreboot-4.17/"
|
||||
$ ./blobs/w541/extract /path/to/original_rom.bin ./blobs/w541
|
||||
```
|
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|
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Now, you can rebuild Heads:
|
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|
||||
```console
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$ make BOARD=w541-hotp-maximized
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```
|
57
blobs/w541/download-clean-me
Executable file
57
blobs/w541/download-clean-me
Executable file
@ -0,0 +1,57 @@
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#!/bin/bash
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|
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set -e
|
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|
||||
function usage() {
|
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echo -n \
|
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"Usage: $(basename "$0") path_to_output_directory
|
||||
Download Intel ME firmware from Lenovo, neutralize, and shrink.
|
||||
"
|
||||
}
|
||||
|
||||
ME_BIN_HASH="b7cf4c0cf514bbf279d9fddb12c34fca5c1c23e94b000c26275369b924ab9c25"
|
||||
|
||||
if [[ "${BASH_SOURCE[0]}" == "$0" ]]; then
|
||||
if [[ "${1:-}" == "--help" ]]; then
|
||||
usage
|
||||
else
|
||||
if [[ -z "${COREBOOT_DIR}" ]]; then
|
||||
echo "ERROR: No COREBOOT_DIR variable defined."
|
||||
exit 1
|
||||
fi
|
||||
|
||||
output_dir="$(realpath "${1:-./}")"
|
||||
|
||||
if [[ ! -f "${output_dir}/me.bin" ]]; then
|
||||
# Unpack Lenovo's Windows installer into a temporary directory and
|
||||
# extract the Intel ME blob.
|
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pushd "$(mktemp -d)"
|
||||
|
||||
curl -O https://download.lenovo.com/pccbbs/mobiles/glrg22ww.exe
|
||||
innoextract glrg22ww.exe
|
||||
|
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mv app/ME9.1_5M_Production.bin "${COREBOOT_DIR}/util/me_cleaner"
|
||||
|
||||
popd
|
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|
||||
# Neutralize and shrink Intel ME. Note that this doesn't include
|
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# --soft-disable to set the "ME Disable" or "ME Disable B" (e.g.,
|
||||
# High Assurance Program) bits, as they are defined within the Flash
|
||||
# Descriptor.
|
||||
# https://github.com/corna/me_cleaner/wiki/External-flashing#neutralize-and-shrink-intel-me-useful-only-for-coreboot
|
||||
pushd "${COREBOOT_DIR}/util/me_cleaner"
|
||||
|
||||
python me_cleaner.py -r -t -O me_shrinked.bin ME9.1_5M_Production.bin
|
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|
||||
mv me_shrinked.bin "${output_dir}/me.bin"
|
||||
rm ./*.bin
|
||||
|
||||
popd
|
||||
fi
|
||||
|
||||
if ! echo "${ME_BIN_HASH} ${output_dir}/me.bin" | sha256sum --check; then
|
||||
echo "ERROR: SHA256 checksum for me.bin doesn't match."
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
fi
|
48
blobs/w541/extract
Executable file
48
blobs/w541/extract
Executable file
@ -0,0 +1,48 @@
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#!/bin/bash
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|
||||
set -e
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|
||||
function usage() {
|
||||
echo -n \
|
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"Usage: $(basename "$0") path_to_original_rom path_to_output_directory
|
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Extract Intel firmware from the original ROM.
|
||||
"
|
||||
}
|
||||
|
||||
if [[ "${BASH_SOURCE[0]}" == "$0" ]]; then
|
||||
if [[ "${1:-}" == "--help" ]]; then
|
||||
usage
|
||||
else
|
||||
if [[ -z "${COREBOOT_DIR}" ]]; then
|
||||
echo "ERROR: No COREBOOT_DIR variable defined."
|
||||
exit 1
|
||||
fi
|
||||
|
||||
original_rom="$(realpath "$1")"
|
||||
output_dir="$(realpath "${2:-./}")"
|
||||
|
||||
# Neutralize Intel ME and resize the Intel Flash Descriptor (IFD)
|
||||
# layout.
|
||||
# https://github.com/corna/me_cleaner/wiki/External-flashing#neutralize-and-shrink-intel-me-useful-only-for-coreboot
|
||||
pushd "${COREBOOT_DIR}/util/me_cleaner"
|
||||
|
||||
python me_cleaner.py -S -r -t -d -O out.bin -D ifd_shrinked.bin -M me_shrinked.bin "${original_rom}"
|
||||
|
||||
mv ifd_shrinked.bin "${output_dir}/ifd.bin"
|
||||
mv me_shrinked.bin "${output_dir}/me.bin"
|
||||
rm ./*.bin
|
||||
|
||||
popd
|
||||
|
||||
# Extract the Intel Gigabit Ethernet (GbE) firmware.
|
||||
pushd "${COREBOOT_DIR}/util/ifdtool"
|
||||
|
||||
make
|
||||
./ifdtool -x "${original_rom}"
|
||||
|
||||
mv flashregion_3_gbe.bin "${output_dir}/gbe.bin"
|
||||
rm ./*.bin
|
||||
|
||||
popd
|
||||
fi
|
||||
fi
|
BIN
blobs/w541/gbe.bin
Normal file
BIN
blobs/w541/gbe.bin
Normal file
Binary file not shown.
BIN
blobs/w541/ifd.bin
Normal file
BIN
blobs/w541/ifd.bin
Normal file
Binary file not shown.
6
boards/w541-hotp-maximized/w541-hotp-maximized.config
Normal file
6
boards/w541-hotp-maximized/w541-hotp-maximized.config
Normal file
@ -0,0 +1,6 @@
|
||||
# Inherit the rest from the base W541 config.
|
||||
include $(pwd)/boards/w541-maximized/w541-maximized.config
|
||||
|
||||
CONFIG_HOTPKEY=y
|
||||
|
||||
export CONFIG_BOARD_NAME="ThinkPad W541-hotp-maximized"
|
65
boards/w541-maximized/w541-maximized.config
Normal file
65
boards/w541-maximized/w541-maximized.config
Normal file
@ -0,0 +1,65 @@
|
||||
# Configuration for a ThinkPad W541.
|
||||
CONFIG_COREBOOT_CONFIG=config/coreboot-w541.config
|
||||
# TODO: Make a ThinkPad-common Linux config file.
|
||||
CONFIG_LINUX_CONFIG=config/linux-w541.config
|
||||
|
||||
export CONFIG_COREBOOT=y
|
||||
export CONFIG_COREBOOT_VERSION=4.19
|
||||
export CONFIG_LINUX_VERSION=5.10.5
|
||||
|
||||
CONFIG_CRYPTSETUP2=y
|
||||
CONFIG_FLASHROM=y
|
||||
CONFIG_FLASHTOOLS=y
|
||||
CONFIG_GPG2=y
|
||||
CONFIG_KEXEC=y
|
||||
CONFIG_UTIL_LINUX=y
|
||||
CONFIG_LVM2=y
|
||||
CONFIG_MBEDTLS=y
|
||||
CONFIG_PCIUTILS=y
|
||||
CONFIG_POPT=y
|
||||
CONFIG_QRENCODE=y
|
||||
CONFIG_TPMTOTP=y
|
||||
|
||||
#platform locking finalization (PR0)
|
||||
CONFIG_IO386=y
|
||||
export CONFIG_FINALIZE_PLATFORM_LOCKING_PRESKYLAKE=y
|
||||
|
||||
|
||||
# Dependencies for a graphical menu. Enable CONFIG_SLANG and CONFIG_NEWT instead
|
||||
# for a console-based menu.
|
||||
CONFIG_CAIRO=y
|
||||
CONFIG_FBWHIPTAIL=y
|
||||
|
||||
CONFIG_LINUX_USB=y
|
||||
|
||||
export CONFIG_TPM=y
|
||||
export CONFIG_BOOTSCRIPT=/bin/gui-init
|
||||
export CONFIG_BOOT_REQ_HASH=n
|
||||
export CONFIG_BOOT_REQ_ROLLBACK=n
|
||||
export CONFIG_BOOT_DEV="/dev/sda1"
|
||||
export CONFIG_BOARD_NAME="ThinkPad W541-maximized"
|
||||
export CONFIG_FLASHROM_OPTIONS="-p internal"
|
||||
|
||||
# Make the Coreboot build depend on the following 3rd party blobs:
|
||||
$(build)/coreboot-$(CONFIG_COREBOOT_VERSION)/$(BOARD)/.build: \
|
||||
$(pwd)/blobs/haswell/mrc.bin $(pwd)/blobs/w541/me.bin
|
||||
|
||||
$(pwd)/blobs/haswell/mrc.bin:
|
||||
COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
|
||||
$(pwd)/blobs/haswell/obtain-mrc $(pwd)/blobs/haswell
|
||||
|
||||
$(pwd)/blobs/w541/me.bin:
|
||||
COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
|
||||
$(pwd)/blobs/w541/download-clean-me $(pwd)/blobs/w541
|
||||
|
||||
# Haswell boards have an 8 MiB and 4 MiB SPI flash chip. So, we split the
|
||||
# Coreboot ROM into two files to flash one on each chip.
|
||||
all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom
|
||||
$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-bottom.rom: $(board_build)/$(CB_OUTPUT_FILE)
|
||||
$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
|
||||
@sha256sum $@ | tee -a "$(HASHES)"
|
||||
|
||||
all: $(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom
|
||||
$(board_build)/heads-$(BOARD)-$(HEADS_GIT_VERSION)-top.rom: $(board_build)/$(CB_OUTPUT_FILE)
|
||||
$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
|
||||
@sha256sum $@ | tee -a "$(HASHES)"
|
676
config/coreboot-w541.config
Normal file
676
config/coreboot-w541.config
Normal file
@ -0,0 +1,676 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION=""
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
CONFIG_ARCH_SUPPORTS_CLANG=y
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_IWYU is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||
# CONFIG_USE_BLOBS is not set
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_HAVE_ASAN_IN_ROMSTAGE=y
|
||||
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
|
||||
# CONFIG_ASAN is not set
|
||||
# CONFIG_NO_STAGE_CACHE is not set
|
||||
CONFIG_TSEG_STAGE_CACHE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
CONFIG_BOOTSPLASH_IMAGE=y
|
||||
CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash-1024x768.jpg"
|
||||
CONFIG_BOOTSPLASH_CONVERT=y
|
||||
CONFIG_BOOTSPLASH_CONVERT_QUALITY=70
|
||||
# CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set
|
||||
# CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set
|
||||
# CONFIG_FW_CONFIG is not set
|
||||
|
||||
#
|
||||
# Software Bill Of Materials (SBOM)
|
||||
#
|
||||
# CONFIG_SBOM is not set
|
||||
# end of Software Bill Of Materials (SBOM)
|
||||
# end of General setup
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_51NB is not set
|
||||
# CONFIG_VENDOR_ACER is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BOSTENTECH is not set
|
||||
# CONFIG_VENDOR_CAVIUM is not set
|
||||
# CONFIG_VENDOR_CLEVO is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_DELL is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_EXAMPLE is not set
|
||||
# CONFIG_VENDOR_FACEBOOK is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PINE64 is not set
|
||||
# CONFIG_VENDOR_PORTWELL is not set
|
||||
# CONFIG_VENDOR_PRODRIVE is not set
|
||||
# CONFIG_VENDOR_PROTECTLI is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RAZER is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_STARLABS is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_SYSTEM76 is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_UP is not set
|
||||
CONFIG_MAINBOARD_FAMILY="ThinkPad W541"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad W541"
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_MAINBOARD_DIR="lenovo/haswell"
|
||||
CONFIG_VGA_BIOS_ID="8086,0166"
|
||||
CONFIG_DIMM_MAX=4
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_NO_POST=y
|
||||
CONFIG_MAINBOARD_VENDOR="LENOVO"
|
||||
CONFIG_CBFS_SIZE=0x800000
|
||||
CONFIG_LINEAR_FRAMEBUFFER_MAX_HEIGHT=1600
|
||||
CONFIG_LINEAR_FRAMEBUFFER_MAX_WIDTH=2560
|
||||
CONFIG_MAX_CPUS=8
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_VBOOT_VBNV_OFFSET=0x2a
|
||||
CONFIG_VARIANT_DIR="w541"
|
||||
CONFIG_OVERRIDE_DEVICETREE=""
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="LENOVO"
|
||||
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||
CONFIG_DCACHE_RAM_BASE=0xff7c0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
|
||||
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xf0000000
|
||||
CONFIG_ECAM_MMCONF_BUS_NUMBER=64
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
CONFIG_IFD_BIN_PATH="@BLOB_DIR@/w541/ifd.bin"
|
||||
CONFIG_ME_BIN_PATH="@BLOB_DIR@/w541/me.bin"
|
||||
CONFIG_GBE_BIN_PATH="@BLOB_DIR@/w541/gbe.bin"
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_ENABLE_DDR_2X_REFRESH is not set
|
||||
CONFIG_PCIEXP_AER=y
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="ThinkPad W541"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
|
||||
CONFIG_BOARD_LENOVO_THINKPAD_W541=y
|
||||
# CONFIG_BOARD_LENOVO_L520 is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
# CONFIG_BOARD_LENOVO_R500 is not set
|
||||
# CONFIG_BOARD_LENOVO_W500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T410 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420S is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T431S is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_W520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_W530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
# CONFIG_BOARD_LENOVO_R60 is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_A58 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
|
||||
# CONFIG_BOARD_LENOVO_X200 is not set
|
||||
# CONFIG_BOARD_LENOVO_X301 is not set
|
||||
# CONFIG_BOARD_LENOVO_X201 is not set
|
||||
# CONFIG_BOARD_LENOVO_X220 is not set
|
||||
# CONFIG_BOARD_LENOVO_X220I is not set
|
||||
# CONFIG_BOARD_LENOVO_X1 is not set
|
||||
# CONFIG_BOARD_LENOVO_X230 is not set
|
||||
# CONFIG_BOARD_LENOVO_X230T is not set
|
||||
# CONFIG_BOARD_LENOVO_X230S is not set
|
||||
# CONFIG_BOARD_LENOVO_X230_EDP is not set
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
CONFIG_BOARD_LENOVO_HASWELL_COMMON=y
|
||||
CONFIG_VBOOT_SLOTS_RW_AB=y
|
||||
CONFIG_PS2K_EISAID="LEN0071"
|
||||
CONFIG_PS2M_EISAID="LEN004A"
|
||||
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
|
||||
CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_EC_GPE_SCI=0x50
|
||||
CONFIG_TPM_MEASURED_BOOT=y
|
||||
CONFIG_LINUX_COMMAND_LINE="intel_iommu=igfx_off quiet loglevel=2"
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0x00c00000
|
||||
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
|
||||
# end of Mainboard
|
||||
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CHIPSET_DEVICETREE=""
|
||||
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x400
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02X"
|
||||
CONFIG_EHCI_BAR=0xe8000000
|
||||
CONFIG_STACK_SIZE=0x2000
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_VBT_DATA_SIZE_KB=8
|
||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0x48254
|
||||
CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
||||
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||
CONFIG_HAVE_MRC=y
|
||||
CONFIG_MRC_FILE="@BLOB_DIR@/haswell/mrc.bin"
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
|
||||
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
|
||||
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
CONFIG_FIXED_EPBAR_MMIO_BASE=0xfed19000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_DISABLE_ME_PCI=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=6
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0x400
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
CONFIG_CPU_INTEL_HASWELL=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
||||
CONFIG_CPU_INTEL_COMMON_TIMEBASE=y
|
||||
CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
|
||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
||||
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_XAPIC_ONLY=y
|
||||
# CONFIG_X2APIC_ONLY is not set
|
||||
# CONFIG_X2APIC_RUNTIME is not set
|
||||
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
CONFIG_SMP=y
|
||||
CONFIG_MMX=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
|
||||
# CONFIG_USE_NATIVE_RAMINIT is not set
|
||||
CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
CONFIG_SOUTH_BRIDGE_OPTIONS=y
|
||||
# CONFIG_PCIEXP_HOTPLUG is not set
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_LYNXPOINT=y
|
||||
CONFIG_FINALIZE_USB_ROUTE_XHCI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RTC=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMCLIB=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PMBASE=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_ACPI_MADT=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_FINALIZE=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
||||
# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
CONFIG_TCO_SPACE_NOT_YET_SPLIT=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_WATCHDOG=y
|
||||
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
||||
CONFIG_RCBA_LENGTH=0x4000
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
CONFIG_EC_LENOVO_H8=y
|
||||
CONFIG_H8_BEEP_ON_DEATH=y
|
||||
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
|
||||
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
|
||||
# CONFIG_H8_FN_CTRL_SWAP is not set
|
||||
CONFIG_H8_HAS_BAT_THRESHOLDS_IMPL=y
|
||||
CONFIG_H8_HAS_PRIMARY_FN_KEYS=y
|
||||
CONFIG_EC_LENOVO_PMH7=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_STITCH_ME_BIN is not set
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
||||
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
||||
# end of Chipset
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_USE_LIBGFXINIT=y
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
CONFIG_NO_EARLY_GFX_INIT=y
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
# CONFIG_VGA_TEXT_FRAMEBUFFER is not set
|
||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_BOOTSPLASH=y
|
||||
# end of Display
|
||||
|
||||
CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_PLUGIN_SUPPORT=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x04000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
||||
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
||||
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
|
||||
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
|
||||
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
||||
CONFIG_NO_DDR5=y
|
||||
CONFIG_NO_LPDDR4=y
|
||||
CONFIG_NO_DDR4=y
|
||||
CONFIG_NO_DDR2=y
|
||||
CONFIG_USE_DDR3=y
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_ELOG is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_HAVE_EM100PRO_SPI_CONSOLE_SUPPORT=y
|
||||
CONFIG_TPM_INIT_RAMSTAGE=y
|
||||
# CONFIG_TPM_PPI is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
||||
CONFIG_INTEL_DDI=y
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
CONFIG_INTEL_GMA_OPREGION_2_0=y
|
||||
CONFIG_GFX_GMA_DYN_CPU=y
|
||||
CONFIG_GFX_GMA_GENERATION="Haswell"
|
||||
CONFIG_GFX_GMA_PCH="Lynx_Point"
|
||||
CONFIG_GFX_GMA_PANEL_2_PORT="Disabled"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_USE_PC_CMOS_ALTCENTURY=y
|
||||
CONFIG_MEMORY_MAPPED_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
CONFIG_DRIVERS_WIFI_GENERIC=y
|
||||
# end of Generic Drivers
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# CBFS verification
|
||||
#
|
||||
# CONFIG_CBFS_VERIFICATION is not set
|
||||
# end of CBFS verification
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
CONFIG_VBOOT_LIB=y
|
||||
# end of Verified Boot (vboot)
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
# CONFIG_NO_TPM is not set
|
||||
CONFIG_TPM1=y
|
||||
CONFIG_TPM=y
|
||||
CONFIG_MAINBOARD_HAS_TPM1=y
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
CONFIG_TPM_LOG_CB=y
|
||||
CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
|
||||
# end of Trusted Platform Module
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# end of Memory initialization
|
||||
|
||||
# CONFIG_INTEL_TXT is not set
|
||||
# CONFIG_STM is not set
|
||||
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
||||
# CONFIG_BOOTMEDIA_LOCK_NONE is not set
|
||||
CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y
|
||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
||||
CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y
|
||||
# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set
|
||||
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
||||
# end of Security
|
||||
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
CONFIG_ACPI_SOC_NVS=y
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_CONSOLE_I2C_SMBUS is not set
|
||||
# CONFIG_EM100PRO_SPI_CONSOLE is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
||||
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
# end of Console
|
||||
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
CONFIG_IOAPIC=y
|
||||
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
# end of System tables
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BOOTBOOT is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEAGRUB is not set
|
||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
# CONFIG_PAYLOAD_YABITS is not set
|
||||
# CONFIG_PAYLOAD_EDK2 is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
|
||||
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
|
||||
# end of Secondary Payloads
|
||||
# end of Payload
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
|
||||
#
|
||||
# CPU Debug Settings
|
||||
#
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
|
||||
#
|
||||
# BLOB Debug Settings
|
||||
#
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
# end of Debugging
|
||||
|
||||
CONFIG_RAMSTAGE_ADA=y
|
||||
CONFIG_RAMSTAGE_LIBHWBASE=y
|
||||
CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
3083
config/linux-w541.config
Normal file
3083
config/linux-w541.config
Normal file
File diff suppressed because it is too large
Load Diff
Loading…
Reference in New Issue
Block a user