mirror of
https://github.com/linuxboot/heads.git
synced 2025-04-12 21:53:03 +00:00
use native raminit with haswell boards
Signed-off-by: gaspar-ilom <gasparilom@riseup.net>
This commit is contained in:
parent
3f4052c2ad
commit
f448e58495
1
blobs/haswell/.gitignore
vendored
1
blobs/haswell/.gitignore
vendored
@ -1 +0,0 @@
|
||||
mrc.bin
|
@ -1,45 +0,0 @@
|
||||
#!/usr/bin/env bash
|
||||
|
||||
set -e
|
||||
|
||||
function usage() {
|
||||
echo -n \
|
||||
"Usage: $(basename "$0") path_to_output_directory
|
||||
Obtain mrc.bin from a Haswell Chromebook firmware image.
|
||||
"
|
||||
}
|
||||
|
||||
MRC_BIN_HASH="d368ba45096a3b5490ed27014e1f9004bc363434ffdce0c368c08a89c4746722"
|
||||
|
||||
if [[ "${BASH_SOURCE[0]}" == "$0" ]]; then
|
||||
if [[ "${1:-}" == "--help" ]]; then
|
||||
usage
|
||||
else
|
||||
if [[ -z "${COREBOOT_DIR}" ]]; then
|
||||
echo "ERROR: No COREBOOT_DIR variable defined."
|
||||
exit 1
|
||||
fi
|
||||
|
||||
output_dir="$(realpath "${1:-./}")"
|
||||
|
||||
# Obtain mrc.bin from a Haswell Chromebook firmware image.
|
||||
# https://doc.coreboot.org/northbridge/intel/haswell/mrc.bin.html#obtaining-mrc-bin
|
||||
if [[ ! -f "${output_dir}/mrc.bin" ]]; then
|
||||
pushd "${COREBOOT_DIR}"
|
||||
|
||||
make -C util/cbfstool
|
||||
cd util/chromeos
|
||||
./crosfirmware.sh peppy
|
||||
../cbfstool/cbfstool coreboot-*.bin extract -f mrc.bin -n mrc.bin -r RO_SECTION
|
||||
|
||||
mv mrc.bin "${output_dir}/mrc.bin"
|
||||
|
||||
popd
|
||||
fi
|
||||
|
||||
if ! echo "${MRC_BIN_HASH} ${output_dir}/mrc.bin" | sha256sum --check; then
|
||||
echo "ERROR: SHA256 checksum for mrc.bin doesn't match."
|
||||
exit 1
|
||||
fi
|
||||
fi
|
||||
fi
|
@ -49,11 +49,7 @@ export CONFIG_FLASH_OPTIONS="flashprog --progress --programmer internal"
|
||||
|
||||
# Make the Coreboot build depend on the following 3rd party blobs:
|
||||
$(build)/coreboot-$(CONFIG_COREBOOT_VERSION)/$(BOARD)/.build: \
|
||||
$(pwd)/blobs/haswell/mrc.bin $(pwd)/blobs/t440p/me.bin
|
||||
|
||||
$(pwd)/blobs/haswell/mrc.bin:
|
||||
COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
|
||||
$(pwd)/blobs/haswell/obtain-mrc $(pwd)/blobs/haswell
|
||||
$(pwd)/blobs/t440p/me.bin
|
||||
|
||||
$(pwd)/blobs/t440p/me.bin:
|
||||
COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
|
||||
|
@ -49,11 +49,7 @@ export CONFIG_FLASH_OPTIONS="flashprog --progress --programmer internal"
|
||||
|
||||
# Make the Coreboot build depend on the following 3rd party blobs:
|
||||
$(build)/coreboot-$(CONFIG_COREBOOT_VERSION)/$(BOARD)/.build: \
|
||||
$(pwd)/blobs/haswell/mrc.bin $(pwd)/blobs/w541/me.bin
|
||||
|
||||
$(pwd)/blobs/haswell/mrc.bin:
|
||||
COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
|
||||
$(pwd)/blobs/haswell/obtain-mrc $(pwd)/blobs/haswell
|
||||
$(pwd)/blobs/w541/me.bin
|
||||
|
||||
$(pwd)/blobs/w541/me.bin:
|
||||
COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \
|
||||
|
@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
@ -92,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@ -153,9 +155,9 @@ CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_DCACHE_RAM_BASE=0xff7c0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
@ -176,11 +178,10 @@ CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_BOARD_LENOVO_THINKPAD_T440P=y
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_W541 is not set
|
||||
# CONFIG_BOARD_LENOVO_L520 is not set
|
||||
# CONFIG_BOARD_LENOVO_M900 is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
@ -220,7 +221,6 @@ CONFIG_PS2K_EISAID="LEN0071"
|
||||
CONFIG_PS2M_EISAID="LEN0036"
|
||||
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
|
||||
CONFIG_GFX_GMA_PANEL_1_PORT="eDP"
|
||||
CONFIG_LENOVO_TBFW_BIN=""
|
||||
CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
@ -285,9 +285,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
||||
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||
CONFIG_HAVE_MRC=y
|
||||
CONFIG_MRC_FILE="@BLOB_DIR@/haswell/mrc.bin"
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
|
||||
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
@ -321,6 +319,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@ -338,9 +337,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
# Northbridge
|
||||
#
|
||||
CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
|
||||
# CONFIG_USE_NATIVE_RAMINIT is not set
|
||||
# CONFIG_USE_BROADWELL_MRC is not set
|
||||
CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -503,6 +500,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@ -696,6 +694,8 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
@ -714,6 +714,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
@ -18,6 +18,7 @@ CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_OPTION_BACKEND_NONE=y
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
# CONFIG_USE_CBFS_FILE_OPTION_BACKEND is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
|
||||
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
|
||||
CONFIG_SEPARATE_ROMSTAGE=y
|
||||
@ -92,6 +93,7 @@ CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LIBRETREND is not set
|
||||
# CONFIG_VENDOR_MITAC_COMPUTING is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NOVACUSTOM is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
@ -153,9 +155,9 @@ CONFIG_MAX_SOCKET=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_DCACHE_RAM_BASE=0xff7c0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x2000
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x20000
|
||||
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
@ -176,11 +178,10 @@ CONFIG_HAVE_IFD_BIN=y
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_T440P is not set
|
||||
CONFIG_BOARD_LENOVO_THINKPAD_W541=y
|
||||
# CONFIG_BOARD_LENOVO_L520 is not set
|
||||
# CONFIG_BOARD_LENOVO_M900 is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKCENTRE_M900_TINY is not set
|
||||
# CONFIG_BOARD_LENOVO_M920Q is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T480 is not set
|
||||
# CONFIG_BOARD_LENOVO_T480S is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
@ -220,7 +221,6 @@ CONFIG_PS2K_EISAID="LEN0071"
|
||||
CONFIG_PS2M_EISAID="LEN004A"
|
||||
CONFIG_THINKPADEC_HKEY_EISAID="LEN0068"
|
||||
CONFIG_GFX_GMA_PANEL_1_PORT="DP3"
|
||||
CONFIG_LENOVO_TBFW_BIN=""
|
||||
CONFIG_D3COLD_SUPPORT=y
|
||||
CONFIG_GFX_GMA_PANEL_1_ON_EDP=y
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
@ -285,9 +285,7 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16
|
||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256
|
||||
CONFIG_INTEL_GMA_BCLM_WIDTH=16
|
||||
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||
CONFIG_HAVE_MRC=y
|
||||
CONFIG_MRC_FILE="@BLOB_DIR@/haswell/mrc.bin"
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000
|
||||
CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000
|
||||
@ -321,6 +319,7 @@ CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_CPU_PT_ROM_MAP_GB=512
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
@ -338,9 +337,7 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
# Northbridge
|
||||
#
|
||||
CONFIG_NORTHBRIDGE_INTEL_HASWELL=y
|
||||
# CONFIG_USE_NATIVE_RAMINIT is not set
|
||||
# CONFIG_USE_BROADWELL_MRC is not set
|
||||
CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
@ -503,6 +500,7 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_USBDEBUG is not set
|
||||
# CONFIG_VPD is not set
|
||||
# CONFIG_DRIVERS_EMULATION_QEMU_FW_CFG is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
@ -695,6 +693,8 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
@ -713,6 +713,13 @@ CONFIG_HWBASE_DYNAMIC_MMIO=y
|
||||
CONFIG_HWBASE_DEFAULT_MMCONF=0xf0000000
|
||||
CONFIG_HWBASE_DIRECT_PCIDEV=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
|
||||
#
|
||||
# Boot Logo Configuration
|
||||
#
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
# end of Boot Logo Configuration
|
||||
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
|
Loading…
x
Reference in New Issue
Block a user