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nv41 coreboot config: add CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y which enables CONFIG_SPI_FLASH_SMM=y (skylake+ requirements)
Signed-off-by: Thierry Laurion <insurgo@riseup.net>
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@ -428,7 +428,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
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CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
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CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
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CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
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# CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM is not set
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CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y
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CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
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CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
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CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
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@ -621,6 +621,7 @@ CONFIG_MRC_SETTINGS_PROTECT=y
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CONFIG_SPI_FLASH=y
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CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
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CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
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CONFIG_SPI_FLASH_SMM=y
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# CONFIG_SPI_FLASH_NO_FAST_READ is not set
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CONFIG_TPM_INIT_RAMSTAGE=y
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# CONFIG_TPM_PPI is not set
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