mirror of
https://github.com/linuxboot/heads.git
synced 2024-12-24 07:06:42 +00:00
Merge branch 'coreboot-4.8' of https://github.com/flammit/heads
This commit is contained in:
Trammell Hudson
commit
d8a3be47af
@ -1,714 +1,14 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_USE_OPTION_TABLE=y
|
||||
# CONFIG_STATIC_OPTION_TABLE is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
# CONFIG_COLLECT_TIMESTAMPS is not set
|
||||
# CONFIG_USE_BLOBS is not set
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_RELOCATABLE_RAMSTAGE is not set
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
# CONFIG_MEASURED_BOOT is not set
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
CONFIG_VENDOR_ASUS=y
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
|
||||
CONFIG_IRQ_SLOT_COUNT=13
|
||||
CONFIG_MAINBOARD_VENDOR="ASUS"
|
||||
CONFIG_MAX_CPUS=32
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0x1000000
|
||||
CONFIG_UART_FOR_CONSOLE=1
|
||||
CONFIG_APIC_ID_OFFSET=0x0
|
||||
CONFIG_HW_MEM_HOLE_SIZEK=0x100000
|
||||
CONFIG_MAX_PHYSICAL_CPUS=4
|
||||
# CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set
|
||||
CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
|
||||
CONFIG_HT_CHAIN_UNITID_BASE=0x0
|
||||
CONFIG_VGA_BIOS_ID="1a03,2000"
|
||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
CONFIG_DCACHE_RAM_BASE=0xc2000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x1e000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
|
||||
# CONFIG_BOARD_ASUS_A8N_E is not set
|
||||
# CONFIG_BOARD_ASUS_A8N_SLI is not set
|
||||
# CONFIG_BOARD_ASUS_A8V_E_DELUXE is not set
|
||||
# CONFIG_BOARD_ASUS_A8V_E_SE is not set
|
||||
# CONFIG_BOARD_ASUS_AM1I_A is not set
|
||||
# CONFIG_BOARD_ASUS_DSBF is not set
|
||||
# CONFIG_BOARD_ASUS_F2A85_M is not set
|
||||
# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
|
||||
# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
|
||||
# CONFIG_BOARD_ASUS_K8V_X is not set
|
||||
# CONFIG_BOARD_ASUS_KCMA_D8 is not set
|
||||
# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
|
||||
# CONFIG_BOARD_ASUS_KFSN4_DRE_K8 is not set
|
||||
CONFIG_BOARD_ASUS_KGPE_D16=y
|
||||
# CONFIG_BOARD_ASUS_M2N_E is not set
|
||||
# CONFIG_BOARD_ASUS_M2V_MX_SE is not set
|
||||
# CONFIG_BOARD_ASUS_M2V is not set
|
||||
# CONFIG_BOARD_ASUS_M4A78_EM is not set
|
||||
# CONFIG_BOARD_ASUS_M4A785M is not set
|
||||
# CONFIG_BOARD_ASUS_M4A785TM is not set
|
||||
# CONFIG_BOARD_ASUS_M5A88_V is not set
|
||||
# CONFIG_BOARD_ASUS_MEW_AM is not set
|
||||
# CONFIG_BOARD_ASUS_MEW_VM is not set
|
||||
# CONFIG_BOARD_ASUS_P2B_D is not set
|
||||
# CONFIG_BOARD_ASUS_P2B_DS is not set
|
||||
# CONFIG_BOARD_ASUS_P2B_F is not set
|
||||
# CONFIG_BOARD_ASUS_P2B_LS is not set
|
||||
# CONFIG_BOARD_ASUS_P2B is not set
|
||||
# CONFIG_BOARD_ASUS_P3B_F is not set
|
||||
# CONFIG_BOARD_ASUS_P5GC_MX is not set
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_AGP_APERTURE_SIZE=0x4000000
|
||||
CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
|
||||
CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
|
||||
CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL=y
|
||||
CONFIG_MAX_REBOOT_CNT=10
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_POST_DEVICE=y
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_TTYS0_LCS=3
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_UDELAY_LAPIC_FIXED_FSB=200
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
|
||||
CONFIG_CPU_ADDR_BITS=48
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
||||
CONFIG_ROM_SIZE=0x1000000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
# CONFIG_SYSTEM_TYPE_LAPTOP is not set
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_MMCONF_BUS_NUMBER=256
|
||||
CONFIG_RAMTOP=0x400000
|
||||
CONFIG_HEAP_SIZE=0xc0000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
|
||||
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
|
||||
CONFIG_TTYS0_BASE=0x2f8
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_HPET_MIN_TICKS=0x14
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
CONFIG_TTYS0_BAUD=115200
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_DCACHE_BSP_STACK_SLUSH=0x4000
|
||||
CONFIG_DCACHE_AP_STACK_SIZE=0x500
|
||||
CONFIG_CPU_SOCKET_TYPE=0x15
|
||||
# CONFIG_EXT_RT_TBL_SUPPORT is not set
|
||||
CONFIG_CBB=0x0
|
||||
CONFIG_CDB=0x18
|
||||
CONFIG_XIP_ROM_SIZE=0x80000
|
||||
CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y
|
||||
CONFIG_DIMM_SUPPORT=0x0005
|
||||
CONFIG_LIFT_BSP_APIC_ID=y
|
||||
CONFIG_SET_FIDVID=y
|
||||
CONFIG_SET_FIDVID_DEBUG=y
|
||||
# CONFIG_SET_FIDVID_CORE0_ONLY is not set
|
||||
CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
|
||||
CONFIG_CPU_AMD_MODEL_10XXX=y
|
||||
CONFIG_USE_LARGE_DCACHE=y
|
||||
CONFIG_NUM_IPI_STARTS=1
|
||||
CONFIG_SET_FIDVID_CORE_RANGE=0
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
CONFIG_S3_DATA_POS=0x0
|
||||
CONFIG_S3_DATA_SIZE=32768
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
CONFIG_EXT_CONF_SUPPORT=y
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_SSE2=y
|
||||
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
CONFIG_PARALLEL_CPU_INIT=y
|
||||
# CONFIG_PARALLEL_MP is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
CONFIG_UDELAY_LAPIC=y
|
||||
# CONFIG_LAPIC_MONOTONIC_TIMER is not set
|
||||
# CONFIG_UDELAY_TSC is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
CONFIG_TSC_SYNC_LFENCE=y
|
||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
||||
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
# CONFIG_SMM_TSEG is not set
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
CONFIG_X86_AMD_FIXED_MTRRS=y
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
|
||||
CONFIG_CPU_UCODE_BINARIES=""
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
|
||||
CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
|
||||
# CONFIG_HT_CHAIN_DISTRIBUTE is not set
|
||||
# CONFIG_DIMM_FBDIMM is not set
|
||||
# CONFIG_DIMM_DDR2 is not set
|
||||
CONFIG_DIMM_DDR3=y
|
||||
CONFIG_DIMM_REGISTERED=y
|
||||
CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
|
||||
# CONFIG_SVI_HIGH_FREQ is not set
|
||||
|
||||
#
|
||||
# HyperTransport setup
|
||||
#
|
||||
# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
|
||||
CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
|
||||
# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
|
||||
CONFIG_LIMIT_HT_UP_WIDTH_16=y
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
CONFIG_SOUTHBRIDGE_AMD_SB700=y
|
||||
CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
|
||||
# CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI is not set
|
||||
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
|
||||
# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
|
||||
CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
|
||||
CONFIG_SOUTHBRIDGE_AMD_SR5650=y
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
CONFIG_SUPERIO_WINBOND_COMMON_ROMSTAGE=y
|
||||
CONFIG_SUPERIO_WINBOND_W83667HG_A=y
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
# CONFIG_EARLY_EBDA_INIT is not set
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
||||
CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
CONFIG_SMBUS_HAS_AUX_CHANNELS=y
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_DRIVERS_ASPEED_AST2050=y
|
||||
CONFIG_DRIVERS_ASPEED_AST_COMMON=y
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
CONFIG_DRIVERS_I2C_W83795=y
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
# CONFIG_INTEL_GMA_ACPI is not set
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
# CONFIG_DRIVERS_INTEL_WIFI is not set
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
CONFIG_VGA=y
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_SPI_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_TPM is not set
|
||||
CONFIG_TPM2=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
CONFIG_CONSOLE_SERIAL=y
|
||||
|
||||
#
|
||||
# I/O mapped, 8250-compatible
|
||||
#
|
||||
|
||||
#
|
||||
# Serial port base address = 0x2f8
|
||||
#
|
||||
# CONFIG_CONSOLE_SERIAL_921600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_460800 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_230400 is not set
|
||||
CONFIG_CONSOLE_SERIAL_115200=y
|
||||
# CONFIG_CONSOLE_SERIAL_57600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_38400 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_19200 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_9600 is not set
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_POST_DEVICE_NONE=y
|
||||
# CONFIG_POST_DEVICE_LPC is not set
|
||||
# CONFIG_POST_DEVICE_PCI_PCIE is not set
|
||||
CONFIG_POST_IO_PORT=0x80
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
CONFIG_ACPI_HUGE_LOWMEM_BACKUP=y
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
# CONFIG_HAVE_SMI_HANDLER is not set
|
||||
CONFIG_PCI_IO_CFG_EXT=y
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_HAVE_MP_TABLE=y
|
||||
CONFIG_HAVE_PIRQ_TABLE=y
|
||||
# CONFIG_COMMON_FADT is not set
|
||||
# CONFIG_ACPI_NHLT is not set
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
CONFIG_GENERATE_MP_TABLE=y
|
||||
CONFIG_GENERATE_PIRQ_TABLE=y
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/kgpe-d16/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE="nohz=on console=ttyS1,115200n8 earlyprintk=ttyS1,115200"
|
||||
CONFIG_LINUX_INITRD="../../build/kgpe-d16/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_GDB_STUB is not set
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
CONFIG_HAVE_DEBUG_CAR=y
|
||||
# CONFIG_DEBUG_CAR is not set
|
||||
# CONFIG_DEBUG_PIRQ is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_ENABLE_APIC_EXT_ID=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
# CONFIG_REG_SCRIPT is not set
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_BOOTBLOCK_CUSTOM=y
|
||||
|
||||
@ -1,742 +1,32 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="4.7-Purism-4-heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
CONFIG_VENDOR_PURISM=y
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_MAINBOARD_DIR="purism/librem_skl"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="Librem 13 v2"
|
||||
CONFIG_IRQ_SLOT_COUNT=18
|
||||
CONFIG_MAINBOARD_VENDOR="Purism"
|
||||
CONFIG_MAX_CPUS=8
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0xe00000
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_VGA_BIOS_ID="8086,1916"
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number"
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Purism"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DEVICETREE="variants/librem13v2/devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
# CONFIG_HAVE_GBE_BIN is not set
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_VARIANT_DIR="librem13v2"
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_MAINBOARD_FAMILY="Librem 13"
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_DIMM_MAX=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_IFD_BIN_PATH="../../blobs/librem_skl/descriptor.bin"
|
||||
CONFIG_ME_BIN_PATH="../../blobs/librem_skl/me.bin"
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Librem 13 v2"
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_M_FILE="../../blobs/librem_skl/fspm.bin"
|
||||
CONFIG_FSP_S_FILE="../../blobs/librem_skl/fsps.bin"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
|
||||
CONFIG_MAINBOARD_VERSION="2.0"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
# CONFIG_BOARD_PURISM_LIBREM13_V1 is not set
|
||||
CONFIG_BOARD_PURISM_LIBREM13_V2=y
|
||||
# CONFIG_BOARD_PURISM_LIBREM15_V3 is not set
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_BOARD_PURISM_BASEBOARD_LIBREM_SKL=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x18000
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0xFFE115A0
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
||||
CONFIG_ROM_SIZE=0x1000000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_RAMTOP=0x200000
|
||||
CONFIG_HEAP_SIZE=0x80000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ=120
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_CHIPSET_BOOTBLOCK_INCLUDE="soc/intel/skylake/bootblock/timestamp.inc"
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
# CONFIG_SERIAL_CPU_INIT is not set
|
||||
# CONFIG_UART_DEBUG is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_SOC_INTEL_SKYLAKE=y
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
CONFIG_MAINBOARD_USES_FSP2_0=y
|
||||
CONFIG_USE_FSP2_0_DRIVER=y
|
||||
CONFIG_BOOTBLOCK_RESETS="soc/intel/common/reset.c"
|
||||
# CONFIG_EXCLUDE_NATIVE_SD_INTERFACE is not set
|
||||
# CONFIG_SKYLAKE_SOC_PCH_H is not set
|
||||
# CONFIG_NHLT_DMIC_2CH is not set
|
||||
# CONFIG_NHLT_DMIC_4CH is not set
|
||||
# CONFIG_NHLT_NAU88L25 is not set
|
||||
# CONFIG_NHLT_SSM4567 is not set
|
||||
# CONFIG_NHLT_RT5514 is not set
|
||||
# CONFIG_NHLT_RT5663 is not set
|
||||
# CONFIG_NHLT_MAX98927 is not set
|
||||
CONFIG_CAR_NEM_ENHANCED=y
|
||||
# CONFIG_USE_SKYLAKE_FSP_CAR is not set
|
||||
CONFIG_SKIP_FSP_CAR=y
|
||||
# CONFIG_NO_FADT_8042 is not set
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
# Intel SoC Common Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||
|
||||
#
|
||||
# Intel SoC Common IP Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_EBDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||
# CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_DEBUG is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x4000000
|
||||
CONFIG_PCIEX_LENGTH_64MB=y
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
CONFIG_SA_ENABLE_DPR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DISPLAY_SMM_MEMORY_MAP is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_MMA is not set
|
||||
CONFIG_SOC_INTEL_COMMON_GFX_OPREGION=y
|
||||
# CONFIG_SOC_INTEL_COMMON_SMI is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
CONFIG_NO_CAR_GLOBAL_MIGRATION=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_skl/cpu_microcode_blob.bin"
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
# CONFIG_EM100 is not set
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
# CONFIG_HAVE_EC_BIN is not set
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
CONFIG_UDK_2015_BINDING=y
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
CONFIG_EARLY_EBDA_INIT=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_RUN_FSP_GOP is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_NO_GFX_INIT=y
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y
|
||||
CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_skl/vbt.bin"
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_BASE=0xfffe0000
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
# CONFIG_SPI_FLASH_SMM is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_DRIVERS_UART is not set
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_CHECKLIST_DATA_FILE_LOCATION="src/vendorcode/intel/fsp/fsp2_0/checklist"
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
# CONFIG_FSP_CAR is not set
|
||||
CONFIG_FSP_M_XIP=y
|
||||
# CONFIG_VERIFY_HOBS is not set
|
||||
# CONFIG_FSP2_0_USES_TPM_MRC_HASH is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
# CONFIG_INTEL_GMA_ACPI is not set
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
# CONFIG_DRIVERS_INTEL_WIFI is not set
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
CONFIG_ACPI_NHLT=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/librem13v2/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE="intel_iommu=on iommu=pt"
|
||||
CONFIG_LINUX_INITRD="../../build/librem13v2/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
|
||||
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
|
||||
CONFIG_MEMTEST_STABLE=y
|
||||
# CONFIG_MEMTEST_MASTER is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
# CONFIG_HAVE_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
|
||||
@ -1,742 +1,32 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="4.7-Purism-4-heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
CONFIG_VENDOR_PURISM=y
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_MAINBOARD_DIR="purism/librem_skl"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="Librem 15 v3"
|
||||
CONFIG_IRQ_SLOT_COUNT=18
|
||||
CONFIG_MAINBOARD_VENDOR="Purism"
|
||||
CONFIG_MAX_CPUS=8
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0xe00000
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_VGA_BIOS_ID="8086,1916"
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_DIMM_SPD_SIZE=512
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number"
|
||||
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x40000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Purism"
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DEVICETREE="variants/librem15v3/devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
# CONFIG_HAVE_GBE_BIN is not set
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_VARIANT_DIR="librem15v3"
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_MAINBOARD_FAMILY="Librem 15"
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_DIMM_MAX=1
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_IFD_BIN_PATH="../../blobs/librem_skl/descriptor.bin"
|
||||
CONFIG_ME_BIN_PATH="../../blobs/librem_skl/me.bin"
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Librem 15 v3"
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_M_FILE="../../blobs/librem_skl/fspm.bin"
|
||||
CONFIG_FSP_S_FILE="../../blobs/librem_skl/fsps.bin"
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
|
||||
CONFIG_MAINBOARD_VERSION="3.0"
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
# CONFIG_BOARD_PURISM_LIBREM13_V1 is not set
|
||||
# CONFIG_BOARD_PURISM_LIBREM13_V2 is not set
|
||||
CONFIG_BOARD_PURISM_LIBREM15_V3=y
|
||||
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_BOARD_PURISM_BASEBOARD_LIBREM_SKL=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_LEN=0x18000
|
||||
CONFIG_CPU_MICROCODE_CBFS_LOC=0xFFE115A0
|
||||
CONFIG_BOARD_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=16384
|
||||
CONFIG_ROM_SIZE=0x1000000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
|
||||
CONFIG_RAMTOP=0x200000
|
||||
CONFIG_HEAP_SIZE=0x80000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ=120
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
# CONFIG_NHLT_MAX98357 is not set
|
||||
# CONFIG_NHLT_DA7219 is not set
|
||||
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
|
||||
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
|
||||
CONFIG_CHIPSET_BOOTBLOCK_INCLUDE="soc/intel/skylake/bootblock/timestamp.inc"
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_PCIEXP_CLK_PM=y
|
||||
# CONFIG_SERIAL_CPU_INIT is not set
|
||||
# CONFIG_UART_DEBUG is not set
|
||||
CONFIG_MAX_ROOT_PORTS=24
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_SOC_INTEL_SKYLAKE=y
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
CONFIG_MAINBOARD_USES_FSP2_0=y
|
||||
CONFIG_USE_FSP2_0_DRIVER=y
|
||||
CONFIG_BOOTBLOCK_RESETS="soc/intel/common/reset.c"
|
||||
# CONFIG_EXCLUDE_NATIVE_SD_INTERFACE is not set
|
||||
# CONFIG_SKYLAKE_SOC_PCH_H is not set
|
||||
# CONFIG_NHLT_DMIC_2CH is not set
|
||||
# CONFIG_NHLT_DMIC_4CH is not set
|
||||
# CONFIG_NHLT_NAU88L25 is not set
|
||||
# CONFIG_NHLT_SSM4567 is not set
|
||||
# CONFIG_NHLT_RT5514 is not set
|
||||
# CONFIG_NHLT_RT5663 is not set
|
||||
# CONFIG_NHLT_MAX98927 is not set
|
||||
CONFIG_CAR_NEM_ENHANCED=y
|
||||
# CONFIG_USE_SKYLAKE_FSP_CAR is not set
|
||||
CONFIG_SKIP_FSP_CAR=y
|
||||
# CONFIG_NO_FADT_8042 is not set
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
# Intel SoC Common Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||
|
||||
#
|
||||
# Intel SoC Common IP Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||
# CONFIG_INTEL_CAR_NEM is not set
|
||||
# CONFIG_INTEL_CAR_CQOS is not set
|
||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_EBDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||
# CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_DEBUG is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
||||
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SA_PCIEX_LENGTH=0x4000000
|
||||
CONFIG_PCIEX_LENGTH_64MB=y
|
||||
# CONFIG_SA_ENABLE_IMR is not set
|
||||
CONFIG_SA_ENABLE_DPR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
# CONFIG_DISPLAY_SMM_MEMORY_MAP is not set
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
# CONFIG_ACPI_CONSOLE is not set
|
||||
# CONFIG_MMA is not set
|
||||
CONFIG_SOC_INTEL_COMMON_GFX_OPREGION=y
|
||||
# CONFIG_SOC_INTEL_COMMON_SMI is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
|
||||
CONFIG_SOC_INTEL_COMMON_NHLT=y
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
CONFIG_NO_CAR_GLOBAL_MIGRATION=y
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_skl/cpu_microcode_blob.bin"
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
# CONFIG_EM100 is not set
|
||||
# CONFIG_CHECK_ME is not set
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
# CONFIG_HAVE_EC_BIN is not set
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
CONFIG_UDK_2015_BINDING=y
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
CONFIG_EARLY_EBDA_INIT=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
# CONFIG_RUN_FSP_GOP is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_NO_GFX_INIT=y
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y
|
||||
CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_skl/vbt.bin"
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_ELOG is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_BASE=0xfffe0000
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
# CONFIG_SPI_FLASH_SMM is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_DRIVERS_UART is not set
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
# CONFIG_HAVE_USBDEBUG is not set
|
||||
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
CONFIG_CHECKLIST_DATA_FILE_LOCATION="src/vendorcode/intel/fsp/fsp2_0/checklist"
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
# CONFIG_FSP_CAR is not set
|
||||
CONFIG_FSP_M_XIP=y
|
||||
# CONFIG_VERIFY_HOBS is not set
|
||||
# CONFIG_FSP2_0_USES_TPM_MRC_HASH is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
# CONFIG_INTEL_GMA_ACPI is not set
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
# CONFIG_DRIVERS_INTEL_WIFI is not set
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
CONFIG_ACPI_NHLT=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/librem15v3/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE="intel_iommu=on iommu=pt"
|
||||
CONFIG_LINUX_INITRD="../../build/librem15v3/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
|
||||
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
|
||||
CONFIG_MEMTEST_STABLE=y
|
||||
# CONFIG_MEMTEST_MASTER is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
# CONFIG_HAVE_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_NO_EDID_FILL_FB=y
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
CONFIG_REG_SCRIPT=y
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y
|
||||
|
||||
@ -1,576 +1,17 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="-heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
# CONFIG_INCLUDE_CONFIG_FILE is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS=y
|
||||
# CONFIG_USE_BLOBS is not set
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
# CONFIG_RELOCATABLE_RAMSTAGE is not set
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
CONFIG_VENDOR_EMULATION=y
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
# CONFIG_VENDOR_LENOVO is not set
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="emulation/qemu-q35"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 q35/ich9"
|
||||
CONFIG_MAINBOARD_VENDOR="Emulation"
|
||||
CONFIG_MAX_CPUS=1
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0x700000
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
CONFIG_DCACHE_RAM_BASE=0xd0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Emulation"
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xb0000000
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/emulation/qemu-q35/bootblock.c"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
|
||||
CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y
|
||||
# CONFIG_BOARD_EMULATION_QEMU_UCB_RISCV is not set
|
||||
# CONFIG_BOARD_EMULATION_SPIKE_UCB_RISCV is not set
|
||||
CONFIG_BOARD_EMULATION_QEMU_X86=y
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9"
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=6
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=8192
|
||||
CONFIG_ROM_SIZE=0x800000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
# CONFIG_SYSTEM_TYPE_LAPTOP is not set
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_RAMTOP=0x200000
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801ix/bootblock.c"
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_XIP_ROM_SIZE=0x10000
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
# CONFIG_SSE2 is not set
|
||||
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
CONFIG_CPU_QEMU_X86=y
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
# CONFIG_PARALLEL_MP is not set
|
||||
CONFIG_UDELAY_IO=y
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
# CONFIG_UDELAY_TSC is not set
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
# CONFIG_TSC_SYNC_MFENCE is not set
|
||||
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
# CONFIG_SMM_TSEG is not set
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES=""
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
# CONFIG_EARLY_EBDA_INIT is not set
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS=y
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
||||
CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
|
||||
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
||||
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
# CONFIG_SPI_FLASH is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_DRIVERS_UART is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
|
||||
# CONFIG_NO_UART_ON_SUPERIO is not set
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
# CONFIG_INTEL_GMA_ACPI is not set
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
CONFIG_VGA=y
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_CONSOLE_SERIAL is not set
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
CONFIG_CONSOLE_QEMU_DEBUGCON=y
|
||||
CONFIG_CONSOLE_QEMU_DEBUGCON_PORT=0x402
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
# CONFIG_HWBASE_DEBUG_CB is not set
|
||||
CONFIG_HWBASE_DEBUG_NULL=y
|
||||
# CONFIG_HAVE_ACPI_RESUME is not set
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_MONOTONIC_TIMER is not set
|
||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
# CONFIG_COMMON_FADT is not set
|
||||
# CONFIG_ACPI_NHLT is not set
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/qemu-coreboot/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE=""
|
||||
CONFIG_LINUX_INITRD="../../build/qemu-coreboot/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
# CONFIG_DEBUG_SMM_RELOCATION is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
# CONFIG_REG_SCRIPT is not set
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_BOOTBLOCK_CUSTOM=y
|
||||
|
||||
@ -1,683 +1,25 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
# CONFIG_INCLUDE_CONFIG_FILE is not set
|
||||
# CONFIG_COLLECT_TIMESTAMPS is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="lenovo/x220"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
|
||||
CONFIG_MAINBOARD_VENDOR="LENOVO"
|
||||
CONFIG_MAX_CPUS=8
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0x7e8000
|
||||
CONFIG_VGA_BIOS_ID="8086,0126"
|
||||
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefe0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x20000
|
||||
CONFIG_VGA_BIOS_FILE="pci8086,0126.rom"
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21db
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_DRAM_RESET_GATE_GPIO=10
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||
CONFIG_IFD_BIN_PATH="../../blobs/x220/ifd.bin"
|
||||
CONFIG_ME_BIN_PATH="../../blobs/x220/me.bin"
|
||||
# CONFIG_BOARD_LENOVO_G505S is not set
|
||||
# CONFIG_BOARD_LENOVO_L520 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420S is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
|
||||
# CONFIG_BOARD_LENOVO_X200 is not set
|
||||
# CONFIG_BOARD_LENOVO_X201 is not set
|
||||
CONFIG_BOARD_LENOVO_X220=y
|
||||
# CONFIG_BOARD_LENOVO_X220I is not set
|
||||
# CONFIG_BOARD_LENOVO_X230 is not set
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
CONFIG_NO_POST=y
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=8192
|
||||
CONFIG_ROM_SIZE=0x800000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_RAMTOP=0x200000
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
# CONFIG_BUILD_WITH_FAKE_IFD is not set
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
|
||||
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
|
||||
CONFIG_CACHE_MRC_SIZE_KB=512
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
|
||||
CONFIG_XIP_ROM_SIZE=0x20000
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_CPU_INTEL_MODEL_206AX=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_SOCKET_RPGA989=y
|
||||
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_VMX_LOCK_BIT=y
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
# CONFIG_PARALLEL_MP is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
CONFIG_MMX=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES=""
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
|
||||
CONFIG_MRC_CACHE_SIZE=0x10000
|
||||
CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_C216=y
|
||||
CONFIG_SOUTH_BRIDGE_OPTIONS=y
|
||||
CONFIG_LOCK_SPI_FLASH_NONE=y
|
||||
# CONFIG_LOCK_SPI_FLASH_RO is not set
|
||||
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
CONFIG_EC_LENOVO_H8=y
|
||||
CONFIG_H8_BEEP_ON_DEATH=y
|
||||
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
|
||||
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
|
||||
CONFIG_EC_LENOVO_PMH7=y
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
# CONFIG_EM100 is not set
|
||||
CONFIG_CHECK_ME=y
|
||||
# CONFIG_USE_ME_CLEANER is not set
|
||||
CONFIG_GBE_BIN_PATH="../../blobs/x220/gbe.bin"
|
||||
# CONFIG_HAVE_EC_BIN is not set
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
# CONFIG_EARLY_EBDA_INIT is not set
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
||||
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
|
||||
# CONFIG_SPI_FLASH_SMM is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_DRIVERS_UART is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Sandybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
|
||||
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
|
||||
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
# CONFIG_HWBASE_DEBUG_CB is not set
|
||||
CONFIG_HWBASE_DEBUG_NULL=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
# CONFIG_ACPI_NHLT is not set
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/x220/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE="quiet"
|
||||
CONFIG_LINUX_INITRD="../../build/x220/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
CONFIG_DEBUG_SMM_RELOCATION=y
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
# CONFIG_REG_SCRIPT is not set
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_BOOTBLOCK_CUSTOM=y
|
||||
|
||||
@ -1,705 +1,18 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
# CONFIG_INCLUDE_CONFIG_FILE is not set
|
||||
# CONFIG_COLLECT_TIMESTAMPS is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="lenovo/x230"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
|
||||
CONFIG_MAINBOARD_VENDOR="LENOVO"
|
||||
CONFIG_MAX_CPUS=8
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0x400000
|
||||
CONFIG_UART_FOR_CONSOLE=0
|
||||
CONFIG_VGA_BIOS_ID="8086,0166"
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefe0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x20000
|
||||
CONFIG_VGA_BIOS_FILE="pci8086,0166.rom"
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
|
||||
# CONFIG_HAVE_IFD_BIN is not set
|
||||
# CONFIG_HAVE_ME_BIN is not set
|
||||
CONFIG_DRAM_RESET_GATE_GPIO=10
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_IFD_BIOS_SECTION=""
|
||||
CONFIG_IFD_ME_SECTION=""
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_TTYS0_LCS=3
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_IFD_GBE_SECTION=""
|
||||
# CONFIG_BOARD_LENOVO_G505S is not set
|
||||
# CONFIG_BOARD_LENOVO_L520 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420S is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
|
||||
# CONFIG_BOARD_LENOVO_X200 is not set
|
||||
# CONFIG_BOARD_LENOVO_X201 is not set
|
||||
# CONFIG_BOARD_LENOVO_X220 is not set
|
||||
# CONFIG_BOARD_LENOVO_X220I is not set
|
||||
CONFIG_BOARD_LENOVO_X230=y
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0xc00000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_RAMTOP=0x200000
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
CONFIG_BUILD_WITH_FAKE_IFD=y
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
|
||||
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
|
||||
CONFIG_CACHE_MRC_SIZE_KB=512
|
||||
CONFIG_TTYS0_BASE=0x3f8
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
CONFIG_TTYS0_BAUD=115200
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
|
||||
CONFIG_XIP_ROM_SIZE=0x20000
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_CPU_INTEL_MODEL_306AX=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_SOCKET_RPGA989=y
|
||||
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_VMX_LOCK_BIT=y
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
# CONFIG_PARALLEL_MP is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
CONFIG_MMX=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES=""
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
|
||||
CONFIG_MRC_CACHE_SIZE=0x10000
|
||||
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_C216=y
|
||||
CONFIG_SOUTH_BRIDGE_OPTIONS=y
|
||||
CONFIG_LOCK_SPI_FLASH_NONE=y
|
||||
# CONFIG_LOCK_SPI_FLASH_RO is not set
|
||||
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
CONFIG_EC_LENOVO_H8=y
|
||||
CONFIG_H8_BEEP_ON_DEATH=y
|
||||
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
|
||||
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
|
||||
CONFIG_EC_LENOVO_PMH7=y
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
# CONFIG_EARLY_EBDA_INIT is not set
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
||||
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
|
||||
# CONFIG_SPI_FLASH_SMM is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
CONFIG_DRIVERS_UART=y
|
||||
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Ivybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
|
||||
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
|
||||
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
CONFIG_CONSOLE_SERIAL=y
|
||||
|
||||
#
|
||||
# I/O mapped, 8250-compatible
|
||||
#
|
||||
|
||||
#
|
||||
# Serial port base address = 0x3f8
|
||||
#
|
||||
# CONFIG_CONSOLE_SERIAL_921600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_460800 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_230400 is not set
|
||||
CONFIG_CONSOLE_SERIAL_115200=y
|
||||
# CONFIG_CONSOLE_SERIAL_57600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_38400 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_19200 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_9600 is not set
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
CONFIG_POST_IO_PORT=0x80
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
# CONFIG_ACPI_NHLT is not set
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/x230-flash/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE=""
|
||||
CONFIG_LINUX_INITRD="../../build/x230-flash/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_GDB_STUB is not set
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
CONFIG_DEBUG_SMM_RELOCATION=y
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
# CONFIG_REG_SCRIPT is not set
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_BOOTBLOCK_CUSTOM=y
|
||||
|
||||
@ -1,685 +1,21 @@
|
||||
#
|
||||
# Automatically generated file; DO NOT EDIT.
|
||||
# coreboot configuration
|
||||
#
|
||||
|
||||
#
|
||||
# General setup
|
||||
#
|
||||
CONFIG_COREBOOT_BUILD=y
|
||||
CONFIG_LOCALVERSION="heads"
|
||||
CONFIG_CBFS_PREFIX="fallback"
|
||||
CONFIG_COMPILER_GCC=y
|
||||
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||
# CONFIG_ANY_TOOLCHAIN is not set
|
||||
# CONFIG_CCACHE is not set
|
||||
# CONFIG_FMD_GENPARSER is not set
|
||||
# CONFIG_UTIL_GENPARSER is not set
|
||||
# CONFIG_USE_OPTION_TABLE is not set
|
||||
CONFIG_COMPRESS_RAMSTAGE=y
|
||||
# CONFIG_INCLUDE_CONFIG_FILE is not set
|
||||
# CONFIG_COLLECT_TIMESTAMPS is not set
|
||||
CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
|
||||
#
|
||||
# Mainboard
|
||||
#
|
||||
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
# CONFIG_VENDOR_AMD is not set
|
||||
# CONFIG_VENDOR_AOPEN is not set
|
||||
# CONFIG_VENDOR_APPLE is not set
|
||||
# CONFIG_VENDOR_ARTECGROUP is not set
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
# CONFIG_VENDOR_FOXCONN is not set
|
||||
# CONFIG_VENDOR_GETAC is not set
|
||||
# CONFIG_VENDOR_GIGABYTE is not set
|
||||
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||
# CONFIG_VENDOR_GOOGLE is not set
|
||||
# CONFIG_VENDOR_HP is not set
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="lenovo/x230"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
|
||||
CONFIG_MAINBOARD_VENDOR="LENOVO"
|
||||
CONFIG_MAX_CPUS=8
|
||||
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
|
||||
CONFIG_CBFS_SIZE=0x700000
|
||||
CONFIG_VGA_BIOS_ID="8086,0166"
|
||||
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
|
||||
CONFIG_DIMM_SPD_SIZE=256
|
||||
# CONFIG_VGA_BIOS is not set
|
||||
CONFIG_DCACHE_RAM_BASE=0xfefe0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x20000
|
||||
CONFIG_VGA_BIOS_FILE="pci8086,0166.rom"
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
|
||||
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
|
||||
# CONFIG_HAVE_IFD_BIN is not set
|
||||
# CONFIG_HAVE_ME_BIN is not set
|
||||
CONFIG_DRAM_RESET_GATE_GPIO=10
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_IFD_BIOS_SECTION=""
|
||||
CONFIG_IFD_ME_SECTION=""
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
CONFIG_FMDFILE=""
|
||||
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
|
||||
CONFIG_DRIVERS_UART_8250IO=y
|
||||
CONFIG_IFD_GBE_SECTION=""
|
||||
# CONFIG_BOARD_LENOVO_G505S is not set
|
||||
# CONFIG_BOARD_LENOVO_L520 is not set
|
||||
# CONFIG_BOARD_LENOVO_R400 is not set
|
||||
# CONFIG_BOARD_LENOVO_S230U is not set
|
||||
# CONFIG_BOARD_LENOVO_T400 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420 is not set
|
||||
# CONFIG_BOARD_LENOVO_T420S is not set
|
||||
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
|
||||
# CONFIG_BOARD_LENOVO_X200 is not set
|
||||
# CONFIG_BOARD_LENOVO_X201 is not set
|
||||
# CONFIG_BOARD_LENOVO_X220 is not set
|
||||
# CONFIG_BOARD_LENOVO_X220I is not set
|
||||
CONFIG_BOARD_LENOVO_X230=y
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0xc00000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
|
||||
# SoC
|
||||
#
|
||||
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||
CONFIG_RAMTOP=0x200000
|
||||
CONFIG_HEAP_SIZE=0x4000
|
||||
CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
|
||||
# CONFIG_SOC_INTEL_GLK is not set
|
||||
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
|
||||
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
CONFIG_BUILD_WITH_FAKE_IFD=y
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
|
||||
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
|
||||
CONFIG_CACHE_MRC_SIZE_KB=512
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
# CONFIG_SOC_MEDIATEK_MT8173 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
|
||||
# CONFIG_SOC_UCB_RISCV is not set
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
# CONFIG_CPU_ALLWINNER_A10 is not set
|
||||
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
|
||||
CONFIG_XIP_ROM_SIZE=0x20000
|
||||
CONFIG_NUM_IPI_STARTS=2
|
||||
# CONFIG_CPU_AMD_AGESA is not set
|
||||
# CONFIG_CPU_AMD_PI is not set
|
||||
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
|
||||
CONFIG_CPU_INTEL_MODEL_306AX=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_CPU_INTEL_SOCKET_RPGA989=y
|
||||
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
|
||||
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_VMX_LOCK_BIT=y
|
||||
# CONFIG_CPU_TI_AM335X is not set
|
||||
# CONFIG_PARALLEL_CPU_INIT is not set
|
||||
# CONFIG_PARALLEL_MP is not set
|
||||
# CONFIG_UDELAY_IO is not set
|
||||
# CONFIG_UDELAY_LAPIC is not set
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_CONSTANT_RATE=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
# CONFIG_UDELAY_TIMER2 is not set
|
||||
# CONFIG_TSC_SYNC_LFENCE is not set
|
||||
CONFIG_TSC_SYNC_MFENCE=y
|
||||
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
|
||||
CONFIG_LOGICAL_CPUS=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
|
||||
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
|
||||
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
|
||||
# CONFIG_X86_AMD_FIXED_MTRRS is not set
|
||||
# CONFIG_PLATFORM_USES_FSP1_0 is not set
|
||||
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
|
||||
# CONFIG_SOC_SETS_MSRS is not set
|
||||
CONFIG_CACHE_AS_RAM=y
|
||||
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
|
||||
CONFIG_SMP=y
|
||||
CONFIG_AP_SIPI_VECTOR=0xfffff000
|
||||
CONFIG_MMX=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
|
||||
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
|
||||
CONFIG_CPU_UCODE_BINARIES=""
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
|
||||
# CONFIG_NO_MMCONF_SUPPORT is not set
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
|
||||
CONFIG_MRC_CACHE_SIZE=0x10000
|
||||
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
# CONFIG_AMD_SB_CIMX is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
|
||||
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_C216=y
|
||||
CONFIG_SOUTH_BRIDGE_OPTIONS=y
|
||||
CONFIG_LOCK_SPI_FLASH_NONE=y
|
||||
# CONFIG_LOCK_SPI_FLASH_RO is not set
|
||||
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
CONFIG_EC_LENOVO_H8=y
|
||||
CONFIG_H8_BEEP_ON_DEATH=y
|
||||
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
|
||||
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
|
||||
CONFIG_EC_LENOVO_PMH7=y
|
||||
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
|
||||
# CONFIG_ARM_LPAE is not set
|
||||
# CONFIG_ARCH_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
# CONFIG_ARCH_VERSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
|
||||
# CONFIG_ARCH_POWER8 is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
|
||||
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
|
||||
# CONFIG_USE_MARCH_586 is not set
|
||||
# CONFIG_AP_IN_SIPI_WAIT is not set
|
||||
# CONFIG_SIPI_VECTOR_IN_ROM is not set
|
||||
# CONFIG_ROMCC is not set
|
||||
# CONFIG_CBMEM_TOP_BACKUP is not set
|
||||
# CONFIG_LATE_CBMEM_INIT is not set
|
||||
# CONFIG_EARLY_EBDA_INIT is not set
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
|
||||
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
|
||||
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
|
||||
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_VGA_TEXT_FRAMEBUFFER=y
|
||||
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
|
||||
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
|
||||
CONFIG_PCI=y
|
||||
CONFIG_MMCONF_SUPPORT=y
|
||||
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
# CONFIG_DRIVERS_AS3722_RTC is not set
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
|
||||
# CONFIG_SPI_FLASH_SMM is not set
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_SPI_FLASH_ADESTO=y
|
||||
CONFIG_SPI_FLASH_AMIC=y
|
||||
CONFIG_SPI_FLASH_ATMEL=y
|
||||
CONFIG_SPI_FLASH_EON=y
|
||||
CONFIG_SPI_FLASH_GIGADEVICE=y
|
||||
CONFIG_SPI_FLASH_MACRONIX=y
|
||||
CONFIG_SPI_FLASH_SPANSION=y
|
||||
CONFIG_SPI_FLASH_SST=y
|
||||
CONFIG_SPI_FLASH_STMICRO=y
|
||||
CONFIG_SPI_FLASH_WINBOND=y
|
||||
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
|
||||
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
|
||||
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
|
||||
# CONFIG_DRIVERS_UART is not set
|
||||
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
|
||||
# CONFIG_UART_OVERRIDE_REFCLK is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM is not set
|
||||
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
|
||||
# CONFIG_HAVE_UART_SPECIAL is not set
|
||||
# CONFIG_DRIVERS_UART_OXPCIE is not set
|
||||
# CONFIG_DRIVERS_UART_PL011 is not set
|
||||
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
|
||||
CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Ivybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
|
||||
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
|
||||
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
|
||||
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_USE_SAR is not set
|
||||
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
|
||||
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
|
||||
# CONFIG_DRIVER_TI_TPS65090 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913 is not set
|
||||
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
|
||||
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
|
||||
# CONFIG_COMMONLIB_STORAGE is not set
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
# CONFIG_CONSOLE_SERIAL is not set
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
|
||||
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
# CONFIG_CMOS_POST is not set
|
||||
# CONFIG_CONSOLE_POST is not set
|
||||
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
|
||||
# CONFIG_HWBASE_DEBUG_CB is not set
|
||||
CONFIG_HWBASE_DEBUG_NULL=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
# CONFIG_GENERIC_UDELAY is not set
|
||||
# CONFIG_TIMER_QUEUE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
CONFIG_IOAPIC=y
|
||||
CONFIG_USE_WATCHDOG_ON_BOOT=y
|
||||
# CONFIG_GFXUMA is not set
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_COMMON_FADT=y
|
||||
# CONFIG_ACPI_NHLT is not set
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
# CONFIG_GENERATE_MP_TABLE is not set
|
||||
# CONFIG_GENERATE_PIRQ_TABLE is not set
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BAYOU is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
# CONFIG_PAYLOAD_TIANOCORE is not set
|
||||
CONFIG_PAYLOAD_FILE="../../build/x230/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_COMMAND_LINE="quiet"
|
||||
CONFIG_LINUX_INITRD="../../build/x230/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
# CONFIG_HAVE_DEBUG_CAR is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_SMI is not set
|
||||
CONFIG_DEBUG_SMM_RELOCATION=y
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
# CONFIG_ENABLE_APIC_EXT_ID is not set
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
|
||||
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
|
||||
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
|
||||
# CONFIG_REG_SCRIPT is not set
|
||||
# CONFIG_CREATE_BOARD_CHECKLIST is not set
|
||||
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
|
||||
# CONFIG_NO_XIP_EARLY_STAGES is not set
|
||||
CONFIG_EARLY_CBMEM_INIT=y
|
||||
# CONFIG_EARLY_CBMEM_LIST is not set
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_BOOTBLOCK_CUSTOM=y
|
||||
|
||||
@ -2,12 +2,12 @@ modules-$(CONFIG_COREBOOT) += coreboot
|
||||
|
||||
#coreboot_version := git
|
||||
#coreboot_repo := https://github.com/osresearch/coreboot
|
||||
coreboot_version := 4.7
|
||||
coreboot_version := 4.8.1
|
||||
coreboot_base_dir := coreboot-$(coreboot_version)
|
||||
coreboot_dir := $(coreboot_base_dir)/$(BOARD)
|
||||
coreboot_tar := coreboot-$(coreboot_version).tar.xz
|
||||
coreboot_url := https://www.coreboot.org/releases/$(coreboot_tar)
|
||||
coreboot_hash := d68a83f8f687e8ea212b8c5bb501e24444b57c3f73896042d09628188c851368
|
||||
coreboot_hash := f0ddf4db0628c1fe1e8348c40084d9cbeb5771400c963fd419cda3995b69ad23
|
||||
|
||||
# Coreboot builds are specialized on a per-target basis.
|
||||
# The builds are done in a per-target subdirectory
|
||||
@ -19,18 +19,20 @@ $(build)/$(coreboot_dir)/.configured: $(CONFIG_COREBOOT_CONFIG)
|
||||
EXTRA_FLAGS := -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches
|
||||
|
||||
coreboot_configure := \
|
||||
$(MAKE) -C $(build)/$(coreboot_base_dir) \
|
||||
oldconfig \
|
||||
obj=$(build)/$(coreboot_dir) \
|
||||
DOTCONFIG=../../$(CONFIG_COREBOOT_CONFIG) \
|
||||
mkdir -p "$(build)/$(coreboot_dir)" \
|
||||
&& cp "$(pwd)/$(CONFIG_COREBOOT_CONFIG)" "$(build)/$(coreboot_dir)/.config" \
|
||||
&& $(MAKE) olddefconfig \
|
||||
-C "$(build)/$(coreboot_base_dir)" \
|
||||
obj="$(build)/$(coreboot_dir)" \
|
||||
DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
|
||||
BUILD_TIMELESS=1 \
|
||||
CFLAGS_x86_32="$(EXTRA_FLAGS)" \
|
||||
CFLAGS_x86_64="$(EXTRA_FLAGS)" \
|
||||
|
||||
coreboot_target := \
|
||||
-C $(build)/$(coreboot_base_dir) \
|
||||
obj=$(build)/$(coreboot_dir) \
|
||||
DOTCONFIG=../../$(CONFIG_COREBOOT_CONFIG) \
|
||||
-C "$(build)/$(coreboot_base_dir)" \
|
||||
obj="$(build)/$(coreboot_dir)" \
|
||||
DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
|
||||
BUILD_TIMELESS=1 \
|
||||
CFLAGS_x86_32="$(EXTRA_FLAGS)" \
|
||||
CFLAGS_x86_64="$(EXTRA_FLAGS)" \
|
||||
@ -64,9 +66,18 @@ $(build)/$(BOARD)/coreboot.rom: $(build)/$(coreboot_dir)/.build
|
||||
coreboot.menuconfig:
|
||||
$(MAKE) \
|
||||
-C "$(build)/$(coreboot_base_dir)" \
|
||||
DOTCONFIG="../../$(CONFIG_COREBOOT_CONFIG)" \
|
||||
DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
|
||||
menuconfig
|
||||
|
||||
# The config file in the repo is stored as a "defconfig" format
|
||||
# which only includes the options that have changed from the defaults.
|
||||
coreboot.saveconfig:
|
||||
$(MAKE) \
|
||||
-C "$(build)/$(coreboot_base_dir)" \
|
||||
DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
|
||||
DEFCONFIG="$(pwd)/$(CONFIG_COREBOOT_CONFIG)" \
|
||||
savedefconfig
|
||||
|
||||
|
||||
# if we are not building from a git checkout,
|
||||
# we must also download the coreboot-blobs tree
|
||||
@ -79,7 +90,7 @@ coreboot-blobs_version := $(coreboot_version)
|
||||
coreboot-blobs_tar := coreboot-blobs-$(coreboot-blobs_version).tar.xz
|
||||
coreboot-blobs_dir := coreboot-$(coreboot-blobs_version)/3rdparty/blobs
|
||||
coreboot-blobs_url := https://www.coreboot.org/releases/$(coreboot-blobs_tar)
|
||||
coreboot-blobs_hash := 443379a2207e350747cbbfe7968ceafddc7dd8563b067476f755ff11791bb5f5
|
||||
coreboot-blobs_hash := 18aa509ae3af005a05d7b1e0b0246dc640249c14fc828f5144b6fd20bb10e295
|
||||
|
||||
## there is nothing to build for the blobs, this should be
|
||||
## made easier to make happen
|
||||
|
||||
@ -29,6 +29,8 @@ lvm2_configure := \
|
||||
--disable-use-lvmpolld \
|
||||
--disable-blkid_wiping \
|
||||
--disable-cmirrord \
|
||||
--disable-cache_check_needs_check \
|
||||
--disable-thin_check_needs_check \
|
||||
--with-cluster=none \
|
||||
|
||||
# not sure why LIB_SUFFIX is not defined in the cross build
|
||||
|
||||
@ -8,8 +8,10 @@ slang_hash := 54f0c3007fde918039c058965dffdfd6c5aec0bad0f4227192cc486021f08c36
|
||||
|
||||
slang_configure := ./configure \
|
||||
$(CROSS_TOOLS) \
|
||||
ac_cv_path_nc5config=no \
|
||||
--prefix "/" \
|
||||
--host i386-elf-linux \
|
||||
--with-z=no \
|
||||
--with-png=no \
|
||||
--with-pcre=no \
|
||||
--with-onig=no \
|
||||
|
||||
@ -1,72 +0,0 @@
|
||||
From feb246c6e8a87c1223c84b4b74f976d23506bb96 Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Wed, 7 Feb 2018 11:49:35 -0500
|
||||
Subject: [PATCH 1/9] intel/fsp: Fix TPM initialization when vboot is disabled
|
||||
|
||||
A change introduced by commit fe4983e5 [1] in order to prevent
|
||||
re-initialization of the TPM if already setup in verstage
|
||||
had the wrong logic in the if statement, causing the TPM
|
||||
to never be initialized if vboot is disabled.
|
||||
|
||||
The RESUME_PATH_SAME_AS_BOOT config is enabled by default for
|
||||
ARCH_X86 and therefore the if statement would be false. The
|
||||
behavior that was intended was probably meant to use an OR
|
||||
instead of an AND.
|
||||
|
||||
This patch also enabled TPM initialization for FSP 2.0.
|
||||
|
||||
[1] https://review.coreboot.org/#/c/coreboot/+/14106/
|
||||
|
||||
Change-Id: Ic43d1aa31a296386c7eab6d997f9b701e9ea0fe5
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/drivers/intel/fsp1_1/romstage.c | 4 ++--
|
||||
src/drivers/intel/fsp2_0/memory_init.c | 10 ++++++++++
|
||||
2 files changed, 12 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
|
||||
index 81939c4c33..76b4ad7c4d 100644
|
||||
--- a/src/drivers/intel/fsp1_1/romstage.c
|
||||
+++ b/src/drivers/intel/fsp1_1/romstage.c
|
||||
@@ -172,8 +172,8 @@ void romstage_common(struct romstage_params *params)
|
||||
* in verstage and used to verify romstage.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_LPC_TPM) &&
|
||||
- !IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) &&
|
||||
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
|
||||
+ (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
|
||||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)))
|
||||
init_tpm(params->power_state->prev_sleep_state ==
|
||||
ACPI_S3);
|
||||
}
|
||||
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
|
||||
index 368fafa5d7..575f277466 100644
|
||||
--- a/src/drivers/intel/fsp2_0/memory_init.c
|
||||
+++ b/src/drivers/intel/fsp2_0/memory_init.c
|
||||
@@ -28,6 +28,7 @@
|
||||
#include <program_loading.h>
|
||||
#include <reset.h>
|
||||
#include <romstage_handoff.h>
|
||||
+#include <tpm.h>
|
||||
#include <string.h>
|
||||
#include <symbols.h>
|
||||
#include <timestamp.h>
|
||||
@@ -146,6 +147,15 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
|
||||
|
||||
/* Create romstage handof information */
|
||||
romstage_handoff_init(s3wake);
|
||||
+
|
||||
+ /*
|
||||
+ * Initialize the TPM, unless the TPM was already initialized
|
||||
+ * in verstage and used to verify romstage.
|
||||
+ */
|
||||
+ if (IS_ENABLED(CONFIG_LPC_TPM) &&
|
||||
+ (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
|
||||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)))
|
||||
+ init_tpm(s3wake);
|
||||
}
|
||||
|
||||
static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size)
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,173 +0,0 @@
|
||||
From 403242fbaf2c3b8c12f4b1d55a581513aabf02a3 Mon Sep 17 00:00:00 2001
|
||||
From: Nico Huber <nico.h@gmx.de>
|
||||
Date: Tue, 19 Sep 2017 09:36:03 +0200
|
||||
Subject: [PATCH 3/9] soc/intel/skylake: Enable VT-d and X2APIC
|
||||
|
||||
We use the usual static addresses 0xfed90000/0xfed91000 for the GFX
|
||||
IOMMU and the general IOMMU respectively. These addresses have to be
|
||||
configured in MCHBAR registers (maybe, who knows, the blob is undocu-
|
||||
mented), advertised to FSP and reserved from the OS.
|
||||
|
||||
Change-Id: I77f87c385736615c127143760bbd144f97986b37
|
||||
Signed-off-by: Nico Huber <nico.h@gmx.de>
|
||||
---
|
||||
src/soc/intel/skylake/chip_fsp20.c | 10 ++++++++++
|
||||
src/soc/intel/skylake/include/soc/iomap.h | 6 ++++++
|
||||
src/soc/intel/skylake/include/soc/systemagent.h | 11 +++++++++++
|
||||
src/soc/intel/skylake/romstage/systemagent.c | 8 ++++++++
|
||||
src/soc/intel/skylake/systemagent.c | 13 +++++++++++++
|
||||
5 files changed, 48 insertions(+)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
|
||||
index ccda3032c5..875542c9c6 100644
|
||||
--- a/src/soc/intel/skylake/chip_fsp20.c
|
||||
+++ b/src/soc/intel/skylake/chip_fsp20.c
|
||||
@@ -30,9 +30,11 @@
|
||||
#include <soc/acpi.h>
|
||||
#include <soc/intel/common/vbt.h>
|
||||
#include <soc/interrupt.h>
|
||||
+#include <soc/iomap.h>
|
||||
#include <soc/irq.h>
|
||||
#include <soc/pci_devs.h>
|
||||
#include <soc/ramstage.h>
|
||||
+#include <soc/systemagent.h>
|
||||
#include <string.h>
|
||||
|
||||
void soc_init_pre_device(void *chip_info)
|
||||
@@ -313,6 +315,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
|
||||
/* Set TccActivationOffset */
|
||||
tconfig->TccActivationOffset = config->tcc_offset;
|
||||
|
||||
+ /* Enable VT-d and X2APIC */
|
||||
+ if (soc_is_vtd_capable()) {
|
||||
+ params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
|
||||
+ params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS;
|
||||
+ params->X2ApicOptOut = 0;
|
||||
+ tconfig->VtdDisable = 0;
|
||||
+ }
|
||||
+
|
||||
soc_irq_settings(params);
|
||||
}
|
||||
|
||||
diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h
|
||||
index 0a573acb38..5f868061ec 100644
|
||||
--- a/src/soc/intel/skylake/include/soc/iomap.h
|
||||
+++ b/src/soc/intel/skylake/include/soc/iomap.h
|
||||
@@ -52,6 +52,12 @@
|
||||
#define GDXC_BASE_ADDRESS 0xfed84000
|
||||
#define GDXC_BASE_SIZE 0x1000
|
||||
|
||||
+#define GFXVT_BASE_ADDRESS 0xfed90000
|
||||
+#define GFXVT_BASE_SIZE 0x1000
|
||||
+
|
||||
+#define VTVC0_BASE_ADDRESS 0xfed91000
|
||||
+#define VTVC0_BASE_SIZE 0x1000
|
||||
+
|
||||
#define HPET_BASE_ADDRESS 0xfed00000
|
||||
|
||||
#define PCH_PWRM_BASE_ADDRESS 0xfe000000
|
||||
diff --git a/src/soc/intel/skylake/include/soc/systemagent.h b/src/soc/intel/skylake/include/soc/systemagent.h
|
||||
index d8192a3e75..8e53f54b75 100644
|
||||
--- a/src/soc/intel/skylake/include/soc/systemagent.h
|
||||
+++ b/src/soc/intel/skylake/include/soc/systemagent.h
|
||||
@@ -32,9 +32,13 @@
|
||||
#define D_LCK (1 << 4)
|
||||
#define G_SMRAME (1 << 3)
|
||||
#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
|
||||
+#define CAPID0_A 0xe4
|
||||
+#define VTD_DISABLE (1 << 23)
|
||||
|
||||
#define BIOS_RESET_CPL 0x5da8
|
||||
+#define GFXVTBAR 0x5400
|
||||
#define EDRAMBAR 0x5408
|
||||
+#define VTVC0BAR 0x5410
|
||||
#define GDXCBAR 0x5420
|
||||
|
||||
#define MCH_PKG_POWER_LIMIT_LO 0x59a0
|
||||
@@ -42,4 +46,11 @@
|
||||
#define MCH_DDR_POWER_LIMIT_LO 0x58e0
|
||||
#define MCH_DDR_POWER_LIMIT_HI 0x58e4
|
||||
|
||||
+bool soc_is_vtd_capable(void);
|
||||
+
|
||||
+static const struct sa_mmio_descriptor soc_vtd_resources[] = {
|
||||
+ { GFXVTBAR, GFXVT_BASE_ADDRESS, GFXVT_BASE_SIZE, "GFXVTBAR" },
|
||||
+ { VTVC0BAR, VTVC0_BASE_ADDRESS, VTVC0_BASE_SIZE, "VTVC0BAR" },
|
||||
+};
|
||||
+
|
||||
#endif
|
||||
diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c
|
||||
index 8f2fb337ed..66676c1fbf 100644
|
||||
--- a/src/soc/intel/skylake/romstage/systemagent.c
|
||||
+++ b/src/soc/intel/skylake/romstage/systemagent.c
|
||||
@@ -18,6 +18,7 @@
|
||||
#include <device/device.h>
|
||||
#include <intelblocks/systemagent.h>
|
||||
#include <soc/iomap.h>
|
||||
+#include <soc/pci_devs.h>
|
||||
#include <soc/romstage.h>
|
||||
#include <soc/systemagent.h>
|
||||
|
||||
@@ -34,12 +35,19 @@ void systemagent_early_init(void)
|
||||
{ EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" },
|
||||
};
|
||||
|
||||
+ const bool vtd_capable =
|
||||
+ !(pci_read_config32(SA_DEV_ROOT, CAPID0_A) & VTD_DISABLE);
|
||||
+
|
||||
/* Set Fixed MMIO addresss into PCI configuration space */
|
||||
sa_set_pci_bar(soc_fixed_pci_resources,
|
||||
ARRAY_SIZE(soc_fixed_pci_resources));
|
||||
/* Set Fixed MMIO addresss into MCH base address */
|
||||
sa_set_mch_bar(soc_fixed_mch_resources,
|
||||
ARRAY_SIZE(soc_fixed_mch_resources));
|
||||
+ if (vtd_capable)
|
||||
+ sa_set_mch_bar(soc_vtd_resources,
|
||||
+ ARRAY_SIZE(soc_vtd_resources));
|
||||
+
|
||||
/* Enable PAM regisers */
|
||||
enable_pam_region();
|
||||
}
|
||||
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
|
||||
index 8af995d133..796e7ae131 100644
|
||||
--- a/src/soc/intel/skylake/systemagent.c
|
||||
+++ b/src/soc/intel/skylake/systemagent.c
|
||||
@@ -15,6 +15,7 @@
|
||||
* GNU General Public License for more details.
|
||||
*/
|
||||
|
||||
+#include <arch/io.h>
|
||||
#include <cpu/x86/msr.h>
|
||||
#include <console/console.h>
|
||||
#include <delay.h>
|
||||
@@ -23,8 +24,16 @@
|
||||
#include <soc/cpu.h>
|
||||
#include <soc/iomap.h>
|
||||
#include <soc/msr.h>
|
||||
+#include <soc/pci_devs.h>
|
||||
#include <soc/systemagent.h>
|
||||
|
||||
+bool soc_is_vtd_capable(void)
|
||||
+{
|
||||
+ struct device *const root_dev = SA_DEV_ROOT;
|
||||
+ return root_dev &&
|
||||
+ !(pci_read_config32(root_dev, CAPID0_A) & VTD_DISABLE);
|
||||
+}
|
||||
+
|
||||
/*
|
||||
* SoC implementation
|
||||
*
|
||||
@@ -45,6 +54,10 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
|
||||
|
||||
sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
|
||||
ARRAY_SIZE(soc_fixed_resources));
|
||||
+
|
||||
+ if (soc_is_vtd_capable())
|
||||
+ sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources,
|
||||
+ ARRAY_SIZE(soc_vtd_resources));
|
||||
}
|
||||
|
||||
/*
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,154 +0,0 @@
|
||||
From 65b3bf5a7d211f7e1e37d73d0b59ed053dff85a8 Mon Sep 17 00:00:00 2001
|
||||
From: Nico Huber <nico.h@gmx.de>
|
||||
Date: Mon, 18 Sep 2017 20:03:46 +0200
|
||||
Subject: [PATCH 4/9] soc/intel/skylake: Generate ACPI DMAR table
|
||||
|
||||
If the SoC is VT-d capable, write an ACPI DMAR table. The entry for the
|
||||
GFXVTBAR is only generated if the IGD is enabled.
|
||||
|
||||
Change-Id: I8176401dd19aee7ad09a8a145b7a3801fe5b2ae1
|
||||
Signed-off-by: Nico Huber <nico.h@gmx.de>
|
||||
---
|
||||
src/soc/intel/skylake/acpi.c | 68 ++++++++++++++++++++++++++++++++
|
||||
src/soc/intel/skylake/chip_fsp20.c | 3 +-
|
||||
src/soc/intel/skylake/include/soc/acpi.h | 2 +
|
||||
src/soc/intel/skylake/include/soc/p2sb.h | 3 ++
|
||||
4 files changed, 75 insertions(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
|
||||
index 61360dafae..45061aba6f 100644
|
||||
--- a/src/soc/intel/skylake/acpi.c
|
||||
+++ b/src/soc/intel/skylake/acpi.c
|
||||
@@ -34,14 +34,17 @@
|
||||
#include <intelblocks/lpc_lib.h>
|
||||
#include <intelblocks/sgx.h>
|
||||
#include <intelblocks/uart.h>
|
||||
+#include <intelblocks/systemagent.h>
|
||||
#include <soc/intel/common/acpi.h>
|
||||
#include <soc/acpi.h>
|
||||
#include <soc/cpu.h>
|
||||
#include <soc/iomap.h>
|
||||
#include <soc/msr.h>
|
||||
+#include <soc/p2sb.h>
|
||||
#include <soc/pci_devs.h>
|
||||
#include <soc/pm.h>
|
||||
#include <soc/ramstage.h>
|
||||
+#include <soc/systemagent.h>
|
||||
#include <string.h>
|
||||
#include <types.h>
|
||||
#include <vendorcode/google/chromeos/gnvs.h>
|
||||
@@ -539,6 +542,71 @@ void generate_cpu_entries(device_t device)
|
||||
}
|
||||
}
|
||||
|
||||
+static unsigned long acpi_fill_dmar(unsigned long current)
|
||||
+{
|
||||
+ struct device *const igfx_dev = dev_find_slot(0, SA_DEVFN_IGD);
|
||||
+ const u32 gfx_vtbar = MCHBAR32(GFXVTBAR) & ~0xfff;
|
||||
+
|
||||
+ /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */
|
||||
+ if (igfx_dev && igfx_dev->enabled &&
|
||||
+ gfx_vtbar && !MCHBAR32(GFXVTBAR + 4)) {
|
||||
+ const unsigned long tmp = current;
|
||||
+
|
||||
+ current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
|
||||
+ current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
|
||||
+
|
||||
+ acpi_dmar_drhd_fixup(tmp, current);
|
||||
+ }
|
||||
+
|
||||
+ struct device *const p2sb_dev = dev_find_slot(0, PCH_DEVFN_P2SB);
|
||||
+ const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff;
|
||||
+
|
||||
+ /* General VTBAR has to be set and in 32-bit space. */
|
||||
+ if (p2sb_dev && vtvc0bar && !MCHBAR32(VTVC0BAR + 4)) {
|
||||
+ const unsigned long tmp = current;
|
||||
+
|
||||
+ /* P2SB may already be hidden. There's no clear rule, when. */
|
||||
+ const u8 p2sb_hidden =
|
||||
+ pci_read_config8(p2sb_dev, PCH_P2SB_E0 + 1);
|
||||
+ pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, 0);
|
||||
+
|
||||
+ const u16 ibdf = pci_read_config16(p2sb_dev, PCH_P2SB_IBDF);
|
||||
+ const u16 hbdf = pci_read_config16(p2sb_dev, PCH_P2SB_HBDF);
|
||||
+
|
||||
+ pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, p2sb_hidden);
|
||||
+
|
||||
+ current += acpi_create_dmar_drhd(current,
|
||||
+ DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
|
||||
+ current += acpi_create_dmar_drhd_ds_ioapic(current,
|
||||
+ 2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf));
|
||||
+ current += acpi_create_dmar_drhd_ds_msi_hpet(current,
|
||||
+ 0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf));
|
||||
+
|
||||
+ acpi_dmar_drhd_fixup(tmp, current);
|
||||
+ }
|
||||
+
|
||||
+ return current;
|
||||
+}
|
||||
+
|
||||
+unsigned long northbridge_write_acpi_tables(struct device *const dev,
|
||||
+ unsigned long current,
|
||||
+ struct acpi_rsdp *const rsdp)
|
||||
+{
|
||||
+ acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
|
||||
+
|
||||
+ /* Create DMAR table only if we have VT-d capability. */
|
||||
+ if (!soc_is_vtd_capable())
|
||||
+ return current;
|
||||
+
|
||||
+ printk(BIOS_DEBUG, "ACPI: * DMAR\n");
|
||||
+ acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar);
|
||||
+ current += dmar->header.length;
|
||||
+ current = acpi_align_current(current);
|
||||
+ acpi_add_table(rsdp, dmar);
|
||||
+
|
||||
+ return current;
|
||||
+}
|
||||
+
|
||||
unsigned long acpi_madt_irq_overrides(unsigned long current)
|
||||
{
|
||||
int sci = acpi_sci_irq();
|
||||
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
|
||||
index 875542c9c6..9fbc3da8dc 100644
|
||||
--- a/src/soc/intel/skylake/chip_fsp20.c
|
||||
+++ b/src/soc/intel/skylake/chip_fsp20.c
|
||||
@@ -59,7 +59,8 @@ static struct device_operations pci_domain_ops = {
|
||||
.scan_bus = &pci_domain_scan_bus,
|
||||
.ops_pci_bus = &pci_bus_default_ops,
|
||||
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
|
||||
- .acpi_name = &soc_acpi_name,
|
||||
+ .write_acpi_tables = &northbridge_write_acpi_tables,
|
||||
+ .acpi_name = &soc_acpi_name,
|
||||
#endif
|
||||
};
|
||||
|
||||
diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h
|
||||
index b0d2194612..6d492acd67 100644
|
||||
--- a/src/soc/intel/skylake/include/soc/acpi.h
|
||||
+++ b/src/soc/intel/skylake/include/soc/acpi.h
|
||||
@@ -32,5 +32,7 @@ void acpi_mainboard_gnvs(global_nvs_t *gnvs);
|
||||
void southbridge_inject_dsdt(device_t device);
|
||||
unsigned long southbridge_write_acpi_tables(device_t device,
|
||||
unsigned long current, struct acpi_rsdp *rsdp);
|
||||
+unsigned long northbridge_write_acpi_tables(struct device *,
|
||||
+ unsigned long current, struct acpi_rsdp *);
|
||||
|
||||
#endif /* _SOC_ACPI_H_ */
|
||||
diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h
|
||||
index d846dfc8f5..09e73fc254 100644
|
||||
--- a/src/soc/intel/skylake/include/soc/p2sb.h
|
||||
+++ b/src/soc/intel/skylake/include/soc/p2sb.h
|
||||
@@ -19,6 +19,9 @@
|
||||
#define HPTC_OFFSET 0x60
|
||||
#define HPTC_ADDR_ENABLE_BIT (1 << 7)
|
||||
|
||||
+#define PCH_P2SB_IBDF 0x6c
|
||||
+#define PCH_P2SB_HBDF 0x70
|
||||
+
|
||||
#define PCH_P2SB_EPMASK0 0xB0
|
||||
#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4))
|
||||
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,341 +0,0 @@
|
||||
From c142a773852b8bbfddc3791248b8365242df4f4c Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Fri, 9 Feb 2018 18:42:49 -0500
|
||||
Subject: [PATCH 5/9] purism/librem_skl: Enable TPM support
|
||||
|
||||
Change the GPIO to match the TPM-enabled motherboards, and add TPM
|
||||
support in devicetree and enable the config.
|
||||
After changing the GPIO table, the librem 13v2 and librem 15v3 now
|
||||
have the same GPIOs, so use a single gpio.h file instead of one
|
||||
file per variant.
|
||||
|
||||
Change-Id: I425654c1c972118aa81c27961246238c2eef782d
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/mainboard/purism/librem_skl/Kconfig | 1 +
|
||||
src/mainboard/purism/librem_skl/Makefile.inc | 1 -
|
||||
.../librem13v2/include/variant => }/gpio.h | 16 +-
|
||||
src/mainboard/purism/librem_skl/ramstage.c | 2 +-
|
||||
.../librem_skl/variants/librem13v2/devicetree.cb | 3 +
|
||||
.../librem_skl/variants/librem15v3/devicetree.cb | 3 +
|
||||
.../variants/librem15v3/include/variant/gpio.h | 201 ---------------------
|
||||
7 files changed, 16 insertions(+), 211 deletions(-)
|
||||
rename src/mainboard/purism/librem_skl/{variants/librem13v2/include/variant => }/gpio.h (94%)
|
||||
delete mode 100644 src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h
|
||||
|
||||
diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig
|
||||
index f68fd239f9..be4b7a37c7 100644
|
||||
--- a/src/mainboard/purism/librem_skl/Kconfig
|
||||
+++ b/src/mainboard/purism/librem_skl/Kconfig
|
||||
@@ -9,6 +9,7 @@ config BOARD_PURISM_BASEBOARD_LIBREM_SKL
|
||||
select SERIRQ_CONTINUOUS_MODE
|
||||
select MAINBOARD_USES_FSP2_0
|
||||
select SPD_READ_BY_WORD
|
||||
+ select MAINBOARD_HAS_LPC_TPM
|
||||
|
||||
if BOARD_PURISM_BASEBOARD_LIBREM_SKL
|
||||
|
||||
diff --git a/src/mainboard/purism/librem_skl/Makefile.inc b/src/mainboard/purism/librem_skl/Makefile.inc
|
||||
index 18c9ad6520..eb01360863 100644
|
||||
--- a/src/mainboard/purism/librem_skl/Makefile.inc
|
||||
+++ b/src/mainboard/purism/librem_skl/Makefile.inc
|
||||
@@ -19,4 +19,3 @@ ramstage-y += pei_data.c
|
||||
ramstage-y += ramstage.c
|
||||
ramstage-y += hda_verb.c
|
||||
|
||||
-CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/include/variant/gpio.h b/src/mainboard/purism/librem_skl/gpio.h
|
||||
similarity index 94%
|
||||
rename from src/mainboard/purism/librem_skl/variants/librem13v2/include/variant/gpio.h
|
||||
rename to src/mainboard/purism/librem_skl/gpio.h
|
||||
index 148e40b279..e3328a3336 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/include/variant/gpio.h
|
||||
+++ b/src/mainboard/purism/librem_skl/gpio.h
|
||||
@@ -41,9 +41,9 @@ static const struct pad_config gpio_table[] = {
|
||||
/* SUSACK# */ PAD_CFG_NF(GPP_A15, DN_20K, DEEP, NF1),
|
||||
/* SD_1P8_SEL */ PAD_CFG_NC(GPP_A16),
|
||||
/* SD_PWR_EN# */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1),
|
||||
-/* ISH_GP0 */ PAD_CFG_NC(GPP_A18),
|
||||
-/* ISH_GP1 */ PAD_CFG_NC(GPP_A19),
|
||||
-/* ISH_GP2 */ PAD_CFG_NC(GPP_A20),
|
||||
+/* ISH_GP0 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A18, NONE, DEEP),
|
||||
+/* ISH_GP1 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A19, NONE, DEEP),
|
||||
+/* ISH_GP2 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A20, NONE, DEEP),
|
||||
/* ISH_GP3 */ PAD_CFG_NC(GPP_A21),
|
||||
/* ISH_GP4 */ PAD_CFG_NC(GPP_A22),
|
||||
/* ISH_GP5 */ PAD_CFG_NC(GPP_A23),
|
||||
@@ -108,18 +108,18 @@ static const struct pad_config gpio_table[] = {
|
||||
/* ISH_I2C0_SCL */ PAD_CFG_NC(GPP_D6),
|
||||
/* ISH_I2C1_SDA */ PAD_CFG_NC(GPP_D7),
|
||||
/* ISH_I2C1_SCL */ PAD_CFG_NC(GPP_D8),
|
||||
-/* ISH_SPI_CS# */ PAD_CFG_NC(GPP_D9),
|
||||
-/* ISH_SPI_CLK */ PAD_CFG_NC(GPP_D10),
|
||||
-/* ISH_SPI_MISO */ PAD_CFG_NC(GPP_D11),
|
||||
+/* ISH_SPI_CS# */ PAD_CFG_TERM_GPO(GPP_D9, 0, NONE, DEEP),
|
||||
+/* ISH_SPI_CLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D10, NONE, DEEP),
|
||||
+/* ISH_SPI_MISO */ PAD_CFG_TERM_GPO(GPP_D11, 1, NONE, DEEP),
|
||||
/* ISH_SPI_MOSI */ PAD_CFG_NC(GPP_D12),
|
||||
/* ISH_UART0_RXD */ PAD_CFG_NC(GPP_D13),
|
||||
/* ISH_UART0_TXD */ PAD_CFG_NC(GPP_D14),
|
||||
/* ISH_UART0_RTS# */ PAD_CFG_NC(GPP_D15),
|
||||
/* ISH_UART0_CTS# */ PAD_CFG_NC(GPP_D16),
|
||||
/* DMIC_CLK1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
-/* DMIC_DATA1 */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
+/* DMIC_DATA1 */ PAD_CFG_NF(GPP_D18, DN_20K, DEEP, NF1),
|
||||
/* DMIC_CLK0 */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
-/* DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
+/* DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, DN_20K, DEEP, NF1),
|
||||
/* SPI1_IO2 */ PAD_CFG_NC(GPP_D21),
|
||||
/* SPI1_IO3 */ PAD_CFG_NC(GPP_D22),
|
||||
/* I2S_MCLK */ PAD_CFG_NC(GPP_D23),
|
||||
diff --git a/src/mainboard/purism/librem_skl/ramstage.c b/src/mainboard/purism/librem_skl/ramstage.c
|
||||
index 15912cf862..94f8071340 100644
|
||||
--- a/src/mainboard/purism/librem_skl/ramstage.c
|
||||
+++ b/src/mainboard/purism/librem_skl/ramstage.c
|
||||
@@ -15,7 +15,7 @@
|
||||
*/
|
||||
|
||||
#include <soc/ramstage.h>
|
||||
-#include <variant/gpio.h>
|
||||
+#include "gpio.h"
|
||||
|
||||
void mainboard_silicon_init_params(FSP_SIL_UPD *params)
|
||||
{
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
index 1fc19a5675..e2e2ac03da 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
@@ -195,6 +195,9 @@ chip soc/intel/skylake
|
||||
chip ec/purism/librem
|
||||
device pnp 0c09.0 on end
|
||||
end
|
||||
+ chip drivers/pc80/tpm
|
||||
+ device pnp 0c31.0 on end
|
||||
+ end
|
||||
end # LPC Interface
|
||||
device pci 1f.1 on end # P2SB
|
||||
device pci 1f.2 on end # Power Management Controller
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
index 647f054f74..6cf183a61f 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
@@ -202,6 +202,9 @@ chip soc/intel/skylake
|
||||
chip ec/purism/librem
|
||||
device pnp 0c09.0 on end
|
||||
end
|
||||
+ chip drivers/pc80/tpm
|
||||
+ device pnp 0c31.0 on end
|
||||
+ end
|
||||
end # LPC Interface
|
||||
device pci 1f.1 on end # P2SB
|
||||
device pci 1f.2 on end # Power Management Controller
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h b/src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h
|
||||
deleted file mode 100644
|
||||
index 9c22f00f42..0000000000
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h
|
||||
+++ /dev/null
|
||||
@@ -1,201 +0,0 @@
|
||||
-/*
|
||||
- * This file is part of the coreboot project.
|
||||
- *
|
||||
- * Copyright (C) 2015 Google Inc.
|
||||
- *
|
||||
- * This program is free software; you can redistribute it and/or modify
|
||||
- * it under the terms of the GNU General Public License as published by
|
||||
- * the Free Software Foundation; version 2 of the License.
|
||||
- *
|
||||
- * This program is distributed in the hope that it will be useful,
|
||||
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
|
||||
- * GNU General Public License for more details.
|
||||
- */
|
||||
-
|
||||
-#ifndef MAINBOARD_GPIO_H
|
||||
-#define MAINBOARD_GPIO_H
|
||||
-
|
||||
-#include <soc/gpe.h>
|
||||
-#include <soc/gpio.h>
|
||||
-
|
||||
-#ifndef __ACPI__
|
||||
-
|
||||
-/* Pad configuration in ramstage. */
|
||||
-static const struct pad_config gpio_table[] = {
|
||||
-/* RCIN# */ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
|
||||
-/* LAD0 */ PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
|
||||
-/* LAD1 */ PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
|
||||
-/* LAD2 */ PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
|
||||
-/* LAD3 */ PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
|
||||
-/* LFRAME# */ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
|
||||
-/* SERIRQ */ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
|
||||
-/* PIRQA# */ PAD_CFG_NC(GPP_A7),
|
||||
-/* CLKRUN# */ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
|
||||
-/* CLKOUT_LPC0 */ PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
|
||||
-/* CLKOUT_LPC1 */ PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
|
||||
-/* PME# */ PAD_CFG_NC(GPP_A11),
|
||||
-/* BM_BUSY# */ PAD_CFG_NC(GPP_A12),
|
||||
-/* SUSWARN# */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
|
||||
-/* SUS_STAT# */ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
|
||||
-/* SUSACK# */ PAD_CFG_NF(GPP_A15, DN_20K, DEEP, NF1),
|
||||
-/* SD_1P8_SEL */ PAD_CFG_NC(GPP_A16),
|
||||
-/* SD_PWR_EN# */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1),
|
||||
-/* ISH_GP0 */ PAD_CFG_GPI(GPP_A18, NONE, DEEP),
|
||||
-/* ISH_GP1 */ PAD_CFG_GPI(GPP_A19, NONE, DEEP),
|
||||
-/* ISH_GP2 */ PAD_CFG_GPI(GPP_A20, NONE, DEEP),
|
||||
-/* ISH_GP3 */ PAD_CFG_NC(GPP_A21),
|
||||
-/* ISH_GP4 */ PAD_CFG_NC(GPP_A22),
|
||||
-/* ISH_GP5 */ PAD_CFG_NC(GPP_A23),
|
||||
-
|
||||
-/* CORE_VID0 */ PAD_CFG_NC(GPP_B0),
|
||||
-/* CORE_VID1 */ PAD_CFG_NC(GPP_B1),
|
||||
-/* VRALERT# */ PAD_CFG_NC(GPP_B2),
|
||||
-/* CPU_GP2 */ PAD_CFG_NC(GPP_B3),
|
||||
-/* CPU_GP3 */ PAD_CFG_NC(GPP_B4),
|
||||
-/* SRCCLKREQ0# */ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
|
||||
-/* SRCCLKREQ1# */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
|
||||
-/* SRCCLKREQ2# */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
|
||||
-/* SRCCLKREQ3# */ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
|
||||
-/* SRCCLKREQ4# */ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
|
||||
-/* SRCCLKREQ5# */ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
|
||||
-/* EXT_PWR_GATE# */ PAD_CFG_NC(GPP_B11),
|
||||
-/* SLP_S0# */ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
|
||||
-/* PLTRST# */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
|
||||
-/* SPKR */ PAD_CFG_TERM_GPO(GPP_B14, 1, DN_20K, DEEP),
|
||||
-/* GSPI0_CS# */ PAD_CFG_NC(GPP_B15),
|
||||
-/* GSPI0_CLK */ PAD_CFG_NC(GPP_B16),
|
||||
-/* GSPI0_MISO */ PAD_CFG_NC(GPP_B17),
|
||||
-/* GSPI0_MOSI */ PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
|
||||
-/* GSPI1_CS# */ PAD_CFG_NC(GPP_B19),
|
||||
-/* GSPI1_CLK */ PAD_CFG_NC(GPP_B20),
|
||||
-/* GSPI1_MISO */ PAD_CFG_NC(GPP_B21),
|
||||
-/* GSPI1_MOSI */ PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1),
|
||||
-/* SM1ALERT# */ PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
|
||||
-
|
||||
-/* SMBCLK */ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
|
||||
-/* SMBDATA */ PAD_CFG_NF(GPP_C1, DN_20K, DEEP, NF1),
|
||||
-/* SMBALERT# */ PAD_CFG_TERM_GPO(GPP_C2, 1, DN_20K, DEEP),
|
||||
-/* SML0CLK */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
|
||||
-/* SML0DATA */ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
|
||||
-/* SML0ALERT# */ PAD_CFG_GPI_APIC_INVERT(GPP_C5, DN_20K, DEEP),
|
||||
-/* SML1CLK */ PAD_CFG_NC(GPP_C6), /* RESERVED */
|
||||
-/* SML1DATA */ PAD_CFG_NC(GPP_C7), /* RESERVED */
|
||||
-/* UART0_RXD */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
|
||||
-/* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
|
||||
-/* UART0_RTS# */ PAD_CFG_NF(GPP_C10, NONE, DEEP, NF1),
|
||||
-/* UART0_CTS# */ PAD_CFG_NF(GPP_C11, NONE, DEEP, NF1),
|
||||
-/* UART1_RXD */ PAD_CFG_NC(GPP_C12),
|
||||
-/* UART1_TXD */ PAD_CFG_NC(GPP_C13),
|
||||
-/* UART1_RTS# */ PAD_CFG_NC(GPP_C14),
|
||||
-/* UART1_CTS# */ PAD_CFG_NC(GPP_C15),
|
||||
-/* I2C0_SDA */ PAD_CFG_GPI(GPP_C16, NONE, DEEP),
|
||||
-/* I2C0_SCL */ PAD_CFG_GPI(GPP_C17, NONE, DEEP),
|
||||
-/* I2C1_SDA */ PAD_CFG_GPI(GPP_C18, NONE, DEEP),
|
||||
-/* I2C1_SCL */ PAD_CFG_NC(GPP_C19),
|
||||
-/* UART2_RXD */ PAD_CFG_NC(GPP_C20),
|
||||
-/* UART2_TXD */ PAD_CFG_NC(GPP_C21),
|
||||
-/* UART2_RTS# */ PAD_CFG_NC(GPP_C22),
|
||||
-/* UART2_CTS# */ PAD_CFG_NC(GPP_C23),
|
||||
-
|
||||
-/* SPI1_CS# */ PAD_CFG_NC(GPP_D0),
|
||||
-/* SPI1_CLK */ PAD_CFG_NC(GPP_D1),
|
||||
-/* SPI1_MISO */ PAD_CFG_NC(GPP_D2),
|
||||
-/* SPI1_MOSI */ PAD_CFG_NC(GPP_D3),
|
||||
-/* FASHTRIG */ PAD_CFG_NC(GPP_D4),
|
||||
-/* ISH_I2C0_SDA */ PAD_CFG_NC(GPP_D5),
|
||||
-/* ISH_I2C0_SCL */ PAD_CFG_NC(GPP_D6),
|
||||
-/* ISH_I2C1_SDA */ PAD_CFG_NC(GPP_D7),
|
||||
-/* ISH_I2C1_SCL */ PAD_CFG_NC(GPP_D8),
|
||||
-/* ISH_SPI_CS# */ PAD_CFG_TERM_GPO(GPP_D9, 0, NONE, DEEP),
|
||||
-/* ISH_SPI_CLK */ PAD_CFG_GPI(GPP_D10, NONE, DEEP),
|
||||
-/* ISH_SPI_MISO */ PAD_CFG_TERM_GPO(GPP_D11, 1, NONE, DEEP),
|
||||
-/* ISH_SPI_MOSI */ PAD_CFG_NC(GPP_D12),
|
||||
-/* ISH_UART0_RXD */ PAD_CFG_NC(GPP_D13),
|
||||
-/* ISH_UART0_TXD */ PAD_CFG_NC(GPP_D14),
|
||||
-/* ISH_UART0_RTS# */ PAD_CFG_NC(GPP_D15),
|
||||
-/* ISH_UART0_CTS# */ PAD_CFG_NC(GPP_D16),
|
||||
-/* DMIC_CLK1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
|
||||
-/* DMIC_DATA1 */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
|
||||
-/* DMIC_CLK0 */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
|
||||
-/* DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
|
||||
-/* SPI1_IO2 */ PAD_CFG_NC(GPP_D21),
|
||||
-/* SPI1_IO3 */ PAD_CFG_NC(GPP_D22),
|
||||
-/* I2S_MCLK */ PAD_CFG_NC(GPP_D23),
|
||||
-
|
||||
-/* SATAXPCI0 */ PAD_CFG_NC(GPP_E0),
|
||||
-/* SATAXPCIE1 */ PAD_CFG_NC(GPP_E1),
|
||||
-/* SATAXPCIE2 */ PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
|
||||
-/* CPU_GP0 */ PAD_CFG_NC(GPP_E3),
|
||||
-/* SATA_DEVSLP0 */ PAD_CFG_NC(GPP_E4),
|
||||
-/* SATA_DEVSLP1 */ PAD_CFG_NC(GPP_E5),
|
||||
-/* SATA_DEVSLP2 */ PAD_CFG_NC(GPP_E6),
|
||||
-/* CPU_GP1 */ PAD_CFG_NC(GPP_E7),
|
||||
-/* SATALED# */ PAD_CFG_NC(GPP_E8),
|
||||
-/* USB2_OCO# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
|
||||
-/* USB2_OC1# */ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
|
||||
-/* USB2_OC2# */ PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
|
||||
-/* USB2_OC3# */ PAD_CFG_NC(GPP_E12),
|
||||
-/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
|
||||
-/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
|
||||
-/* DDPD_HPD2 */ PAD_CFG_NC(GPP_E15),
|
||||
-/* DDPE_HPD3 */ PAD_CFG_GPI_ACPI_SCI(GPP_E16, NONE, PLTRST, NONE),
|
||||
-/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
|
||||
-/* DDPB_CTRLCLK */ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
|
||||
-/* DDPB_CTRLDATA */ PAD_CFG_NF(GPP_E19, DN_20K, DEEP, NF1),
|
||||
-/* DDPC_CTRLCLK */ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
|
||||
-/* DDPC_CTRLDATA */ PAD_CFG_NF(GPP_E21, DN_20K, DEEP, NF1),
|
||||
-/* DDPD_CTRLCLK */ PAD_CFG_GPI_APIC(GPP_E22, NONE, DEEP),
|
||||
-/* DDPD_CTRLDATA */ PAD_CFG_TERM_GPO(GPP_E23, 1, DN_20K, DEEP),
|
||||
-
|
||||
-/* I2S2_SCLK */ PAD_CFG_NC(GPP_F0),
|
||||
-/* I2S2_SFRM */ PAD_CFG_NC(GPP_F1),
|
||||
-/* I2S2_TXD */ PAD_CFG_NC(GPP_F2),
|
||||
-/* I2S2_RXD */ PAD_CFG_NC(GPP_F3),
|
||||
-/* I2C2_SDA */ PAD_CFG_NC(GPP_F4),
|
||||
-/* I2C2_SCL */ PAD_CFG_NC(GPP_F5),
|
||||
-/* I2C3_SDA */ PAD_CFG_NC(GPP_F6),
|
||||
-/* I2C3_SCL */ PAD_CFG_NC(GPP_F7),
|
||||
-/* I2C4_SDA */ PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1),
|
||||
-/* I2C4_SCL */ PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1),
|
||||
-/* I2C5_SDA */ PAD_CFG_NC(GPP_F10),
|
||||
-/* I2C5_SCL */ PAD_CFG_NC(GPP_F11),
|
||||
-/* EMMC_CMD */ PAD_CFG_NC(GPP_F12),
|
||||
-/* EMMC_DATA0 */ PAD_CFG_NC(GPP_F13),
|
||||
-/* EMMC_DATA1 */ PAD_CFG_NC(GPP_F14),
|
||||
-/* EMMC_DATA2 */ PAD_CFG_NC(GPP_F15),
|
||||
-/* EMMC_DATA3 */ PAD_CFG_NC(GPP_F16),
|
||||
-/* EMMC_DATA4 */ PAD_CFG_NC(GPP_F17),
|
||||
-/* EMMC_DATA5 */ PAD_CFG_NC(GPP_F18),
|
||||
-/* EMMC_DATA6 */ PAD_CFG_NC(GPP_F19),
|
||||
-/* EMMC_DATA7 */ PAD_CFG_NC(GPP_F20),
|
||||
-/* EMMC_RCLK */ PAD_CFG_NC(GPP_F21),
|
||||
-/* EMMC_CLK */ PAD_CFG_NC(GPP_F22),
|
||||
-/* RSVD */ PAD_CFG_NC(GPP_F23),
|
||||
-
|
||||
-/* SD_CMD */ PAD_CFG_NF(GPP_G0, NONE, DEEP, NF1),
|
||||
-/* SD_DATA0 */ PAD_CFG_NF(GPP_G1, NONE, DEEP, NF1),
|
||||
-/* SD_DATA1 */ PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1),
|
||||
-/* SD_DATA2 */ PAD_CFG_NF(GPP_G3, NONE, DEEP, NF1),
|
||||
-/* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
|
||||
-/* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
|
||||
-/* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
|
||||
-/* SD_WP */ PAD_CFG_NF(GPP_G7, UP_20K, DEEP, NF1),
|
||||
-
|
||||
-/* BATLOW# */ PAD_CFG_NC(GPD0),
|
||||
-/* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, PWROK, NF1),
|
||||
-/* LAN_WAKE# */ PAD_CFG_NC(GPD2),
|
||||
-/* PWRBTN# */ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
|
||||
-/* SLP_S3# */ PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
|
||||
-/* SLP_S4# */ PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
|
||||
-/* SLP_A# */ PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
|
||||
-/* RSVD */ PAD_CFG_NC(GPD7),
|
||||
-/* SUSCLK */ PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
|
||||
-/* SLP_WLAN# */ PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
|
||||
-/* SLP_S5# */ PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
|
||||
-/* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
|
||||
-};
|
||||
-
|
||||
-#endif
|
||||
-
|
||||
-#endif
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,40 +0,0 @@
|
||||
From e6998f87d8d4c389d86586ea66f0ff20cd7751d2 Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Fri, 9 Feb 2018 18:44:45 -0500
|
||||
Subject: [PATCH 6/9] purism/librem_skl: Explicitely enable VMX and Intel
|
||||
SpeedStep
|
||||
|
||||
The VMX feature was enabled by default by the FSP but a different
|
||||
FSP might have it disabled, so this ensures that VMX is explicitely
|
||||
enabled for the Librem machines. This option however doesn't seem
|
||||
to work in the FSP since VMX doesn't actually get enabled but as
|
||||
long as the features MSR remains unlocked, it's not critical.
|
||||
|
||||
Enabling Intel SpeedStep Technology ensures the ACPI tables contain
|
||||
the C-states/P-states which are required for the xen-acpi-processor
|
||||
module to be loaded. Without it, the Qubes 4.0-rc4 installer will
|
||||
complain at boot about modules that could not be loaded.
|
||||
|
||||
Change-Id: I968ef36ec9382a10db13d96fd3a5c0fc904db387
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 3 +++
|
||||
1 file changed, 3 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
index e2e2ac03da..9ce1d91549 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
@@ -7,6 +7,9 @@ chip soc/intel/skylake
|
||||
register "deep_s5_enable_dc" = "0"
|
||||
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
|
||||
|
||||
+ register "eist_enable" = "1"
|
||||
+ register "VmxEnable" = "1"
|
||||
+
|
||||
# GPE configuration
|
||||
# Note that GPE events called out in ASL code rely on this
|
||||
# route. i.e. If this route changes then the affected GPE
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,60 +0,0 @@
|
||||
From 8c6528caa1a2abcd30bbb0c4fdb4663dc70cb7d4 Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Thu, 22 Feb 2018 20:56:04 -0500
|
||||
Subject: [PATCH 9/9] Add heads TPM measurements to Skylake/Kabylake
|
||||
|
||||
---
|
||||
src/drivers/intel/fsp2_0/memory_init.c | 20 +++++++++++++++++---
|
||||
1 file changed, 17 insertions(+), 3 deletions(-)
|
||||
|
||||
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
|
||||
index 575f277466..4160b997a4 100644
|
||||
--- a/src/drivers/intel/fsp2_0/memory_init.c
|
||||
+++ b/src/drivers/intel/fsp2_0/memory_init.c
|
||||
@@ -33,6 +33,7 @@
|
||||
#include <symbols.h>
|
||||
#include <timestamp.h>
|
||||
#include <tpm_lite/tlcl.h>
|
||||
+#include <program_loading.h>
|
||||
#include <security/vboot/vboot_common.h>
|
||||
#include <vb2_api.h>
|
||||
|
||||
@@ -150,12 +151,14 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
|
||||
|
||||
/*
|
||||
* Initialize the TPM, unless the TPM was already initialized
|
||||
- * in verstage and used to verify romstage.
|
||||
+ * in verstage and used to verify romstage, or for measured boot.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_LPC_TPM) &&
|
||||
- (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
|
||||
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)))
|
||||
+ (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
|
||||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) &&
|
||||
+ !IS_ENABLED(CONFIG_MEASURED_BOOT))
|
||||
init_tpm(s3wake);
|
||||
+ printk(BIOS_DEBUG, "%s: romstage complete\n", __FILE__);
|
||||
}
|
||||
|
||||
static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size)
|
||||
@@ -484,6 +487,17 @@ void fsp_memory_init(bool s3wake)
|
||||
if (status != CB_SUCCESS)
|
||||
die("Loading FSPM failed!\n");
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
|
||||
+ // we don't know if we are coming out of a resume
|
||||
+ // at this point, but want to setup the tpm ASAP
|
||||
+ init_tpm(0);
|
||||
+ tlcl_lib_init();
|
||||
+ const void * const bootblock = (const void*) 0xFFFFF800;
|
||||
+ const unsigned bootblock_size = 0x800;
|
||||
+ tlcl_measure(0, bootblock, bootblock_size);
|
||||
+
|
||||
+ tlcl_measure(1, _romstage, _eromstage - _romstage);
|
||||
+ }
|
||||
/* Signal that FSP component has been loaded. */
|
||||
prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);
|
||||
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,37 +0,0 @@
|
||||
From 73c4fda90fdc4bd0bc6b383995d15b2c803cc274 Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Fri, 2 Mar 2018 14:22:14 -0500
|
||||
Subject: [PATCH 13/15] intel/cpu: Fix SpeedStep enabling
|
||||
|
||||
The IA32_MISC_ENABLE MSR was being overwritten by its old value
|
||||
right after enabling SpeedStep (eist) which caused it to revert
|
||||
the call to cpu_enable_eist().
|
||||
|
||||
Fixes bug introduced in 6b45ee44.
|
||||
|
||||
Change-Id: Id2ac660bf8ea56d45e8c3f631a586b74106a6cc9
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/soc/intel/skylake/cpu.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
|
||||
index 291a40da3e..d09a05667e 100644
|
||||
--- a/src/soc/intel/skylake/cpu.c
|
||||
+++ b/src/soc/intel/skylake/cpu.c
|
||||
@@ -260,11 +260,11 @@ static void configure_misc(void)
|
||||
msr = rdmsr(IA32_MISC_ENABLE);
|
||||
msr.lo |= (1 << 0); /* Fast String enable */
|
||||
msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */
|
||||
+ wrmsr(IA32_MISC_ENABLE, msr);
|
||||
if (conf->eist_enable)
|
||||
cpu_enable_eist();
|
||||
else
|
||||
cpu_disable_eist();
|
||||
- wrmsr(IA32_MISC_ENABLE, msr);
|
||||
|
||||
/* Disable Thermal interrupts */
|
||||
msr.lo = 0;
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,52 +0,0 @@
|
||||
From f93f9ac4d9da20749197abc5f272839da5519e1d Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Fri, 2 Mar 2018 16:12:04 -0500
|
||||
Subject: [PATCH 14/15] purism/librem_skl: Set TCC Activation at 95C
|
||||
|
||||
Set the Thermal Control Circuit (TCC) activaction value to 95C
|
||||
even though FSP integration guide says to set it to 100C for SKL-U
|
||||
(offset at 0), because when the TCC activates at 100C, the CPU
|
||||
will have already shut itself down from overheating protection.
|
||||
|
||||
This was tested on Purism Librem 13 v2. A bisect showed that the
|
||||
immediate shutdowns happened after commit [1] was merged which led
|
||||
to this solution.
|
||||
|
||||
There is still a temperature ramping problem where a 'stress -c 4'
|
||||
command will bring the temperature up from 50 to 100C (95C after
|
||||
this patch) within a few milliseconds, instead of it taking many
|
||||
dozens of seconds to reach ~80C. A bisect shows this regression
|
||||
was introduced in commit [2] and still needs to be investigated.
|
||||
This change may not be necessary anymore once the temperature
|
||||
ramping problem is fixed, but it is still wise to keep it for
|
||||
preventing shutdowns in corner cases.
|
||||
|
||||
[1] ec5a947b (soc/intel/skylake: make tcc_offset take effect)
|
||||
[2] fb1cd095 (purism/librem13v2: migrate from FSP 1.1 to 2.0)
|
||||
|
||||
Change-Id: Idfc001c8e46ed3b07b24150c961c4b9bc9b71a62
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 6 ++++++
|
||||
1 file changed, 6 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
index 9ce1d91549..159d921046 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
@@ -10,6 +10,12 @@ chip soc/intel/skylake
|
||||
register "eist_enable" = "1"
|
||||
register "VmxEnable" = "1"
|
||||
|
||||
+ # Set the Thermal Control Circuit (TCC) activaction value to 95C
|
||||
+ # even though FSP integration guide says to set it to 100C for SKL-U
|
||||
+ # (offset at 0), because when the TCC activates at 100C, the CPU
|
||||
+ # will have already shut itself down from overheating protection.
|
||||
+ register "tcc_offset" = "5" # TCC of 95C
|
||||
+
|
||||
# GPE configuration
|
||||
# Note that GPE events called out in ASL code rely on this
|
||||
# route. i.e. If this route changes then the affected GPE
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,39 +0,0 @@
|
||||
From bdaef1d8aa7cdfb27122665f951932e6e53d6a3d Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Fri, 2 Mar 2018 17:03:11 -0500
|
||||
Subject: [PATCH 15/15] purism/librem_skl: Fix Librem 15 v3 devicetree
|
||||
configuration
|
||||
|
||||
Recent changes to devicetree for librem_skl were only applied
|
||||
to the librem13v2 variant (Enable SpeedStep, VMX, TCC at 95C),
|
||||
this fixes it by applying the same fixes for the Librem 15 v3.
|
||||
|
||||
Change-Id: I1d5c3ba844c942bd94311f4639612228ff8e07f8
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
.../purism/librem_skl/variants/librem15v3/devicetree.cb | 9 +++++++++
|
||||
1 file changed, 9 insertions(+)
|
||||
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
index 6cf183a61f..035db18eff 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
@@ -7,6 +7,15 @@ chip soc/intel/skylake
|
||||
register "deep_s5_enable_dc" = "0"
|
||||
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
|
||||
|
||||
+ register "eist_enable" = "1"
|
||||
+ register "VmxEnable" = "1"
|
||||
+
|
||||
+ # Set the Thermal Control Circuit (TCC) activaction value to 95C
|
||||
+ # even though FSP integration guide says to set it to 100C for SKL-U
|
||||
+ # (offset at 0), because when the TCC activates at 100C, the CPU
|
||||
+ # will have already shut itself down from overheating protection.
|
||||
+ register "tcc_offset" = "5" # TCC of 95C
|
||||
+
|
||||
# GPE configuration
|
||||
# Note that GPE events called out in ASL code rely on this
|
||||
# route. i.e. If this route changes then the affected GPE
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,74 +0,0 @@
|
||||
From c6dd40b67a21bda1d8ec6043f19e4606a3695a05 Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Tue, 13 Mar 2018 16:53:30 -0400
|
||||
Subject: [PATCH 1/3] purism/librem13v1, librem13v2, liberm15v3: Fix EC LPC I/O
|
||||
port
|
||||
|
||||
The LPC I/O ports for communicating with the EC were not set
|
||||
properly causing ectool to fail to read the Index I/O from the EC.
|
||||
|
||||
The EC Index I/O is on port 0x380 and the LPC I/O port needs to be
|
||||
decoded by the PCI device for it to be accessible.
|
||||
|
||||
This fixes it for the Librem 13v1, 13v2 and 15v3.
|
||||
|
||||
Change-Id: Ide1d158340eadfabbce5f70ceccddfabb4db188a
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/mainboard/purism/librem13v1/devicetree.cb | 4 ++++
|
||||
src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 6 +++---
|
||||
src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 6 +++---
|
||||
3 files changed, 10 insertions(+), 6 deletions(-)
|
||||
|
||||
diff --git a/src/mainboard/purism/librem13v1/devicetree.cb b/src/mainboard/purism/librem13v1/devicetree.cb
|
||||
index ba38070a55..c916e9a9a4 100644
|
||||
--- a/src/mainboard/purism/librem13v1/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem13v1/devicetree.cb
|
||||
@@ -18,6 +18,10 @@ chip soc/intel/broadwell
|
||||
register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms
|
||||
register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
|
||||
|
||||
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
|
||||
+ register "gen1_dec" = "0x00000381"
|
||||
+ register "gen2_dec" = "0x000c0081"
|
||||
+
|
||||
# Port 0 is HDD
|
||||
# Port 3 is M.2 NGFF
|
||||
register "sata_port_map" = "0x9"
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
index 159d921046..da97fb9ea7 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
@@ -24,9 +24,9 @@ chip soc/intel/skylake
|
||||
register "gpe0_dw1" = "GPP_D"
|
||||
register "gpe0_dw2" = "GPP_E"
|
||||
|
||||
- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
|
||||
- register "gen1_dec" = "0x00fc0801"
|
||||
- register "gen2_dec" = "0x000c0201"
|
||||
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
|
||||
+ register "gen1_dec" = "0x00000381"
|
||||
+ register "gen2_dec" = "0x000c0081"
|
||||
|
||||
# Enable "Intel Speed Shift Technology"
|
||||
register "speed_shift_enable" = "1"
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
index 035db18eff..deaf3a6deb 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
@@ -24,9 +24,9 @@ chip soc/intel/skylake
|
||||
register "gpe0_dw1" = "GPP_D"
|
||||
register "gpe0_dw2" = "GPP_E"
|
||||
|
||||
- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
|
||||
- register "gen1_dec" = "0x00fc0801"
|
||||
- register "gen2_dec" = "0x000c0201"
|
||||
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
|
||||
+ register "gen1_dec" = "0x00000381"
|
||||
+ register "gen2_dec" = "0x000c0081"
|
||||
|
||||
# Enable "Intel Speed Shift Technology"
|
||||
register "speed_shift_enable" = "1"
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,63 +0,0 @@
|
||||
From 7cb5f11eac45c17bfdd096eb10db3115fc782b5b Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Tue, 13 Mar 2018 16:58:52 -0400
|
||||
Subject: [PATCH 2/3] ec/purism: Fix the CPU's PPCM value for Turbo when set by
|
||||
the EC
|
||||
|
||||
The EC needs to set the PPCM value to 0, 1 or 2 depending on whether
|
||||
the Turbo is enabled or not and the value differs from Broadwell and
|
||||
Skylake machines.
|
||||
|
||||
Change-Id: I662dce54415e685c054ffc00b6afde0f1f7765e2
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
src/ec/purism/librem/acpi/ec.asl | 4 ++--
|
||||
src/mainboard/purism/librem13v1/acpi/ec.asl | 2 ++
|
||||
src/mainboard/purism/librem_skl/acpi/ec.asl | 2 ++
|
||||
3 files changed, 6 insertions(+), 2 deletions(-)
|
||||
|
||||
diff --git a/src/ec/purism/librem/acpi/ec.asl b/src/ec/purism/librem/acpi/ec.asl
|
||||
index e95f126c63..ff325aa9a3 100644
|
||||
--- a/src/ec/purism/librem/acpi/ec.asl
|
||||
+++ b/src/ec/purism/librem/acpi/ec.asl
|
||||
@@ -218,11 +218,11 @@ Device (EC)
|
||||
* when the system is charging.
|
||||
*/
|
||||
If (TURB) {
|
||||
- Store (Zero, PPCM)
|
||||
+ Store (PPCM_TURBO, PPCM)
|
||||
PPCN ()
|
||||
Store (One, EDTB)
|
||||
} Else {
|
||||
- Store (One, PPCM)
|
||||
+ Store (PPCM_NOTURBO, PPCM)
|
||||
PPCN ()
|
||||
Store (Zero, EDTB)
|
||||
}
|
||||
diff --git a/src/mainboard/purism/librem13v1/acpi/ec.asl b/src/mainboard/purism/librem13v1/acpi/ec.asl
|
||||
index cf8b9a91d9..b2fa5b9924 100644
|
||||
--- a/src/mainboard/purism/librem13v1/acpi/ec.asl
|
||||
+++ b/src/mainboard/purism/librem13v1/acpi/ec.asl
|
||||
@@ -14,5 +14,7 @@
|
||||
*/
|
||||
|
||||
#define EC_SCI_GPI 10
|
||||
+#define PPCM_TURBO Zero
|
||||
+#define PPCM_NOTURBO One
|
||||
|
||||
#include <ec/purism/librem/acpi/ec.asl>
|
||||
diff --git a/src/mainboard/purism/librem_skl/acpi/ec.asl b/src/mainboard/purism/librem_skl/acpi/ec.asl
|
||||
index 4215213737..c667b6c41b 100644
|
||||
--- a/src/mainboard/purism/librem_skl/acpi/ec.asl
|
||||
+++ b/src/mainboard/purism/librem_skl/acpi/ec.asl
|
||||
@@ -14,5 +14,7 @@
|
||||
*/
|
||||
|
||||
#define EC_SCI_GPI 0x50
|
||||
+#define PPCM_TURBO One
|
||||
+#define PPCM_NOTURBO 0x02
|
||||
|
||||
#include <ec/purism/librem/acpi/ec.asl>
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,194 +0,0 @@
|
||||
From 7ac4919b8af16b62fb63592dbdd43ca9215c0cf7 Mon Sep 17 00:00:00 2001
|
||||
From: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
Date: Tue, 20 Mar 2018 18:32:23 -0400
|
||||
Subject: [PATCH 3/3] purism/librem_skl: Add AC/DC LoadLine to VR Config
|
||||
|
||||
The FSP 2.0 needs to set the ac_loadline and dc_loadline for
|
||||
each VR config. Without it, the Loadline is considered to be
|
||||
0 mOhm and this causes CPU temp to jump all over the place
|
||||
whenever the CPU is used.
|
||||
|
||||
These values were copied from the Google Poppy devicetree.
|
||||
|
||||
Change-Id: I6aeb6ee521988b94f2ae94a60d1a28b87ba984d4
|
||||
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
|
||||
---
|
||||
.../librem_skl/variants/librem13v2/devicetree.cb | 40 ++++++++++++++--------
|
||||
.../librem_skl/variants/librem15v3/devicetree.cb | 40 ++++++++++++++--------
|
||||
2 files changed, 50 insertions(+), 30 deletions(-)
|
||||
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
index da97fb9ea7..a08a3df5f4 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
|
||||
@@ -31,8 +31,8 @@ chip soc/intel/skylake
|
||||
# Enable "Intel Speed Shift Technology"
|
||||
register "speed_shift_enable" = "1"
|
||||
|
||||
- # Enable DPTF
|
||||
- register "dptf_enable" = "1"
|
||||
+ # Disable DPTF
|
||||
+ register "dptf_enable" = "0"
|
||||
|
||||
# FSP Configuration
|
||||
register "ProbelessTrace" = "0"
|
||||
@@ -82,19 +82,21 @@ chip soc/intel/skylake
|
||||
register "pirqh_routing" = "PCH_IRQ11"
|
||||
|
||||
# VR Settings Configuration for 4 Domains
|
||||
- #+----------------+-------+-------+-------------+-------+
|
||||
- #| Domain/Setting | SA | IA | GT Unsliced | GT |
|
||||
- #+----------------+-------+-------+-------------+-------+
|
||||
- #| Psi1Threshold | 20A | 20A | 20A | 20A |
|
||||
- #| Psi2Threshold | 4A | 5A | 5A | 5A |
|
||||
- #| Psi3Threshold | 1A | 1A | 1A | 1A |
|
||||
- #| Psi3Enable | 1 | 1 | 1 | 1 |
|
||||
- #| Psi4Enable | 1 | 1 | 1 | 1 |
|
||||
- #| ImonSlope | 0 | 0 | 0 | 0 |
|
||||
- #| ImonOffset | 0 | 0 | 0 | 0 |
|
||||
- #| IccMax | 7A | 34A | 35A | 35A |
|
||||
- #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
|
||||
- #+----------------+-------+-------+-------------+-------+
|
||||
+ #+----------------+-----------+-----------+-------------+----------+
|
||||
+ #| Domain/Setting | SA | IA | GT Unsliced | GT |
|
||||
+ #+----------------+-----------+-----------+-------------+----------+
|
||||
+ #| Psi1Threshold | 20A | 20A | 20A | 20A |
|
||||
+ #| Psi2Threshold | 4A | 5A | 5A | 5A |
|
||||
+ #| Psi3Threshold | 1A | 1A | 1A | 1A |
|
||||
+ #| Psi3Enable | 1 | 1 | 1 | 1 |
|
||||
+ #| Psi4Enable | 1 | 1 | 1 | 1 |
|
||||
+ #| ImonSlope | 0 | 0 | 0 | 0 |
|
||||
+ #| ImonOffset | 0 | 0 | 0 | 0 |
|
||||
+ #| IccMax | 7A | 34A | 35A | 35A |
|
||||
+ #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
|
||||
+ #| AC LoadLine | 15 mOhm | 5.7 mOhm | 5.2 mOhm | 5.2 mOhm |
|
||||
+ #| DC LoadLine | 14.3 mOhm | 4.83 mOhm | 4.2 mOhm | 4.2 mOhm |
|
||||
+ #+----------------+-----------+-----------+-------------+----------+
|
||||
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
|
||||
.vr_config_enable = 1,
|
||||
.psi1threshold = VR_CFG_AMP(20),
|
||||
@@ -106,6 +108,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(7),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 1500,
|
||||
+ .dc_loadline = 1430,
|
||||
}"
|
||||
|
||||
register "domain_vr_config[VR_IA_CORE]" = "{
|
||||
@@ -119,6 +123,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(34),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 570,
|
||||
+ .dc_loadline = 483,
|
||||
}"
|
||||
|
||||
register "domain_vr_config[VR_GT_UNSLICED]" = "{
|
||||
@@ -132,6 +138,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(35),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 520,
|
||||
+ .dc_loadline = 420,
|
||||
}"
|
||||
|
||||
register "domain_vr_config[VR_GT_SLICED]" = "{
|
||||
@@ -145,6 +153,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(35),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 520,
|
||||
+ .dc_loadline = 420,
|
||||
}"
|
||||
|
||||
# Enable Root Ports 5 and 9
|
||||
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
index deaf3a6deb..7dff719096 100644
|
||||
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
|
||||
@@ -31,8 +31,8 @@ chip soc/intel/skylake
|
||||
# Enable "Intel Speed Shift Technology"
|
||||
register "speed_shift_enable" = "1"
|
||||
|
||||
- # Enable DPTF
|
||||
- register "dptf_enable" = "1"
|
||||
+ # Disable DPTF
|
||||
+ register "dptf_enable" = "0"
|
||||
|
||||
# FSP Configuration
|
||||
register "ProbelessTrace" = "0"
|
||||
@@ -82,19 +82,21 @@ chip soc/intel/skylake
|
||||
register "pirqh_routing" = "PCH_IRQ11"
|
||||
|
||||
# VR Settings Configuration for 4 Domains
|
||||
- #+----------------+-------+-------+-------------+-------+
|
||||
- #| Domain/Setting | SA | IA | GT Unsliced | GT |
|
||||
- #+----------------+-------+-------+-------------+-------+
|
||||
- #| Psi1Threshold | 20A | 20A | 20A | 20A |
|
||||
- #| Psi2Threshold | 4A | 5A | 5A | 5A |
|
||||
- #| Psi3Threshold | 1A | 1A | 1A | 1A |
|
||||
- #| Psi3Enable | 1 | 1 | 1 | 1 |
|
||||
- #| Psi4Enable | 1 | 1 | 1 | 1 |
|
||||
- #| ImonSlope | 0 | 0 | 0 | 0 |
|
||||
- #| ImonOffset | 0 | 0 | 0 | 0 |
|
||||
- #| IccMax | 7A | 34A | 35A | 35A |
|
||||
- #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
|
||||
- #+----------------+-------+-------+-------------+-------+
|
||||
+ #+----------------+-----------+-----------+-------------+----------+
|
||||
+ #| Domain/Setting | SA | IA | GT Unsliced | GT |
|
||||
+ #+----------------+-----------+-----------+-------------+----------+
|
||||
+ #| Psi1Threshold | 20A | 20A | 20A | 20A |
|
||||
+ #| Psi2Threshold | 4A | 5A | 5A | 5A |
|
||||
+ #| Psi3Threshold | 1A | 1A | 1A | 1A |
|
||||
+ #| Psi3Enable | 1 | 1 | 1 | 1 |
|
||||
+ #| Psi4Enable | 1 | 1 | 1 | 1 |
|
||||
+ #| ImonSlope | 0 | 0 | 0 | 0 |
|
||||
+ #| ImonOffset | 0 | 0 | 0 | 0 |
|
||||
+ #| IccMax | 7A | 34A | 35A | 35A |
|
||||
+ #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
|
||||
+ #| AC LoadLine | 15 mOhm | 5.7 mOhm | 5.2 mOhm | 5.2 mOhm |
|
||||
+ #| DC LoadLine | 14.3 mOhm | 4.83 mOhm | 4.2 mOhm | 4.2 mOhm |
|
||||
+ #+----------------+-----------+-----------+-------------+----------+
|
||||
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
|
||||
.vr_config_enable = 1,
|
||||
.psi1threshold = VR_CFG_AMP(20),
|
||||
@@ -106,6 +108,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(7),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 1500,
|
||||
+ .dc_loadline = 1430,
|
||||
}"
|
||||
|
||||
register "domain_vr_config[VR_IA_CORE]" = "{
|
||||
@@ -119,6 +123,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(34),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 570,
|
||||
+ .dc_loadline = 483,
|
||||
}"
|
||||
|
||||
register "domain_vr_config[VR_GT_UNSLICED]" = "{
|
||||
@@ -132,6 +138,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(35),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 520,
|
||||
+ .dc_loadline = 420,
|
||||
}"
|
||||
|
||||
register "domain_vr_config[VR_GT_SLICED]" = "{
|
||||
@@ -145,6 +153,8 @@ chip soc/intel/skylake
|
||||
.imon_offset = 0x0,
|
||||
.icc_max = VR_CFG_AMP(35),
|
||||
.voltage_limit = 1520,
|
||||
+ .ac_loadline = 520,
|
||||
+ .dc_loadline = 420,
|
||||
}"
|
||||
|
||||
# Enable Root Ports 5 and 9
|
||||
--
|
||||
2.14.3
|
||||
|
||||
@ -1,8 +1,8 @@
|
||||
diff --git ./src/Kconfig ./src/Kconfig
|
||||
index 6896d0e..577bd52 100644
|
||||
index 99a704d..004b4a7 100644
|
||||
--- ./src/Kconfig
|
||||
+++ ./src/Kconfig
|
||||
@@ -253,6 +253,21 @@ config BOOTSPLASH_FILE
|
||||
@@ -260,6 +260,21 @@ config BOOTSPLASH_FILE
|
||||
The path and filename of the file to use as graphical bootsplash
|
||||
screen. The file format has to be jpg.
|
||||
|
||||
@ -25,7 +25,7 @@ index 6896d0e..577bd52 100644
|
||||
|
||||
menu "Mainboard"
|
||||
diff --git ./src/drivers/pc80/tpm/romstage.c ./src/drivers/pc80/tpm/romstage.c
|
||||
index 5531458..95e65f2 100644
|
||||
index b8e4705..7732e66 100644
|
||||
--- ./src/drivers/pc80/tpm/romstage.c
|
||||
+++ ./src/drivers/pc80/tpm/romstage.c
|
||||
@@ -48,6 +48,12 @@ static const struct {
|
||||
@ -60,10 +60,10 @@ index 5531458..95e65f2 100644
|
||||
}
|
||||
|
||||
tis_close();
|
||||
diff --git ./src/drivers/pc80/tpm/tpm.c ./src/drivers/pc80/tpm/tpm.c
|
||||
index 574d3af..9bdc73f 100644
|
||||
--- ./src/drivers/pc80/tpm/tpm.c
|
||||
+++ ./src/drivers/pc80/tpm/tpm.c
|
||||
diff --git ./src/drivers/pc80/tpm/tis.c ./src/drivers/pc80/tpm/tis.c
|
||||
index 3549173..11fc027 100644
|
||||
--- ./src/drivers/pc80/tpm/tis.c
|
||||
+++ ./src/drivers/pc80/tpm/tis.c
|
||||
@@ -125,10 +125,11 @@ static const struct device_name atmel_devices[] = {
|
||||
|
||||
static const struct device_name infineon_devices[] = {
|
||||
@ -78,7 +78,7 @@ index 574d3af..9bdc73f 100644
|
||||
#endif
|
||||
{0xffff}
|
||||
diff --git ./src/include/program_loading.h ./src/include/program_loading.h
|
||||
index 416e2e9..40486cd 100644
|
||||
index 7aba302..879c26e 100644
|
||||
--- ./src/include/program_loading.h
|
||||
+++ ./src/include/program_loading.h
|
||||
@@ -24,6 +24,8 @@ enum {
|
||||
@ -89,84 +89,12 @@ index 416e2e9..40486cd 100644
|
||||
+ SEG_NO_MEASURE = 1 << 1,
|
||||
};
|
||||
|
||||
enum prog_type {
|
||||
diff --git ./src/include/sha1.h ./src/include/sha1.h
|
||||
new file mode 100644
|
||||
index 0000000..e7e28e6
|
||||
--- /dev/null
|
||||
+++ ./src/include/sha1.h
|
||||
@@ -0,0 +1,31 @@
|
||||
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
|
||||
+ * Use of this source code is governed by a BSD-style license that can be
|
||||
+ * found in the LICENSE file.
|
||||
+ */
|
||||
+
|
||||
+/* SHA-1 functions */
|
||||
+
|
||||
+#ifndef _sha1_h_
|
||||
+#define _sha1_h_
|
||||
+
|
||||
+#include <stdint.h>
|
||||
+#include <commonlib/helpers.h>
|
||||
+
|
||||
+#define SHA1_DIGEST_SIZE 20
|
||||
+#define SHA1_BLOCK_SIZE 64
|
||||
+
|
||||
+/* SHA-1 context */
|
||||
+struct sha1_ctx {
|
||||
+ uint32_t count;
|
||||
+ uint32_t state[5];
|
||||
+ union {
|
||||
+ uint8_t b[SHA1_BLOCK_SIZE];
|
||||
+ uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))];
|
||||
+ } buf;
|
||||
+};
|
||||
+
|
||||
+void sha1_init(struct sha1_ctx *ctx);
|
||||
+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len);
|
||||
+uint8_t *sha1_final(struct sha1_ctx *ctx);
|
||||
+
|
||||
+#endif /* _sha1_h_ */
|
||||
diff --git ./src/include/tpm_lite/tlcl.h ./src/include/tpm_lite/tlcl.h
|
||||
index 8dd5d80..15fbebf 100644
|
||||
--- ./src/include/tpm_lite/tlcl.h
|
||||
+++ ./src/include/tpm_lite/tlcl.h
|
||||
@@ -147,6 +147,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
|
||||
uint8_t *out_digest);
|
||||
|
||||
/**
|
||||
+ * Perform a SHA1 hash on a region and extend a PCR with the hash.
|
||||
+ */
|
||||
+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len);
|
||||
+
|
||||
+/**
|
||||
* Get the entire set of permanent flags.
|
||||
*/
|
||||
uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags);
|
||||
diff --git ./src/lib/Makefile.inc ./src/lib/Makefile.inc
|
||||
index 25537d2..5248483 100644
|
||||
--- ./src/lib/Makefile.inc
|
||||
+++ ./src/lib/Makefile.inc
|
||||
@@ -57,8 +57,13 @@ verstage-$(CONFIG_TPM) += tlcl.c
|
||||
verstage-$(CONFIG_TPM2) += tpm2_marshaling.c
|
||||
verstage-$(CONFIG_TPM2) += tpm2_tlcl.c
|
||||
|
||||
-ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
+# Add the TPM support into the ROM stage for measuring the bootblock
|
||||
romstage-$(CONFIG_TPM) += tlcl.c
|
||||
+romstage-$(CONFIG_TPM) += sha1.c
|
||||
+ramstage-$(CONFIG_TPM) += tlcl.c
|
||||
+ramstage-$(CONFIG_TPM) += sha1.c
|
||||
+
|
||||
+ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
romstage-$(CONFIG_TPM2) += tpm2_marshaling.c
|
||||
romstage-$(CONFIG_TPM2) += tpm2_tlcl.c
|
||||
endif # CONFIG_VBOOT_SEPARATE_VERSTAGE
|
||||
// The prog_type is a bit mask, so that in searches one can find, e.g.,
|
||||
diff --git ./src/lib/cbfs.c ./src/lib/cbfs.c
|
||||
index 596abc5..f1928ce 100644
|
||||
index 87ab387..708d321 100644
|
||||
--- ./src/lib/cbfs.c
|
||||
+++ ./src/lib/cbfs.c
|
||||
@@ -69,7 +69,13 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
|
||||
@@ -70,7 +70,13 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
|
||||
if (size != NULL)
|
||||
*size = fsize;
|
||||
|
||||
@ -181,7 +109,7 @@ index 596abc5..f1928ce 100644
|
||||
}
|
||||
|
||||
int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
|
||||
@@ -97,7 +101,8 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
@@ -98,7 +104,8 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
return 0;
|
||||
if (rdev_readat(rdev, buffer, offset, in_size) != in_size)
|
||||
return 0;
|
||||
@ -191,7 +119,7 @@ index 596abc5..f1928ce 100644
|
||||
|
||||
case CBFS_COMPRESS_LZ4:
|
||||
if ((ENV_BOOTBLOCK || ENV_VERSTAGE) &&
|
||||
@@ -115,7 +120,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
@@ -116,7 +123,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
timestamp_add_now(TS_START_ULZ4F);
|
||||
out_size = ulz4fn(compr_start, in_size, buffer, buffer_size);
|
||||
timestamp_add_now(TS_END_ULZ4F);
|
||||
@ -200,7 +128,7 @@ index 596abc5..f1928ce 100644
|
||||
|
||||
case CBFS_COMPRESS_LZMA:
|
||||
if (ENV_BOOTBLOCK || ENV_VERSTAGE)
|
||||
@@ -134,11 +139,15 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
@@ -135,11 +142,15 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
|
||||
rdev_munmap(rdev, map);
|
||||
|
||||
@ -218,18 +146,18 @@ index 596abc5..f1928ce 100644
|
||||
|
||||
static inline int tohex4(unsigned int c)
|
||||
diff --git ./src/lib/hardwaremain.c ./src/lib/hardwaremain.c
|
||||
index 0deab4b..eee5415 100644
|
||||
index 6fd55d7..b5b7d91 100644
|
||||
--- ./src/lib/hardwaremain.c
|
||||
+++ ./src/lib/hardwaremain.c
|
||||
@@ -32,6 +32,7 @@
|
||||
@@ -33,6 +33,7 @@
|
||||
#include <reset.h>
|
||||
#include <boot/tables.h>
|
||||
#include <program_loading.h>
|
||||
+#include <tpm_lite/tlcl.h>
|
||||
+#include <security/tpm/tss.h>
|
||||
#include <lib.h>
|
||||
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
|
||||
#include <arch/acpi.h>
|
||||
@@ -544,3 +545,13 @@ void boot_state_current_unblock(void)
|
||||
@@ -545,3 +546,13 @@ void boot_state_current_unblock(void)
|
||||
{
|
||||
boot_state_unblock(current_phase.state_id, current_phase.seq);
|
||||
}
|
||||
@ -256,11 +184,31 @@ index 66d5120..b50afe7 100644
|
||||
|
||||
return 0;
|
||||
}
|
||||
diff --git ./src/lib/sha1.c ./src/lib/sha1.c
|
||||
diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
|
||||
index 2385635..0743a84 100644
|
||||
--- ./src/security/tpm/Makefile.inc
|
||||
+++ ./src/security/tpm/Makefile.inc
|
||||
@@ -4,6 +4,15 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
|
||||
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
|
||||
|
||||
+ifeq ($(CONFIG_MEASURED_BOOT),y)
|
||||
+ifneq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
+romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
+endif
|
||||
+romstage-$(CONFIG_TPM) += sha1.c
|
||||
+ramstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
+ramstage-$(CONFIG_TPM) += sha1.c
|
||||
+endif # CONFIG_MEASURED_BOOT
|
||||
+
|
||||
ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
|
||||
diff --git ./src/security/tpm/sha1.c ./src/security/tpm/sha1.c
|
||||
new file mode 100644
|
||||
index 0000000..506907f
|
||||
index 0000000..6b154f8
|
||||
--- /dev/null
|
||||
+++ ./src/lib/sha1.c
|
||||
+++ ./src/security/tpm/sha1.c
|
||||
@@ -0,0 +1,175 @@
|
||||
+/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved.
|
||||
+ * Use of this source code is governed by a BSD-style license that can be
|
||||
@ -270,7 +218,7 @@ index 0000000..506907f
|
||||
+ * Open Source Project (platorm/system/core.git/libmincrypt/sha.c
|
||||
+ */
|
||||
+
|
||||
+#include "sha1.h"
|
||||
+#include <security/tpm/sha1.h>
|
||||
+#include <string.h>
|
||||
+
|
||||
+static uint32_t ror27(uint32_t val)
|
||||
@ -437,19 +385,72 @@ index 0000000..506907f
|
||||
+ ctx->state[4] = 0xC3D2E1F0;
|
||||
+ ctx->count = 0;
|
||||
+}
|
||||
diff --git ./src/lib/tlcl.c ./src/lib/tlcl.c
|
||||
index 49854cb..32eb128 100644
|
||||
--- ./src/lib/tlcl.c
|
||||
+++ ./src/lib/tlcl.c
|
||||
@@ -19,6 +19,7 @@
|
||||
diff --git ./src/security/tpm/sha1.h ./src/security/tpm/sha1.h
|
||||
new file mode 100644
|
||||
index 0000000..e7e28e6
|
||||
--- /dev/null
|
||||
+++ ./src/security/tpm/sha1.h
|
||||
@@ -0,0 +1,31 @@
|
||||
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
|
||||
+ * Use of this source code is governed by a BSD-style license that can be
|
||||
+ * found in the LICENSE file.
|
||||
+ */
|
||||
+
|
||||
+/* SHA-1 functions */
|
||||
+
|
||||
+#ifndef _sha1_h_
|
||||
+#define _sha1_h_
|
||||
+
|
||||
+#include <stdint.h>
|
||||
+#include <commonlib/helpers.h>
|
||||
+
|
||||
+#define SHA1_DIGEST_SIZE 20
|
||||
+#define SHA1_BLOCK_SIZE 64
|
||||
+
|
||||
+/* SHA-1 context */
|
||||
+struct sha1_ctx {
|
||||
+ uint32_t count;
|
||||
+ uint32_t state[5];
|
||||
+ union {
|
||||
+ uint8_t b[SHA1_BLOCK_SIZE];
|
||||
+ uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))];
|
||||
+ } buf;
|
||||
+};
|
||||
+
|
||||
+void sha1_init(struct sha1_ctx *ctx);
|
||||
+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len);
|
||||
+uint8_t *sha1_final(struct sha1_ctx *ctx);
|
||||
+
|
||||
+#endif /* _sha1_h_ */
|
||||
diff --git ./src/security/tpm/tss.h ./src/security/tpm/tss.h
|
||||
index 8f3f1cb..5c569cb 100644
|
||||
--- ./src/security/tpm/tss.h
|
||||
+++ ./src/security/tpm/tss.h
|
||||
@@ -147,6 +147,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
|
||||
uint8_t *out_digest);
|
||||
|
||||
/**
|
||||
+ * Perform a SHA1 hash on a region and extend a PCR with the hash.
|
||||
+ */
|
||||
+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len);
|
||||
+
|
||||
+/**
|
||||
* Get the entire set of permanent flags.
|
||||
*/
|
||||
uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags);
|
||||
diff --git ./src/security/tpm/tss/tcg-1.2/tss.c ./src/security/tpm/tss/tcg-1.2/tss.c
|
||||
index 161d29f..95e55b9 100644
|
||||
--- ./src/security/tpm/tss/tcg-1.2/tss.c
|
||||
+++ ./src/security/tpm/tss/tcg-1.2/tss.c
|
||||
@@ -17,6 +17,7 @@
|
||||
#include <arch/early_variables.h>
|
||||
#include <assert.h>
|
||||
#include <string.h>
|
||||
#include <tpm_lite/tlcl.h>
|
||||
#include <tpm.h>
|
||||
+#include <sha1.h>
|
||||
+#include <security/tpm/sha1.h>
|
||||
#include <security/tpm/tis.h>
|
||||
#include <vb2_api.h>
|
||||
#include "tlcl_internal.h"
|
||||
#include "tlcl_structures.h"
|
||||
@@ -351,3 +352,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
|
||||
#include <security/tpm/tss.h>
|
||||
@@ -354,3 +355,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
|
||||
kPcrDigestLength);
|
||||
return result;
|
||||
}
|
||||
@ -0,0 +1,132 @@
|
||||
diff --git ./src/arch/x86/postcar.c ./src/arch/x86/postcar.c
|
||||
index 6497b73..485b051 100644
|
||||
--- ./src/arch/x86/postcar.c
|
||||
+++ ./src/arch/x86/postcar.c
|
||||
@@ -19,6 +19,7 @@
|
||||
#include <console/console.h>
|
||||
#include <main_decl.h>
|
||||
#include <program_loading.h>
|
||||
+#include <security/tpm/tss.h>
|
||||
#include <soc/intel/common/util.h>
|
||||
|
||||
/*
|
||||
@@ -43,3 +44,11 @@ void main(void)
|
||||
/* Load and run ramstage. */
|
||||
run_ramstage();
|
||||
}
|
||||
+
|
||||
+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
|
||||
+{
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) {
|
||||
+ tlcl_measure(2, (const void*) start, size);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
diff --git ./src/drivers/intel/fsp2_0/memory_init.c ./src/drivers/intel/fsp2_0/memory_init.c
|
||||
index 30987ce..4957bc0 100644
|
||||
--- ./src/drivers/intel/fsp2_0/memory_init.c
|
||||
+++ ./src/drivers/intel/fsp2_0/memory_init.c
|
||||
@@ -150,10 +150,11 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
|
||||
|
||||
/*
|
||||
* Initialize the TPM, unless the TPM was already initialized
|
||||
- * in verstage and used to verify romstage.
|
||||
+ * in verstage and used to verify romstage, or for measured boot.
|
||||
*/
|
||||
if (IS_ENABLED(CONFIG_LPC_TPM) &&
|
||||
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
|
||||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK) &&
|
||||
+ !IS_ENABLED(CONFIG_MEASURED_BOOT))
|
||||
init_tpm(s3wake);
|
||||
}
|
||||
|
||||
@@ -483,8 +484,29 @@ void fsp_memory_init(bool s3wake)
|
||||
if (status != CB_SUCCESS)
|
||||
die("Loading FSPM failed!\n");
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
|
||||
+ // we don't know if we are coming out of a resume
|
||||
+ // at this point, but want to setup the tpm ASAP
|
||||
+ init_tpm(0);
|
||||
+ tlcl_lib_init();
|
||||
+ const void * const bootblock = (const void*) 0xFFFFF800;
|
||||
+ const unsigned bootblock_size = 0x800;
|
||||
+ tlcl_measure(0, bootblock, bootblock_size);
|
||||
+
|
||||
+ tlcl_measure(1, _romstage, _eromstage - _romstage);
|
||||
+ }
|
||||
+
|
||||
/* Signal that FSP component has been loaded. */
|
||||
+ // Don't measure since it is relocated at this point
|
||||
prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);
|
||||
|
||||
do_fsp_memory_init(&hdr, s3wake, &memmap);
|
||||
}
|
||||
+
|
||||
+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
|
||||
+{
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) {
|
||||
+ tlcl_measure(1, (const void*) start, size);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
diff --git ./src/drivers/intel/fsp2_0/silicon_init.c ./src/drivers/intel/fsp2_0/silicon_init.c
|
||||
index bda88d1..49568f6 100644
|
||||
--- ./src/drivers/intel/fsp2_0/silicon_init.c
|
||||
+++ ./src/drivers/intel/fsp2_0/silicon_init.c
|
||||
@@ -18,6 +18,7 @@
|
||||
#include <fsp/api.h>
|
||||
#include <fsp/util.h>
|
||||
#include <program_loading.h>
|
||||
+#include <security/tpm/tss.h>
|
||||
#include <stage_cache.h>
|
||||
#include <string.h>
|
||||
#include <timestamp.h>
|
||||
@@ -101,6 +102,10 @@ void fsps_load(bool s3wake)
|
||||
if (rdev_readat(&rdev, dest, 0, size) < 0)
|
||||
die("Failed to read FSPS!\n");
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT)) {
|
||||
+ tlcl_measure(1, (const void*) dest, size);
|
||||
+ }
|
||||
+
|
||||
if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0)
|
||||
die("Unable to relocate FSPS!\n");
|
||||
|
||||
@@ -115,7 +120,7 @@ void fsps_load(bool s3wake)
|
||||
stage_cache_add(STAGE_REFCODE, &fsps);
|
||||
|
||||
/* Signal that FSP component has been loaded. */
|
||||
- prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL);
|
||||
+ prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL | SEG_NO_MEASURE);
|
||||
load_done = 1;
|
||||
}
|
||||
|
||||
diff --git ./src/drivers/pc80/tpm/Makefile.inc ./src/drivers/pc80/tpm/Makefile.inc
|
||||
index 9d428b5..1d2364f 100644
|
||||
--- ./src/drivers/pc80/tpm/Makefile.inc
|
||||
+++ ./src/drivers/pc80/tpm/Makefile.inc
|
||||
@@ -3,6 +3,7 @@ ifeq ($(CONFIG_ARCH_X86),y)
|
||||
verstage-$(CONFIG_LPC_TPM) += tis.c
|
||||
romstage-$(CONFIG_LPC_TPM) += tis.c
|
||||
ramstage-$(CONFIG_LPC_TPM) += tis.c
|
||||
+postcar-$(CONFIG_LPC_TPM) += tis.c
|
||||
romstage-$(CONFIG_LPC_TPM) += romstage.c
|
||||
|
||||
endif
|
||||
diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
|
||||
index 2385635..7ef24cc 100644
|
||||
--- ./src/security/tpm/Makefile.inc
|
||||
+++ ./src/security/tpm/Makefile.inc
|
||||
@@ -4,6 +4,11 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
|
||||
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
|
||||
|
||||
+ifeq ($(CONFIG_MEASURED_BOOT),y)
|
||||
+postcar-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
+postcar-$(CONFIG_TPM) += sha1.c
|
||||
+endif # CONFIG_MEASURED_BOOT
|
||||
+
|
||||
ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
|
||||
@ -1,12 +1,12 @@
|
||||
diff --git ./src/northbridge/intel/sandybridge/romstage.c ./src/northbridge/intel/sandybridge/romstage.c
|
||||
index 8608d5a..dac90ee 100644
|
||||
index 0426b83..d348b9e 100644
|
||||
--- ./src/northbridge/intel/sandybridge/romstage.c
|
||||
+++ ./src/northbridge/intel/sandybridge/romstage.c
|
||||
@@ -29,6 +29,8 @@
|
||||
#include <device/device.h>
|
||||
#include <halt.h>
|
||||
#include <tpm.h>
|
||||
+#include <tpm_lite/tlcl.h>
|
||||
#include <security/tpm/tis.h>
|
||||
+#include <security/tpm/tss.h>
|
||||
+#include <program_loading.h>
|
||||
#include <northbridge/intel/sandybridge/chip.h>
|
||||
#include "southbridge/intel/bd82x6x/pch.h"
|
||||
@ -31,7 +31,7 @@ index 8608d5a..dac90ee 100644
|
||||
/* USB is initialized in MRC if MRC is used. */
|
||||
if (CONFIG_USE_NATIVE_RAMINIT) {
|
||||
early_usb_init(mainboard_usb_ports);
|
||||
@@ -116,9 +131,23 @@ void mainboard_romstage_entry(unsigned long bist)
|
||||
@@ -117,9 +132,23 @@ void mainboard_romstage_entry(unsigned long bist)
|
||||
|
||||
northbridge_romstage_finalize(s3resume);
|
||||
|
||||
@ -0,0 +1,44 @@
|
||||
From 659f40bb348dd2ca02f9483ed2668465177b6a40 Mon Sep 17 00:00:00 2001
|
||||
From: Nico Huber <nico.h@gmx.de>
|
||||
Date: Wed, 23 May 2018 17:06:53 +0200
|
||||
Subject: [PATCH 50/59] buildgcc: Do not try to install GCC if build failed
|
||||
|
||||
We didn't bail out if configuring or building of GCC failed but run
|
||||
`make install` and later steps instead. This resulted in very confusing
|
||||
logs that concealed the actual error.
|
||||
|
||||
Change-Id: Ia064e0bfd96f0cbad391da3bb19e4dc304d988ff
|
||||
Signed-off-by: Nico Huber <nico.h@gmx.de>
|
||||
Reviewed-on: https://review.coreboot.org/26496
|
||||
Reviewed-by: Martin Roth <martinroth@google.com>
|
||||
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
|
||||
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
---
|
||||
util/crossgcc/buildgcc | 8 ++++----
|
||||
1 file changed, 4 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||
index edcea7ab42..53f9782cb5 100755
|
||||
--- a/util/crossgcc/buildgcc
|
||||
+++ b/util/crossgcc/buildgcc
|
||||
@@ -751,12 +751,12 @@ build_cross_GCC() {
|
||||
--with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
|
||||
--with-mpc=$DESTDIR$TARGETDIR \
|
||||
--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
|
||||
- || touch .failed
|
||||
- $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc || touch .failed
|
||||
+ && \
|
||||
+ $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
|
||||
$MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
- if [ "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
|
||||
- $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc || touch .failed
|
||||
+ if [ ! -f .failed -a "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
|
||||
+ $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc && \
|
||||
$MAKE install-target-libgcc DESTDIR=$DESTDIR || touch .failed
|
||||
fi
|
||||
}
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,130 @@
|
||||
From 46fb8b6f051b1844ef92098119e4ffa12395e26a Mon Sep 17 00:00:00 2001
|
||||
From: Iru Cai <mytbk920423@gmail.com>
|
||||
Date: Fri, 28 Jul 2017 23:36:25 +0800
|
||||
Subject: [PATCH 51/59] buildgcc: Update IASL to 20180531
|
||||
|
||||
Change-Id: I6c14f3aad59749896816bb8789788fc513e7176f
|
||||
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
|
||||
Signed-off-by: Martin Roth <martinroth@google.com>
|
||||
Reviewed-on: https://review.coreboot.org/21156
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Nico Huber <nico.h@gmx.de>
|
||||
---
|
||||
util/crossgcc/buildgcc | 6 ++---
|
||||
.../patches/acpica-unix2-20161222_iasl.patch | 27 -------------------
|
||||
.../patches/acpica-unix2-20180531_iasl.patch | 27 +++++++++++++++++++
|
||||
.../sum/acpica-unix2-20161222.tar.gz.cksum | 1 -
|
||||
.../sum/acpica-unix2-20180531.tar.gz.cksum | 1 +
|
||||
5 files changed, 31 insertions(+), 31 deletions(-)
|
||||
delete mode 100644 util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
|
||||
create mode 100644 util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
|
||||
delete mode 100644 util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
|
||||
create mode 100644 util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
|
||||
|
||||
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||
index 53f9782cb5..bbe74eb2b8 100755
|
||||
--- a/util/crossgcc/buildgcc
|
||||
+++ b/util/crossgcc/buildgcc
|
||||
@@ -18,8 +18,8 @@
|
||||
|
||||
cd $(dirname $0)
|
||||
|
||||
-CROSSGCC_DATE="October 15th, 2017"
|
||||
-CROSSGCC_VERSION="1.50"
|
||||
+CROSSGCC_DATE="June 3rd, 2018"
|
||||
+CROSSGCC_VERSION="1.51"
|
||||
CROSSGCC_COMMIT=$( git describe )
|
||||
|
||||
# default settings
|
||||
@@ -42,7 +42,7 @@ GCC_VERSION=6.3.0
|
||||
GCC_AUTOCONF_VERSION=2.69
|
||||
BINUTILS_VERSION=2.29.1
|
||||
GDB_VERSION=8.0
|
||||
-IASL_VERSION=20161222
|
||||
+IASL_VERSION=20180531
|
||||
PYTHON_VERSION=3.5.1
|
||||
EXPAT_VERSION=2.2.1
|
||||
# CLANG version number
|
||||
diff --git a/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch b/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
|
||||
deleted file mode 100644
|
||||
index 24bde98a32..0000000000
|
||||
--- a/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
|
||||
+++ /dev/null
|
||||
@@ -1,27 +0,0 @@
|
||||
-diff -Naur acpica-unix2-20161222/source/compiler/asloptions.c acpica-unix2-20161222/source/compiler/asloptions.c
|
||||
---- acpica-unix2-20161222/source/compiler/asloptions.c
|
||||
-+++ acpica-unix2-20161222/source/compiler/asloptions.c
|
||||
-@@ -100,6 +100,7 @@
|
||||
- if (argc < 2)
|
||||
- {
|
||||
- printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
|
||||
-+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
|
||||
- Usage ();
|
||||
- exit (1);
|
||||
- }
|
||||
-@@ -130,6 +131,7 @@
|
||||
- if (Gbl_DoSignon)
|
||||
- {
|
||||
- printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
|
||||
-+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
|
||||
- if (Gbl_IgnoreErrors)
|
||||
- {
|
||||
- printf ("Ignoring all errors, forcing AML file generation\n\n");
|
||||
-@@ -711,6 +713,7 @@
|
||||
- case '^':
|
||||
-
|
||||
- printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
|
||||
-+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
|
||||
- exit (0);
|
||||
-
|
||||
- case 'a':
|
||||
diff --git a/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch b/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
|
||||
new file mode 100644
|
||||
index 0000000000..fea5cd3c47
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
|
||||
@@ -0,0 +1,27 @@
|
||||
+diff -Naur acpica-unix2-20180531_/source/compiler/asloptions.c acpica-unix2-20180531/source/compiler/asloptions.c > acpica-unix2-20180531_iasl.patch
|
||||
+--- acpica-unix2-20180531_/source/compiler/asloptions.c
|
||||
++++ acpica-unix2-20180531/source/compiler/asloptions.c
|
||||
+@@ -126,6 +126,7 @@
|
||||
+ if (Gbl_DoSignon)
|
||||
+ {
|
||||
+ printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
|
||||
++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
|
||||
+ if (Gbl_IgnoreErrors)
|
||||
+ {
|
||||
+ printf ("Ignoring all errors, forcing AML file generation\n\n");
|
||||
+@@ -753,6 +754,7 @@
|
||||
+ case '^':
|
||||
+
|
||||
+ printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
|
||||
++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
|
||||
+ exit (0);
|
||||
+
|
||||
+ case 'a':
|
||||
+@@ -766,6 +768,7 @@
|
||||
+
|
||||
+ printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
|
||||
+ printf (ACPI_COMMON_BUILD_TIME);
|
||||
++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
|
||||
+ exit (0);
|
||||
+
|
||||
+ case 'e':
|
||||
diff --git a/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
|
||||
deleted file mode 100644
|
||||
index d857678871..0000000000
|
||||
--- a/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-73e57d4d558c9bc831165c71adbff577b526f256 tarballs/acpica-unix2-20161222.tar.gz
|
||||
diff --git a/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
|
||||
new file mode 100644
|
||||
index 0000000000..700185839a
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
|
||||
@@ -0,0 +1 @@
|
||||
+17717140438d506533b4a56e34350749d7b84d6c tarballs/acpica-unix2-20180531.tar.gz
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,132 @@
|
||||
From 575f1d7784041461d02c892b4846165dd742654c Mon Sep 17 00:00:00 2001
|
||||
From: Martin Roth <gaumless@gmail.com>
|
||||
Date: Tue, 5 Jun 2018 20:56:29 -0600
|
||||
Subject: [PATCH 52/59] crossgcc: Update to clang 6.0 & cmake 3.11.3
|
||||
|
||||
Change-Id: I1a0db60b527c2f7ffe77743c0d75b78a7c8bc4cc
|
||||
Signed-off-by: Martin Roth <gaumless@gmail.com>
|
||||
Reviewed-on: https://review.coreboot.org/26877
|
||||
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
---
|
||||
util/crossgcc/buildgcc | 6 +++---
|
||||
util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum | 1 -
|
||||
util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum | 1 +
|
||||
util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum | 1 -
|
||||
util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum | 1 +
|
||||
util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum | 1 +
|
||||
util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum | 1 -
|
||||
util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum | 1 -
|
||||
util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum | 1 +
|
||||
util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum | 1 -
|
||||
util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum | 1 +
|
||||
11 files changed, 8 insertions(+), 8 deletions(-)
|
||||
delete mode 100644 util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
|
||||
create mode 100644 util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
|
||||
delete mode 100644 util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
|
||||
create mode 100644 util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
|
||||
create mode 100644 util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
|
||||
delete mode 100644 util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
|
||||
delete mode 100644 util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
|
||||
create mode 100644 util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
|
||||
delete mode 100644 util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
|
||||
create mode 100644 util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
|
||||
|
||||
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||
index bbe74eb2b8..addc61f186 100755
|
||||
--- a/util/crossgcc/buildgcc
|
||||
+++ b/util/crossgcc/buildgcc
|
||||
@@ -46,9 +46,9 @@ IASL_VERSION=20180531
|
||||
PYTHON_VERSION=3.5.1
|
||||
EXPAT_VERSION=2.2.1
|
||||
# CLANG version number
|
||||
-CLANG_VERSION=4.0.0
|
||||
+CLANG_VERSION=6.0.0
|
||||
MAKE_VERSION=4.2.1
|
||||
-CMAKE_VERSION=3.9.0-rc3
|
||||
+CMAKE_VERSION=3.11.3
|
||||
|
||||
# GCC toolchain archive locations
|
||||
# These are sanitized by the jenkins toolchain test builder, so if
|
||||
@@ -69,7 +69,7 @@ CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src
|
||||
CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
|
||||
CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
|
||||
MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
|
||||
-CMAKE_ARCHIVE="https://cmake.org/files/v3.9/cmake-${CMAKE_VERSION}.tar.gz"
|
||||
+CMAKE_ARCHIVE="https://cmake.org/files/v3.11/cmake-${CMAKE_VERSION}.tar.gz"
|
||||
|
||||
ALL_ARCHIVES="$GMP_ARCHIVE $MPFR_ARCHIVE $MPC_ARCHIVE \
|
||||
$GCC_ARCHIVE $BINUTILS_ARCHIVE $GDB_ARCHIVE $IASL_ARCHIVE \
|
||||
diff --git a/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
|
||||
deleted file mode 100644
|
||||
index 00a5596878..0000000000
|
||||
--- a/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-e2762800c93d9335781ea6a45af3f80845542ef5 tarballs/cfe-4.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
|
||||
new file mode 100644
|
||||
index 0000000000..523445035f
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
|
||||
@@ -0,0 +1 @@
|
||||
+4cc7bef72fda70ac5e065ca0ae2d66957abe6f2a tarballs/cfe-6.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
|
||||
deleted file mode 100644
|
||||
index dbf642c461..0000000000
|
||||
--- a/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-bdb543c4bb87bd80fe65711114ca0a5c25329ae3 tarballs/clang-tools-extra-4.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
|
||||
new file mode 100644
|
||||
index 0000000000..9fcb8280d1
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
|
||||
@@ -0,0 +1 @@
|
||||
+c960a0d565e46e4c4f6976fac389f753076ca72e tarballs/clang-tools-extra-6.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
|
||||
new file mode 100644
|
||||
index 0000000000..14a4b22c8d
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
|
||||
@@ -0,0 +1 @@
|
||||
+73261a5b7f71abf7277c1d2a418ca3c4cf170c89 tarballs/cmake-3.11.3.tar.gz
|
||||
diff --git a/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
|
||||
deleted file mode 100644
|
||||
index 809ce3c7ca..0000000000
|
||||
--- a/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-d568e74e2e4a1cdeae1820cc2cb36fd2d6afc8fe tarballs/cmake-3.9.0-rc3.tar.gz
|
||||
diff --git a/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
|
||||
deleted file mode 100644
|
||||
index 95da5148ed..0000000000
|
||||
--- a/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-a879b610e427ef3bba482bdc031ae371cabab81e tarballs/compiler-rt-4.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
|
||||
new file mode 100644
|
||||
index 0000000000..88186dbf38
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
|
||||
@@ -0,0 +1 @@
|
||||
+5725f19be611034e77196461cdb4989f4258cfa4 tarballs/compiler-rt-6.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
|
||||
deleted file mode 100644
|
||||
index 410f95fb1a..0000000000
|
||||
--- a/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
|
||||
+++ /dev/null
|
||||
@@ -1 +0,0 @@
|
||||
-aee4524e2407f9fe5afc6f70c753180b907011d0 tarballs/llvm-4.0.0.src.tar.xz
|
||||
diff --git a/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
|
||||
new file mode 100644
|
||||
index 0000000000..ac079eccf5
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
|
||||
@@ -0,0 +1 @@
|
||||
+f61e0a35feb76644ba160a413ee209dd24c88f47 tarballs/llvm-6.0.0.src.tar.xz
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,55 @@
|
||||
From b0f1988f893bf5f581917816b11e810309955143 Mon Sep 17 00:00:00 2001
|
||||
From: Elyes HAOUAS <ehaouas@noos.fr>
|
||||
Date: Sat, 9 Jun 2018 11:59:00 +0200
|
||||
Subject: [PATCH 53/59] src: Get rid of unneeded whitespace
|
||||
|
||||
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da
|
||||
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
|
||||
Reviewed-on: https://review.coreboot.org/26991
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
|
||||
---
|
||||
util/crossgcc/buildgcc | 8 ++++----
|
||||
1 file changed, 4 insertions(+), 4 deletions(-)
|
||||
|
||||
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||
index addc61f186..cd8a091989 100755
|
||||
--- a/util/crossgcc/buildgcc
|
||||
+++ b/util/crossgcc/buildgcc
|
||||
@@ -1191,7 +1191,7 @@ export PATH=$DESTDIR$TARGETDIR/bin:$PATH
|
||||
|
||||
# Download, unpack, patch and build all packages
|
||||
|
||||
-printf "Downloading and verifing tarballs ... \n"
|
||||
+printf "Downloading and verifing tarballs ...\n"
|
||||
mkdir -p tarballs
|
||||
for P in $PACKAGES; do
|
||||
download "$P" || exit "$?"
|
||||
@@ -1199,21 +1199,21 @@ for P in $PACKAGES; do
|
||||
done
|
||||
printf "Downloaded tarballs ... ${green}ok${NC}\n"
|
||||
|
||||
-printf "Unpacking and patching ... \n"
|
||||
+printf "Unpacking and patching ...\n"
|
||||
for P in $PACKAGES; do
|
||||
unpack_and_patch $P || exit 1
|
||||
done
|
||||
printf "Unpacked and patched ... ${green}ok${NC}\n"
|
||||
|
||||
if [ -n "$BOOTSTRAPONLY" ]; then
|
||||
- printf "Building bootstrap compiler only ... \n"
|
||||
+ printf "Building bootstrap compiler only ...\n"
|
||||
for pkg in GMP MPFR MPC GCC; do
|
||||
build_for_host $pkg
|
||||
done
|
||||
exit 0
|
||||
fi
|
||||
|
||||
-printf "Building packages ... \n"
|
||||
+printf "Building packages ...\n"
|
||||
for package in $PACKAGES; do
|
||||
build $package
|
||||
done
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,54 @@
|
||||
From 095db339f7463b09b52968fa3747aef329c7b83e Mon Sep 17 00:00:00 2001
|
||||
From: Patrick Georgi <pgeorgi@chromium.org>
|
||||
Date: Tue, 26 Jun 2018 21:00:58 +0200
|
||||
Subject: [PATCH 54/59] util/crossgcc: Allow building a new gcc against new
|
||||
binutils with -D
|
||||
|
||||
With -D, the newly built toolchain isn't installed into $prefix/...
|
||||
but into $DESTDIR/$prefix/... while being built for $prefix alone.
|
||||
|
||||
This is useful for distributions, but it breaks down when the build
|
||||
host already has the toolchain installed in $prefix without proper
|
||||
build isolation (cf. gentoo):
|
||||
|
||||
In such cases libgcc etc are built using the new compiler (as gcc's
|
||||
build system is smart enough to state the path explicitly), but that
|
||||
compiler then uses its regular algorithm to determine the path to as,
|
||||
ld, ...
|
||||
That makes it use the tools from $prefix, which might differ in formats
|
||||
(assembly, certain object file flags, ...): nds32le-elf in particular
|
||||
has rather unstable formats still, and so new compilers can't work
|
||||
with old binutils.
|
||||
|
||||
The approach to deal with this is to take an unused path that's
|
||||
specified by gcc's build system ($out/gcc/$arch/$version) and symlink
|
||||
it to the new toolchain - these explicitly given directories take
|
||||
precedence over the default search path, and so the new binutils
|
||||
are used.
|
||||
|
||||
Change-Id: Ia9a262e73f56cd486a2ae07422b598c205a03aed
|
||||
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
|
||||
Reviewed-on: https://review.coreboot.org/27241
|
||||
Reviewed-by: Martin Roth <martinroth@google.com>
|
||||
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
---
|
||||
util/crossgcc/buildgcc | 2 ++
|
||||
1 file changed, 2 insertions(+)
|
||||
|
||||
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||
index cd8a091989..ef0c4d5d8f 100755
|
||||
--- a/util/crossgcc/buildgcc
|
||||
+++ b/util/crossgcc/buildgcc
|
||||
@@ -752,6 +752,8 @@ build_cross_GCC() {
|
||||
--with-mpc=$DESTDIR$TARGETDIR \
|
||||
--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
|
||||
&& \
|
||||
+ mkdir -p gcc/$TARGETARCH && \
|
||||
+ ln -s $DESTDIR$TARGETDIR/$TARGETARCH/bin gcc/$TARGETARCH/$GCC_VERSION && \
|
||||
$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
|
||||
$MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,46 @@
|
||||
From 11f8c9d9be8eb492d00b8d7a29614fdc0553387e Mon Sep 17 00:00:00 2001
|
||||
From: Martin Roth <gaumless@gmail.com>
|
||||
Date: Wed, 6 Jun 2018 22:36:14 -0600
|
||||
Subject: [PATCH 55/59] crosgcc/patches: Add make patch for GLIBC glob
|
||||
interface v2
|
||||
|
||||
Copied from the GNU make repository
|
||||
author Paul Smith <psmith@gnu.org>
|
||||
commit 48c8a116
|
||||
configure.ac: Support GLIBC glob interface version 2
|
||||
|
||||
Change-Id: Id70a2b98dad6349ee56985d8dd6d4f0d87b470e6
|
||||
Signed-off-by: Martin Roth <gaumless@gmail.com>
|
||||
Reviewed-on: https://review.coreboot.org/26939
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
|
||||
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
|
||||
---
|
||||
.../make-4.2.1_gnu_glob_interface_v2.patch | 15 +++++++++++++++
|
||||
1 file changed, 15 insertions(+)
|
||||
create mode 100644 util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
|
||||
|
||||
diff --git a/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch b/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
|
||||
new file mode 100644
|
||||
index 0000000000..466d6fdd70
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
|
||||
@@ -0,0 +1,15 @@
|
||||
+diff -Naur make-4.2.1/configure.ac make-4.2.1/configure.ac
|
||||
+--- make-4.2.1/configure.ac
|
||||
++++ make-4.2.1/configure.ac
|
||||
+@@ -399,10 +399,9 @@
|
||||
+ #include <glob.h>
|
||||
+ #include <fnmatch.h>
|
||||
+
|
||||
+-#define GLOB_INTERFACE_VERSION 1
|
||||
+ #if !defined _LIBC && defined __GNU_LIBRARY__ && __GNU_LIBRARY__ > 1
|
||||
+ # include <gnu-versions.h>
|
||||
+-# if _GNU_GLOB_INTERFACE_VERSION == GLOB_INTERFACE_VERSION
|
||||
++# if _GNU_GLOB_INTERFACE_VERSION == 1 || _GNU_GLOB_INTERFACE_VERSION == 2
|
||||
+ gnu glob
|
||||
+ # endif
|
||||
+ #endif],
|
||||
--
|
||||
2.17.1
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,156 @@
|
||||
From 234eabaa8da28dfa750826c200c08959bb917b28 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Roth <gaumless@gmail.com>
|
||||
Date: Sat, 21 Jul 2018 14:17:22 -0600
|
||||
Subject: [PATCH 57/59] util/crosgcc/patches: update make-4.2.1 patches
|
||||
|
||||
- Add the Do-not-assume-glibc-glob-internals patch to fix segfaults.
|
||||
- Update glob_interface_v2 patch to the patch directly from the
|
||||
make git repository instead of translating it. This gives better
|
||||
attributution to the original author.
|
||||
|
||||
Change-Id: Ibc936fc00925a4ca2170a6f5dca7c2b8d8d62f02
|
||||
Signed-off-by: Martin Roth <gaumless@gmail.com>
|
||||
Reviewed-on: https://review.coreboot.org/27591
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
|
||||
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
|
||||
---
|
||||
...b-Do-not-assume-glibc-glob-internals.patch | 67 +++++++++++++++++++
|
||||
...pport-GLIBC-glob-interface-version-2.patch | 28 ++++++++
|
||||
.../make-4.2.1_gnu_glob_interface_v2.patch | 15 -----
|
||||
3 files changed, 95 insertions(+), 15 deletions(-)
|
||||
create mode 100644 util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch
|
||||
create mode 100644 util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch
|
||||
delete mode 100644 util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
|
||||
|
||||
diff --git a/util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch b/util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch
|
||||
new file mode 100644
|
||||
index 0000000000..3d45025fe1
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/patches/make-4.2.1_0053-glob-Do-not-assume-glibc-glob-internals.patch
|
||||
@@ -0,0 +1,67 @@
|
||||
+From 193f1e81edd6b1b56b0eb0ff8aa4b41c7b4257b4 Mon Sep 17 00:00:00 2001
|
||||
+From: Paul Eggert <eggert@cs.ucla.edu>
|
||||
+Date: Sun, 24 Sep 2017 09:12:58 -0400
|
||||
+Subject: [PATCH 53/78] glob: Do not assume glibc glob internals.
|
||||
+
|
||||
+It has been proposed that glibc glob start using gl_lstat,
|
||||
+which the API allows it to do. GNU 'make' should not get in
|
||||
+the way of this. See:
|
||||
+https://sourceware.org/ml/libc-alpha/2017-09/msg00409.html
|
||||
+
|
||||
+* dir.c (local_lstat): New function, like local_stat.
|
||||
+(dir_setup_glob): Use it to initialize gl_lstat too, as the API
|
||||
+requires.
|
||||
+---
|
||||
+ dir.c | 29 +++++++++++++++++++++++++++--
|
||||
+ 1 file changed, 27 insertions(+), 2 deletions(-)
|
||||
+
|
||||
+diff --git a/dir.c b/dir.c
|
||||
+index adbb8a9..c343e4c 100644
|
||||
+--- a/dir.c
|
||||
++++ b/dir.c
|
||||
+@@ -1299,15 +1299,40 @@ local_stat (const char *path, struct stat *buf)
|
||||
+ }
|
||||
+ #endif
|
||||
+
|
||||
++/* Similarly for lstat. */
|
||||
++#if !defined(lstat) && !defined(WINDOWS32) || defined(VMS)
|
||||
++# ifndef VMS
|
||||
++# ifndef HAVE_SYS_STAT_H
|
||||
++int lstat (const char *path, struct stat *sbuf);
|
||||
++# endif
|
||||
++# else
|
||||
++ /* We are done with the fake lstat. Go back to the real lstat */
|
||||
++# ifdef lstat
|
||||
++# undef lstat
|
||||
++# endif
|
||||
++# endif
|
||||
++# define local_lstat lstat
|
||||
++#elif defined(WINDOWS32)
|
||||
++/* Windows doesn't support lstat(). */
|
||||
++# define local_lstat local_stat
|
||||
++#else
|
||||
++static int
|
||||
++local_lstat (const char *path, struct stat *buf)
|
||||
++{
|
||||
++ int e;
|
||||
++ EINTRLOOP (e, lstat (path, buf));
|
||||
++ return e;
|
||||
++}
|
||||
++#endif
|
||||
++
|
||||
+ void
|
||||
+ dir_setup_glob (glob_t *gl)
|
||||
+ {
|
||||
+ gl->gl_opendir = open_dirstream;
|
||||
+ gl->gl_readdir = read_dirstream;
|
||||
+ gl->gl_closedir = free;
|
||||
++ gl->gl_lstat = local_lstat;
|
||||
+ gl->gl_stat = local_stat;
|
||||
+- /* We don't bother setting gl_lstat, since glob never calls it.
|
||||
+- The slot is only there for compatibility with 4.4 BSD. */
|
||||
+ }
|
||||
+
|
||||
+ void
|
||||
+--
|
||||
+2.18.0
|
||||
+
|
||||
diff --git a/util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch b/util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch
|
||||
new file mode 100644
|
||||
index 0000000000..53e61b8bf7
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/patches/make-4.2.1_0068-configure.ac-Support-GLIBC-glob-interface-version-2.patch
|
||||
@@ -0,0 +1,28 @@
|
||||
+From 48c8a116a914a325a0497721f5d8b58d5bba34d4 Mon Sep 17 00:00:00 2001
|
||||
+From: Paul Smith <psmith@gnu.org>
|
||||
+Date: Sun, 19 Nov 2017 15:09:16 -0500
|
||||
+Subject: [PATCH 68/78] * configure.ac: Support GLIBC glob interface version 2
|
||||
+
|
||||
+---
|
||||
+ configure.ac | 3 +--
|
||||
+ 1 file changed, 1 insertion(+), 2 deletions(-)
|
||||
+
|
||||
+diff --git a/configure.ac b/configure.ac
|
||||
+index 8c72568..4710832 100644
|
||||
+--- a/configure.ac
|
||||
++++ b/configure.ac
|
||||
+@@ -404,10 +404,9 @@ AC_CACHE_CHECK([if system libc has GNU glob], [make_cv_sys_gnu_glob],
|
||||
+ #include <glob.h>
|
||||
+ #include <fnmatch.h>
|
||||
+
|
||||
+-#define GLOB_INTERFACE_VERSION 1
|
||||
+ #if !defined _LIBC && defined __GNU_LIBRARY__ && __GNU_LIBRARY__ > 1
|
||||
+ # include <gnu-versions.h>
|
||||
+-# if _GNU_GLOB_INTERFACE_VERSION == GLOB_INTERFACE_VERSION
|
||||
++# if _GNU_GLOB_INTERFACE_VERSION == 1 || _GNU_GLOB_INTERFACE_VERSION == 2
|
||||
+ gnu glob
|
||||
+ # endif
|
||||
+ #endif],
|
||||
+--
|
||||
+2.18.0
|
||||
+
|
||||
diff --git a/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch b/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
|
||||
deleted file mode 100644
|
||||
index 466d6fdd70..0000000000
|
||||
--- a/util/crossgcc/patches/make-4.2.1_gnu_glob_interface_v2.patch
|
||||
+++ /dev/null
|
||||
@@ -1,15 +0,0 @@
|
||||
-diff -Naur make-4.2.1/configure.ac make-4.2.1/configure.ac
|
||||
---- make-4.2.1/configure.ac
|
||||
-+++ make-4.2.1/configure.ac
|
||||
-@@ -399,10 +399,9 @@
|
||||
- #include <glob.h>
|
||||
- #include <fnmatch.h>
|
||||
-
|
||||
--#define GLOB_INTERFACE_VERSION 1
|
||||
- #if !defined _LIBC && defined __GNU_LIBRARY__ && __GNU_LIBRARY__ > 1
|
||||
- # include <gnu-versions.h>
|
||||
--# if _GNU_GLOB_INTERFACE_VERSION == GLOB_INTERFACE_VERSION
|
||||
-+# if _GNU_GLOB_INTERFACE_VERSION == 1 || _GNU_GLOB_INTERFACE_VERSION == 2
|
||||
- gnu glob
|
||||
- # endif
|
||||
- #endif],
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,826 @@
|
||||
From 987d42da1de420cb28cb7f4f979cbb01511877d6 Mon Sep 17 00:00:00 2001
|
||||
From: Martin Roth <gaumless@gmail.com>
|
||||
Date: Sun, 22 Jul 2018 11:45:29 -0600
|
||||
Subject: [PATCH 58/59] util/crosgcc: Fix most shellcheck errors in buildgcc
|
||||
|
||||
This fixes most of the simpler shellcheck errors in shellcheck 0.4.6.
|
||||
|
||||
There are still a few warnings left that weren't simple to fix or
|
||||
would have required more testing before I was confident in them.
|
||||
|
||||
Change-Id: I79ab3614cc1d69d3dfe1e0374e930313f2011cbf
|
||||
Signed-off-by: Martin Roth <gaumless@gmail.com>
|
||||
Reviewed-on: https://review.coreboot.org/27598
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
|
||||
---
|
||||
util/crossgcc/buildgcc | 298 ++++++++++++++++++++++++-----------------
|
||||
1 file changed, 172 insertions(+), 126 deletions(-)
|
||||
|
||||
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||
index a9d90572cd..5823707acf 100755
|
||||
--- a/util/crossgcc/buildgcc
|
||||
+++ b/util/crossgcc/buildgcc
|
||||
@@ -1,4 +1,16 @@
|
||||
#!/bin/sh
|
||||
+# shellcheck disable=SC2030,SC2031,SC2059
|
||||
+# The above line must be directly after the shebang line.
|
||||
+# Disables these warnings:
|
||||
+# 2030 - Modification of var is local (to subshell caused by pipeline).
|
||||
+# shell check 0.4.6 gets confused by the read -t 1 command and interprets
|
||||
+# the '1' as $1 getting modified.
|
||||
+# 2031 - var was modified in a subshell. That change might be lost.
|
||||
+# caused by shell check bug with SC2030? This causes any $1 from that
|
||||
+# point on to be flagged.
|
||||
+# 2059 - Don't use variables in the printf format string. Use printf "..%s.." "$foo".
|
||||
+# This is used for all of our color printing.
|
||||
+
|
||||
#
|
||||
# Copyright (C) 2008-2010 by coresystems GmbH
|
||||
# written by Patrick Georgi <patrick.georgi@coresystems.de> and
|
||||
@@ -16,7 +28,7 @@
|
||||
# GNU General Public License for more details.
|
||||
#
|
||||
|
||||
-cd $(dirname $0)
|
||||
+cd "$(dirname "$0")" || exit 1
|
||||
|
||||
CROSSGCC_DATE="June 11th, 2018"
|
||||
CROSSGCC_VERSION="1.52"
|
||||
@@ -80,7 +92,9 @@ ALL_ARCHIVES="$GMP_ARCHIVE $MPFR_ARCHIVE $MPC_ARCHIVE \
|
||||
GMP_DIR="gmp-${GMP_VERSION}"
|
||||
MPFR_DIR="mpfr-${MPFR_VERSION}"
|
||||
MPC_DIR="mpc-${MPC_VERSION}"
|
||||
+# shellcheck disable=SC2034
|
||||
GCC_DIR="gcc-${GCC_VERSION}"
|
||||
+# shellcheck disable=SC2034
|
||||
BINUTILS_DIR="binutils-${BINUTILS_VERSION}"
|
||||
GDB_DIR="gdb-${GDB_VERSION}"
|
||||
IASL_DIR="acpica-unix2-${IASL_VERSION}"
|
||||
@@ -101,51 +115,49 @@ RED='\033[1;31m'
|
||||
green='\033[0;32m'
|
||||
GREEN='\033[1;32m'
|
||||
blue='\033[0;34m'
|
||||
-BLUE='\033[1;34m'
|
||||
-cyan='\033[0;36m'
|
||||
CYAN='\033[1;36m'
|
||||
NC='\033[0m' # No Color
|
||||
|
||||
-UNAME=$(uname | grep -iq cygwin && echo Cygwin || uname)
|
||||
+UNAME=$(if uname | grep -iq cygwin; then echo Cygwin; else uname; fi)
|
||||
HALT_FOR_TOOLS=0
|
||||
|
||||
hostcc()
|
||||
{
|
||||
# $1 "host" or "target"
|
||||
- if [ "$BOOTSTRAP" = 1 -a "$1" = target ]; then
|
||||
- echo $DESTDIR$TARGETDIR/bin/gcc
|
||||
+ if [ "$BOOTSTRAP" = 1 ] && [ "$1" = target ]; then
|
||||
+ echo "$DESTDIR$TARGETDIR/bin/gcc"
|
||||
else
|
||||
- echo $CC
|
||||
+ echo "$CC"
|
||||
fi
|
||||
}
|
||||
|
||||
hostcxx()
|
||||
{
|
||||
# $1 "host" or "target"
|
||||
- if [ "$BOOTSTRAP" = 1 -a "$1" = target ]; then
|
||||
- echo $DESTDIR$TARGETDIR/bin/g++
|
||||
+ if [ "$BOOTSTRAP" = 1 ] && [ "$1" = target ]; then
|
||||
+ echo "$DESTDIR$TARGETDIR/bin/g++"
|
||||
else
|
||||
- echo $CXX
|
||||
+ echo "$CXX"
|
||||
fi
|
||||
}
|
||||
|
||||
normalize_dirs()
|
||||
{
|
||||
- mkdir -p $DESTDIR$TARGETDIR/lib
|
||||
- test -d $DESTDIR$TARGETDIR/lib32 && mv $DESTDIR$TARGETDIR/lib32/* $DESTDIR$TARGETDIR/lib
|
||||
- test -d $DESTDIR$TARGETDIR/lib64 && mv $DESTDIR$TARGETDIR/lib64/* $DESTDIR$TARGETDIR/lib
|
||||
- rmdir -p $DESTDIR$TARGETDIR/lib32 $DESTDIR$TARGETDIR/lib64
|
||||
+ mkdir -p "$DESTDIR$TARGETDIR/lib"
|
||||
+ test -d "$DESTDIR$TARGETDIR/lib32" && mv "$DESTDIR$TARGETDIR"/lib32/* "$DESTDIR$TARGETDIR/lib"
|
||||
+ test -d "$DESTDIR$TARGETDIR/lib64" && mv "$DESTDIR$TARGETDIR"/lib64/* "$DESTDIR$TARGETDIR/lib"
|
||||
+ rmdir -p "$DESTDIR$TARGETDIR/lib32" "$DESTDIR$TARGETDIR/lib64"
|
||||
|
||||
- perl -pi -e "s,/lib32,/lib," $DESTDIR$TARGETDIR/lib/*.la
|
||||
- perl -pi -e "s,/lib64,/lib," $DESTDIR$TARGETDIR/lib/*.la
|
||||
+ perl -pi -e "s,/lib32,/lib," "$DESTDIR$TARGETDIR"/lib/*.la
|
||||
+ perl -pi -e "s,/lib64,/lib," "$DESTDIR$TARGETDIR"/lib/*.la
|
||||
}
|
||||
|
||||
countdown()
|
||||
{
|
||||
tout=${1:-10}
|
||||
|
||||
- printf "\nPress Ctrl-C to abort, Enter to continue... %2ds" $tout
|
||||
- while [ $tout -gt 0 ]; do
|
||||
+ printf "\nPress Ctrl-C to abort, Enter to continue... %2ds" "$tout"
|
||||
+ while [ "$tout" -gt 0 ]; do
|
||||
sleep 1
|
||||
tout=$((tout - 1))
|
||||
printf "\b\b\b%2ds" $tout
|
||||
@@ -162,11 +174,12 @@ timeout()
|
||||
# Clean up in case the user aborts.
|
||||
trap 'kill $counter > /dev/null 2>&1' EXIT
|
||||
|
||||
- (countdown $tout; kill -USR1 $$)&
|
||||
+ (countdown "$tout"; kill -USR1 $$)&
|
||||
counter=$!
|
||||
|
||||
# Some shells with sh compatibility mode (e.g. zsh, mksh) only
|
||||
# let us interrupt `read` if a non-standard -t parameter is given.
|
||||
+ # shellcheck disable=SC2034,SC2039,SC2162
|
||||
if echo | read -t 1 foo 2>/dev/null; then
|
||||
read -t $((tout + 1)) foo
|
||||
else
|
||||
@@ -180,6 +193,7 @@ timeout()
|
||||
please_install()
|
||||
{
|
||||
HALT_FOR_TOOLS=1
|
||||
+ # shellcheck disable=SC1091
|
||||
test -r /etc/os-release && . /etc/os-release
|
||||
# vanilla debian doesn't define `ID_LIKE`, just `ID`
|
||||
if [ -z "${ID_LIKE}" ] && [ -n "${ID}" ]; then
|
||||
@@ -210,59 +224,60 @@ searchtool()
|
||||
search="$2"
|
||||
fi
|
||||
for i in "$1" "g$1" "gnu$1"; do
|
||||
- if [ -x "$(command -v $i 2>/dev/null)" ]; then
|
||||
+ if [ -x "$(command -v "$i" 2>/dev/null)" ]; then
|
||||
if [ "$(cat /dev/null | $i --version 2>&1 | grep -c "$search")" \
|
||||
-gt 0 ]; then
|
||||
- echo $i
|
||||
+ echo "$i"
|
||||
return
|
||||
fi
|
||||
fi
|
||||
done
|
||||
# A workaround for OSX 10.9 and some BSDs, whose nongnu
|
||||
# patch and tar also work.
|
||||
- if [ $UNAME = "Darwin" -o $UNAME = "FreeBSD" -o $UNAME = "NetBSD" -o $UNAME = "OpenBSD" ]; then
|
||||
- if [ "$1" = "patch" -o "$1" = "tar" ]; then
|
||||
- if [ -x "$(command -v $1 2>/dev/null)" ]; then
|
||||
- echo $1
|
||||
+ if [ "$UNAME" = "Darwin" ] || [ "$UNAME" = "FreeBSD" ] || [ "$UNAME" = "NetBSD" ] || [ "$UNAME" = "OpenBSD" ]; then
|
||||
+ if [ "$1" = "patch" ] || [ "$1" = "tar" ]; then
|
||||
+ if [ -x "$(command -v "$1" 2>/dev/null)" ]; then
|
||||
+ echo "$1"
|
||||
return
|
||||
fi
|
||||
fi
|
||||
fi
|
||||
- if echo $1 | grep -q "sum" ; then
|
||||
- algor=$(echo $1 | sed -e 's,sum,,')
|
||||
- if [ -x "$(command -v $1 2>/dev/null)" ]; then
|
||||
+ if echo "$1" | grep -q "sum" ; then
|
||||
+ algor=$(echo "$1" | sed -e 's,sum,,')
|
||||
+ if [ -x "$(command -v "$1" 2>/dev/null)" ]; then
|
||||
#xxxsum [file]
|
||||
- echo $1
|
||||
+ echo "$1"
|
||||
return
|
||||
- elif [ -x "$(command -v $algor 2>/dev/null)" ]; then
|
||||
+ elif [ -x "$(command -v "$algor" 2>/dev/null)" ]; then
|
||||
#xxx [file]
|
||||
- echo $algor
|
||||
+ echo "$algor"
|
||||
return
|
||||
elif [ -x "$(command -v openssl 2>/dev/null)" ]; then
|
||||
#openssl xxx [file]
|
||||
- echo openssl $algor
|
||||
+ echo openssl "$algor"
|
||||
return
|
||||
elif [ -x "$(command -v cksum 2>/dev/null)" ]; then
|
||||
#cksum -a xxx [file]
|
||||
#cksum has special options in NetBSD. Actually, NetBSD will use the second case above.
|
||||
- echo "buildgcc" | cksum -a $algor > /dev/null 2>/dev/null && \
|
||||
- echo cksum -a $algor
|
||||
+ echo "buildgcc" | cksum -a "$algor" > /dev/null 2>/dev/null && \
|
||||
+ echo cksum -a "$algor"
|
||||
return
|
||||
fi
|
||||
fi
|
||||
|
||||
- [ -z "$3" ] && please_install $1 $4
|
||||
+ [ -z "$3" ] && please_install "$1" "$4"
|
||||
false
|
||||
}
|
||||
|
||||
# Run a compile check of the specified library option to see if it's installed
|
||||
check_for_library() {
|
||||
- local LIBRARY_FLAGS=$1
|
||||
- local LIBRARY_PACKAGES="$2"
|
||||
- local LIBTEST_FILE=.libtest
|
||||
+ LIBRARY_FLAGS="$1"
|
||||
+ LIBRARY_PACKAGES="$2"
|
||||
+ LIBTEST_FILE=.libtest
|
||||
|
||||
echo "int main(int argc, char **argv) { (void) argc; (void) argv; return 0; }" > "${LIBTEST_FILE}.c"
|
||||
|
||||
+ # shellcheck disable=SC2086
|
||||
"$CC" $CFLAGS $LIBRARY_FLAGS "${LIBTEST_FILE}.c" -o "${LIBTEST_FILE}" >/dev/null 2>&1 || \
|
||||
please_install "$LIBRARY_PACKAGES"
|
||||
rm -rf "${LIBTEST_FILE}.c" "${LIBTEST_FILE}"
|
||||
@@ -307,22 +322,23 @@ ada_requested() {
|
||||
|
||||
download() {
|
||||
package=$1
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
|
||||
- FILE=$(basename $archive)
|
||||
+ FILE=$(basename "$archive")
|
||||
printf " * $FILE "
|
||||
|
||||
- if test -f tarballs/$FILE; then
|
||||
+ if test -f "tarballs/$FILE"; then
|
||||
printf "(cached)... "
|
||||
else
|
||||
printf "(downloading from $archive)"
|
||||
- rm -f tarballs/$FILE
|
||||
- cd tarballs
|
||||
- download_showing_percentage $archive
|
||||
+ rm -f "tarballs/$FILE"
|
||||
+ cd tarballs || exit 1
|
||||
+ download_showing_percentage "$archive"
|
||||
cd ..
|
||||
fi
|
||||
|
||||
- if [ ! -f tarballs/$FILE ]; then
|
||||
+ if [ ! -f "tarballs/$FILE" ]; then
|
||||
printf "${RED}Failed to download $FILE.${NC}\n"
|
||||
exit 1
|
||||
fi
|
||||
@@ -332,6 +348,7 @@ download() {
|
||||
# hexadecimal hash).
|
||||
compute_hash() {
|
||||
package=$1
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
file="$(basename "$archive")"
|
||||
|
||||
@@ -345,6 +362,7 @@ compute_hash() {
|
||||
|
||||
error_hash_missing() {
|
||||
package="$1"
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
file="$(basename "$archive")"
|
||||
|
||||
@@ -361,6 +379,7 @@ error_hash_missing() {
|
||||
# Read the known hash file of the package given in $1, and print it raw.
|
||||
get_known_hash() {
|
||||
package=$1
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
file="$(basename "$archive")"
|
||||
hashfile="sum/$file.cksum"
|
||||
@@ -373,13 +392,14 @@ get_known_hash() {
|
||||
exit 1
|
||||
fi
|
||||
|
||||
- cat "$hashfile" | sed -e 's@.*\([0-9a-f]\{40,\}\).*@\1@'
|
||||
+ sed -e 's@.*\([0-9a-f]\{40,\}\).*@\1@' < "$hashfile"
|
||||
}
|
||||
|
||||
error_hash_mismatch() {
|
||||
package=$1
|
||||
known_hash="$2"
|
||||
computed_hash="$3"
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
file="$(basename "$archive")"
|
||||
|
||||
@@ -400,6 +420,7 @@ error_hash_mismatch() {
|
||||
# hash; Bail out on mismatch or missing hash file.
|
||||
verify_hash() {
|
||||
package=$1
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
|
||||
known_hash="$(get_known_hash "$package")" || exit "$?"
|
||||
@@ -410,17 +431,19 @@ verify_hash() {
|
||||
exit 1
|
||||
fi
|
||||
|
||||
- printf "${GREEN}hash verified ("$known_hash")${NC}\n"
|
||||
+ printf "${GREEN}hash verified (\"$known_hash\")${NC}\n"
|
||||
}
|
||||
|
||||
unpack_and_patch() {
|
||||
- package=$1
|
||||
+ package="$1"
|
||||
+ # shellcheck disable=SC2086
|
||||
archive="$(eval echo \$$package"_ARCHIVE")"
|
||||
+ # shellcheck disable=SC2086
|
||||
dir="$(eval echo \$$package"_DIR")"
|
||||
- test -d ${dir} && test -f ${dir}/.unpack_success || (
|
||||
- printf " * $(basename $archive)\n"
|
||||
+ test -d "${dir}" && test -f "${dir}/.unpack_success" || (
|
||||
+ printf " * $(basename "$archive")\n"
|
||||
FLAGS=zxf
|
||||
- suffix=$(echo $archive | sed 's,.*\.,,')
|
||||
+ suffix=$(echo "$archive" | sed 's,.*\.,,')
|
||||
if [ "$suffix" = "gz" ] && [ -n "$PIGZ" ]; then FLAGS="-I pigz -xf"
|
||||
elif [ "$suffix" = "gz" ]; then FLAGS=zxf
|
||||
elif [ "$suffix" = "bz2" ] && [ -n "$LBZIP2" ]; then FLAGS="-I lbzip2 -xf"
|
||||
@@ -428,22 +451,24 @@ unpack_and_patch() {
|
||||
elif [ "$suffix" = "xz" ]; then FLAGS="--xz -xf"
|
||||
elif [ "$suffix" = "lzma" ]; then FLAGS="--lzma -xf"
|
||||
fi
|
||||
- $TAR $FLAGS tarballs/$(basename $archive)
|
||||
+ # shellcheck disable=SC2086
|
||||
+ $TAR $FLAGS "tarballs/$(basename "$archive")"
|
||||
for patch in patches/${dir}_*.patch; do
|
||||
- test -r $patch || continue
|
||||
- printf " o $(basename $patch)\n"
|
||||
- (cd ${dir} && $PATCH -s -N -p1 <../${patch}) || {
|
||||
+ test -r "$patch" || continue
|
||||
+ printf " o $(basename "$patch")\n"
|
||||
+ (cd "${dir}" || exit 1; $PATCH -s -N -p1 <"../${patch}") || {
|
||||
printf "\n${RED}Failed $patch.${NC}\n"
|
||||
exit 1
|
||||
}
|
||||
done
|
||||
- touch ${dir}/.unpack_success
|
||||
+ touch "${dir}/.unpack_success"
|
||||
)
|
||||
}
|
||||
|
||||
fn_exists()
|
||||
{
|
||||
- type $1 >/dev/null 2>&1
|
||||
+ # shellcheck disable=SC2039
|
||||
+ type "$1" >/dev/null 2>&1
|
||||
}
|
||||
|
||||
is_package_enabled()
|
||||
@@ -468,7 +493,7 @@ generic_build()
|
||||
success=$4
|
||||
version=$5
|
||||
|
||||
- fn_exists build_$package || return
|
||||
+ fn_exists "build_$package" || return
|
||||
|
||||
mkdir -p "$builddir"
|
||||
|
||||
@@ -477,10 +502,10 @@ generic_build()
|
||||
else
|
||||
printf "Building $package v$version for $host_target ... "
|
||||
DIR="$PWD"
|
||||
- cd "$builddir"
|
||||
+ cd "$builddir" || exit 1
|
||||
rm -f .failed
|
||||
- build_${package} $host_target > build.log 2>&1
|
||||
- cd "$DIR"
|
||||
+ "build_${package}" "$host_target" > build.log 2>&1
|
||||
+ cd "$DIR" || exit 1
|
||||
if [ ! -f "$builddir/.failed" ]; then
|
||||
touch "$success";
|
||||
else
|
||||
@@ -494,6 +519,7 @@ generic_build()
|
||||
build_for_host()
|
||||
{
|
||||
package="$1"
|
||||
+ # shellcheck disable=SC2086
|
||||
version="$(eval echo \$$package"_VERSION")"
|
||||
generic_build "$package" host "build-$package" "${DESTDIR}${TARGETDIR}/.${package}.${version}.success" "$version"
|
||||
}
|
||||
@@ -501,19 +527,20 @@ build_for_host()
|
||||
build_for_target()
|
||||
{
|
||||
package="$1"
|
||||
+ # shellcheck disable=SC2086
|
||||
version="$(eval echo \$$package"_VERSION")"
|
||||
generic_build "$package" target "build-${TARGETARCH}-$package" "${DESTDIR}${TARGETDIR}/.${TARGETARCH}-${package}.${version}.success" "$version"
|
||||
}
|
||||
|
||||
build()
|
||||
{
|
||||
- if package_uses_targetarch $1; then
|
||||
- if [ $BOOTSTRAP -eq 1 -a ! -f "${DESTDIR}${TARGETDIR}/.GCC.${GCC_VERSION}.success" ]; then
|
||||
+ if package_uses_targetarch "$1"; then
|
||||
+ if [ $BOOTSTRAP -eq 1 ] && [ ! -f "${DESTDIR}${TARGETDIR}/.GCC.${GCC_VERSION}.success" ]; then
|
||||
build_for_host GCC
|
||||
fi
|
||||
- build_for_target $1
|
||||
+ build_for_target "$1"
|
||||
else
|
||||
- build_for_host $1
|
||||
+ build_for_host "$1"
|
||||
fi
|
||||
}
|
||||
|
||||
@@ -532,7 +559,8 @@ cleanup()
|
||||
|
||||
printf "Cleaning up temporary files... "
|
||||
for package in $PACKAGES; do
|
||||
- rm -rf build-${TARGETARCH}-$package build-$package $(eval echo \$$package"_DIR")
|
||||
+ # shellcheck disable=SC2086
|
||||
+ rm -rf "build-${TARGETARCH}-$package" "build-$package" "$(eval echo \$$package"_DIR")"
|
||||
done
|
||||
rm -f getopt
|
||||
printf "${green}ok${NC}\n"
|
||||
@@ -601,14 +629,15 @@ EOF
|
||||
}
|
||||
|
||||
have_hostcflags_from_gmp() {
|
||||
- grep -q __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h >/dev/null 2>&1
|
||||
+ grep -q __GMP_CFLAGS "$DESTDIR$TARGETDIR/include/gmp.h" >/dev/null 2>&1
|
||||
}
|
||||
|
||||
set_hostcflags_from_gmp() {
|
||||
# Now set CFLAGS to match GMP CFLAGS but strip out -pedantic
|
||||
# as GCC 4.6.x fails if it's there.
|
||||
- export HOSTCFLAGS="$(grep __GMP_CFLAGS $DESTDIR$TARGETDIR/include/gmp.h |cut -d\" -f2 |\
|
||||
+ HOSTCFLAGS="$(grep __GMP_CFLAGS "$DESTDIR$TARGETDIR/include/gmp.h" |cut -d\" -f2 |\
|
||||
sed s,-pedantic,,)"
|
||||
+ export HOSTCFLAGS
|
||||
}
|
||||
|
||||
build_GMP() {
|
||||
@@ -619,10 +648,12 @@ build_GMP() {
|
||||
OPTIONS="$OPTIONS --with-pic"
|
||||
fi
|
||||
|
||||
+ # shellcheck disable=SC2086
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" \
|
||||
../${GMP_DIR}/configure --disable-shared --enable-fat \
|
||||
- --prefix=$TARGETDIR $OPTIONS \
|
||||
+ --prefix="$TARGETDIR" $OPTIONS \
|
||||
|| touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
@@ -632,12 +663,13 @@ build_GMP() {
|
||||
}
|
||||
|
||||
build_MPFR() {
|
||||
- test $UNAME = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL"
|
||||
+ test "$UNAME" = "Darwin" && CFLAGS="$CFLAGS -force_cpusubtype_ALL"
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" \
|
||||
- ../${MPFR_DIR}/configure --disable-shared --prefix=$TARGETDIR \
|
||||
- --infodir=$TARGETDIR/info \
|
||||
- --with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \
|
||||
+ ../${MPFR_DIR}/configure --disable-shared --prefix="$TARGETDIR" \
|
||||
+ --infodir="$TARGETDIR/info" \
|
||||
+ --with-gmp="$DESTDIR$TARGETDIR" CFLAGS="$HOSTCFLAGS" || \
|
||||
touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
@@ -645,28 +677,29 @@ build_MPFR() {
|
||||
|
||||
# work around build problem of libgmp.la
|
||||
if [ "$DESTDIR" != "" ]; then
|
||||
- perl -pi -e "s,$DESTDIR,," $DESTDIR$TARGETDIR/lib/libgmp.la
|
||||
+ perl -pi -e "s,$DESTDIR,," "$DESTDIR$TARGETDIR/lib/libgmp.la"
|
||||
fi
|
||||
}
|
||||
|
||||
build_MPC() {
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" \
|
||||
- ../${MPC_DIR}/configure --disable-shared --prefix=$TARGETDIR \
|
||||
- --infodir=$TARGETDIR/info --with-mpfr=$DESTDIR$TARGETDIR \
|
||||
- --with-gmp=$DESTDIR$TARGETDIR CFLAGS="$HOSTCFLAGS" || \
|
||||
+ ../${MPC_DIR}/configure --disable-shared --prefix="$TARGETDIR" \
|
||||
+ --infodir="$TARGETDIR/info" --with-mpfr="$DESTDIR$TARGETDIR" \
|
||||
+ --with-gmp="$DESTDIR$TARGETDIR" CFLAGS="$HOSTCFLAGS" || \
|
||||
touch .failed
|
||||
|
||||
# work around build problem of libmpfr.la
|
||||
if [ "$DESTDIR" != "" ]; then
|
||||
- perl -pi -e "s,$TARGETDIR/lib/libgmp.la,$DESTDIR\$&," $DESTDIR$TARGETDIR/lib/libmpfr.la
|
||||
+ perl -pi -e "s,$TARGETDIR/lib/libgmp.la,$DESTDIR\$&," "$DESTDIR$TARGETDIR/lib/libmpfr.la"
|
||||
fi
|
||||
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
# work around build problem of libmpfr.la
|
||||
if [ "$DESTDIR" != "" ]; then
|
||||
- perl -pi -e "s,$DESTDIR,," $DESTDIR$TARGETDIR/lib/libmpfr.la
|
||||
+ perl -pi -e "s,$DESTDIR,," "$DESTDIR$TARGETDIR/lib/libmpfr.la"
|
||||
fi
|
||||
|
||||
normalize_dirs
|
||||
@@ -677,7 +710,7 @@ build_BINUTILS() {
|
||||
ADDITIONALTARGET=",i386-elf"
|
||||
fi
|
||||
CC="$(hostcc target)" CXX="$(hostcxx target)" \
|
||||
- ../binutils-${BINUTILS_VERSION}/configure --prefix=$TARGETDIR \
|
||||
+ ../binutils-${BINUTILS_VERSION}/configure --prefix="$TARGETDIR" \
|
||||
--target=${TARGETARCH} --enable-targets=${TARGETARCH}${ADDITIONALTARGET} \
|
||||
--disable-werror --disable-nls --enable-lto --enable-gold \
|
||||
--enable-interwork --enable-multilib \
|
||||
@@ -685,11 +718,13 @@ build_BINUTILS() {
|
||||
CFLAGS="$HOSTCFLAGS" \
|
||||
CXXFLAGS="$HOSTCFLAGS" \
|
||||
|| touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
}
|
||||
|
||||
bootstrap_GCC() {
|
||||
+ # shellcheck disable=SC2086
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" \
|
||||
CFLAGS="$HOSTCFLAGS" \
|
||||
CFLAGS_FOR_BUILD="$HOSTCFLAGS" \
|
||||
@@ -698,17 +733,18 @@ bootstrap_GCC() {
|
||||
CXXFLAGS_FOR_BUILD="$HOSTCFLAGS" \
|
||||
CXXFLAGS_FOR_TARGET="$HOSTCFLAGS -fPIC" \
|
||||
../gcc-${GCC_VERSION}/configure \
|
||||
- --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
|
||||
+ --prefix="$TARGETDIR" --libexecdir="$TARGETDIR/lib" \
|
||||
--enable-bootstrap \
|
||||
--disable-werror --disable-nls \
|
||||
--disable-shared --disable-multilib \
|
||||
--disable-libssp --disable-libquadmath --disable-libcc1 \
|
||||
--disable-libsanitizer \
|
||||
${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
|
||||
- --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
|
||||
- --with-mpc=$DESTDIR$TARGETDIR \
|
||||
+ --with-gmp="$DESTDIR$TARGETDIR" --with-mpfr="$DESTDIR$TARGETDIR" \
|
||||
+ --with-mpc="$DESTDIR$TARGETDIR" \
|
||||
--with-pkgversion="coreboot bootstrap v$CROSSGCC_VERSION $CROSSGCC_DATE" \
|
||||
&& \
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS BOOT_CFLAGS="$HOSTCFLAGS" BUILD_CONFIG="" bootstrap && \
|
||||
$MAKE install-gcc \
|
||||
install-target-libgcc \
|
||||
@@ -731,6 +767,7 @@ build_cross_GCC() {
|
||||
# libiberty is not compiled with CFLAGS_FOR_BUILD.
|
||||
# Also set the CXX version of the flags because GCC is now compiled
|
||||
# using C++.
|
||||
+ # shellcheck disable=SC2086
|
||||
CC="$(hostcc target)" CXX="$(hostcxx target)" \
|
||||
CFLAGS_FOR_TARGET="-O2 -Dinhibit_libc" \
|
||||
CFLAGS="$HOSTCFLAGS $CLANGFLAGS" \
|
||||
@@ -738,7 +775,7 @@ build_cross_GCC() {
|
||||
CXXFLAGS="$HOSTCFLAGS $CLANGCXXFLAGS" \
|
||||
CXXFLAGS_FOR_BUILD="$HOSTCFLAGS $CLANGCXXFLAGS" \
|
||||
../gcc-${GCC_VERSION}/configure \
|
||||
- --prefix=$TARGETDIR --libexecdir=$TARGETDIR/lib \
|
||||
+ --prefix="$TARGETDIR" --libexecdir="$TARGETDIR/lib" \
|
||||
--target=${TARGETARCH} --disable-werror --disable-shared \
|
||||
--enable-lto --enable-plugins --enable-gold --enable-ld=default \
|
||||
--disable-libssp --disable-bootstrap --disable-nls \
|
||||
@@ -748,16 +785,17 @@ build_cross_GCC() {
|
||||
--disable-libatomic --disable-libcc1 --disable-decimal-float \
|
||||
${GCC_OPTIONS} --enable-languages="${LANGUAGES}" \
|
||||
--with-system-zlib \
|
||||
- --with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
|
||||
- --with-mpc=$DESTDIR$TARGETDIR \
|
||||
+ --with-gmp="$DESTDIR$TARGETDIR" --with-mpfr="$DESTDIR$TARGETDIR" \
|
||||
+ --with-mpc="$DESTDIR$TARGETDIR" \
|
||||
--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
|
||||
&& \
|
||||
mkdir -p gcc/$TARGETARCH && \
|
||||
- ln -s $DESTDIR$TARGETDIR/$TARGETARCH/bin gcc/$TARGETARCH/$GCC_VERSION && \
|
||||
+ ln -s "$DESTDIR$TARGETDIR/$TARGETARCH/bin" "gcc/$TARGETARCH/$GCC_VERSION" && \
|
||||
$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
|
||||
- $MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
|
||||
+ $MAKE install-gcc DESTDIR="$DESTDIR" || touch .failed
|
||||
|
||||
- if [ ! -f .failed -a "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
|
||||
+ if [ ! -f .failed ] && [ "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc && \
|
||||
$MAKE install-target-libgcc DESTDIR=$DESTDIR || touch .failed
|
||||
fi
|
||||
@@ -765,15 +803,15 @@ build_cross_GCC() {
|
||||
|
||||
build_GCC() {
|
||||
if [ "$1" = host ]; then
|
||||
- bootstrap_GCC $1
|
||||
+ bootstrap_GCC "$1"
|
||||
else
|
||||
- build_cross_GCC $1
|
||||
+ build_cross_GCC "$1"
|
||||
fi
|
||||
}
|
||||
|
||||
build_EXPAT() {
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS"
|
||||
- ../${EXPAT_DIR}/configure --disable-shared --prefix=$TARGETDIR \
|
||||
+ ../${EXPAT_DIR}/configure --disable-shared --prefix="$TARGETDIR" \
|
||||
|| touch .failed
|
||||
$MAKE || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
@@ -783,8 +821,9 @@ build_EXPAT() {
|
||||
|
||||
build_PYTHON() {
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS"
|
||||
- ../${PYTHON_DIR}/configure --prefix=$TARGETDIR \
|
||||
+ ../${PYTHON_DIR}/configure --prefix="$TARGETDIR" \
|
||||
|| touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
@@ -793,62 +832,66 @@ build_PYTHON() {
|
||||
|
||||
build_GDB() {
|
||||
export PYTHONHOME=$DESTDIR$TARGETDIR
|
||||
- if [ $(uname) != "FreeBSD" -a $(uname) != "NetBSD" ]; then
|
||||
+ if [ "$UNAME" != "FreeBSD" ] && [ "$UNAME" != "NetBSD" ]; then
|
||||
LIBDL="-ldl"
|
||||
fi
|
||||
LDFLAGS="-Wl,-rpath,\$\$ORIGIN/../lib/ -L$DESTDIR$TARGETDIR/lib \
|
||||
-lpthread $LIBDL -lutil" \
|
||||
CC="$(hostcc target)" CXX="$(hostcxx target)" \
|
||||
CFLAGS="$HOSTCFLAGS -I$DESTDIR$TARGETDIR/include" \
|
||||
- ../${GDB_DIR}/configure --prefix=$TARGETDIR \
|
||||
+ ../${GDB_DIR}/configure --prefix="$TARGETDIR" \
|
||||
--target=${TARGETARCH} --disable-werror --disable-nls
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
}
|
||||
|
||||
build_IASL() {
|
||||
RDIR=$PWD
|
||||
- cd ../$IASL_DIR/generate/unix
|
||||
+ cd ../$IASL_DIR/generate/unix || exit 1
|
||||
CFLAGS="$HOSTCFLAGS"
|
||||
HOST="_LINUX"
|
||||
- test $UNAME = "Darwin" && HOST="_APPLE"
|
||||
- test $UNAME = "FreeBSD" && HOST="_FreeBSD"
|
||||
- test $UNAME = "Cygwin" && HOST="_CYGWIN"
|
||||
+ test "$UNAME" = "Darwin" && HOST="_APPLE"
|
||||
+ test "$UNAME" = "FreeBSD" && HOST="_FreeBSD"
|
||||
+ test "$UNAME" = "Cygwin" && HOST="_CYGWIN"
|
||||
HOST="$HOST" CFLAGS="$CFLAGS" \
|
||||
OPT_CFLAGS="-O -D_FORTIFY_SOURCE=2 -D COREBOOT_TOOLCHAIN_VERSION='\"coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE\"' " \
|
||||
- $MAKE CC="$(hostcc host)" iasl || touch $RDIR/.failed
|
||||
- rm -f $DESTDIR$TARGETDIR/bin/iasl || touch $RDIR/.failed
|
||||
- cp bin/iasl $DESTDIR$TARGETDIR/bin || touch $RDIR/.failed
|
||||
+ $MAKE CC="$(hostcc host)" iasl || touch "$RDIR/.failed"
|
||||
+ rm -f "$DESTDIR$TARGETDIR/bin/iasl" || touch "$RDIR/.failed"
|
||||
+ cp bin/iasl "$DESTDIR$TARGETDIR/bin" || touch "$RDIR/.failed"
|
||||
}
|
||||
|
||||
build_LLVM() {
|
||||
- cd ..
|
||||
- ln -sf $PWD/$CFE_DIR $LLVM_DIR/tools/clang
|
||||
- ln -sf $PWD/$CTE_DIR $LLVM_DIR/tools/clang/tools/extra
|
||||
- ln -sf $PWD/$CRT_DIR $LLVM_DIR/projects/compiler-rt
|
||||
- cd -
|
||||
|
||||
- $CMAKE -G "Unix Makefiles" -DCMAKE_INSTALL_PREFIX=$DESTDIR$TARGETDIR \
|
||||
+ cd .. || exit 1
|
||||
+ ln -sf "$PWD/$CFE_DIR" "$LLVM_DIR/tools/clang"
|
||||
+ ln -sf "$PWD/$CTE_DIR" "$LLVM_DIR/tools/clang/tools/extra"
|
||||
+ ln -sf "$PWD/$CRT_DIR" "$LLVM_DIR/projects/compiler-rt"
|
||||
+ cd - || exit 1
|
||||
+
|
||||
+ $CMAKE -G "Unix Makefiles" -DCMAKE_INSTALL_PREFIX="$DESTDIR$TARGETDIR" \
|
||||
-DCLANG_VENDOR="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE - " \
|
||||
-DCMAKE_BUILD_TYPE=Release ../$LLVM_DIR || touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install || touch .failed
|
||||
|
||||
- cp -a ../$CFE_DIR/tools/scan-build/* $DESTDIR$TARGETDIR/bin
|
||||
- cp -a ../$CFE_DIR/tools/scan-view/* $DESTDIR$TARGETDIR/bin
|
||||
+ cp -a ../$CFE_DIR/tools/scan-build/* "$DESTDIR$TARGETDIR/bin"
|
||||
+ cp -a ../$CFE_DIR/tools/scan-view/* "$DESTDIR$TARGETDIR/bin"
|
||||
|
||||
# create symlinks to work around broken --print-librt-file-name
|
||||
# when used with -target.
|
||||
- cd $DESTDIR$TARGETDIR/lib/clang/${CLANG_VERSION}/lib
|
||||
+ cd "$DESTDIR$TARGETDIR/lib/clang/${CLANG_VERSION}/lib" || exit 1
|
||||
for i in */libclang_rt.builtins*.a; do
|
||||
- ln -s $i .
|
||||
+ ln -s "$i" .
|
||||
done
|
||||
}
|
||||
|
||||
build_MAKE() {
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS" \
|
||||
- ../${MAKE_DIR}/configure --prefix=$TARGETDIR --disable-nls \
|
||||
+ ../${MAKE_DIR}/configure --prefix="$TARGETDIR" --disable-nls \
|
||||
|| touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
@@ -857,8 +900,9 @@ build_MAKE() {
|
||||
|
||||
build_CMAKE() {
|
||||
CC="$(hostcc host)" CXX="$(hostcxx host)" CFLAGS="$HOSTCFLAGS" \
|
||||
- ../${CMAKE_DIR}/configure --prefix=$TARGETDIR \
|
||||
+ ../${CMAKE_DIR}/configure --prefix="$TARGETDIR" \
|
||||
|| touch .failed
|
||||
+ # shellcheck disable=SC2086
|
||||
$MAKE $JOBS || touch .failed
|
||||
$MAKE install DESTDIR=$DESTDIR || touch .failed
|
||||
|
||||
@@ -900,6 +944,7 @@ else
|
||||
# Detected non-GNU getopt
|
||||
args=$(getopt Vhcd:bBp:l:P:j:D:tSys:un $*)
|
||||
getopt_ret=$?
|
||||
+ # shellcheck disable=SC2086
|
||||
set -- $args
|
||||
fi
|
||||
|
||||
@@ -1026,8 +1071,8 @@ if searchtool wget "GNU" nofail > /dev/null; then
|
||||
download_showing_percentage() {
|
||||
url=$1
|
||||
printf "... ${red} 0%%"
|
||||
- wget $url 2>&1 | while read line; do
|
||||
- echo $line | grep -o "[0-9]\+%" | awk '{printf("\b\b\b\b%4s", $1)}'
|
||||
+ wget "$url" 2>&1 | while read -r line; do
|
||||
+ echo "$line" | grep -o "[0-9]\+%" | awk '{printf("\b\b\b\b%4s", $1)}'
|
||||
done
|
||||
printf "${NC}... "
|
||||
}
|
||||
@@ -1035,7 +1080,7 @@ elif searchtool curl "^curl " > /dev/null; then
|
||||
download_showing_percentage() {
|
||||
url=$1
|
||||
echo
|
||||
- curl -#OL $url
|
||||
+ curl -#OL "$url"
|
||||
}
|
||||
fi
|
||||
|
||||
@@ -1089,7 +1134,7 @@ if is_package_enabled "GCC"; then
|
||||
# sane preset: let the configure script figure out things by itself
|
||||
# more importantly, avoid any values that might already linger in the variable
|
||||
OPTIONS="ABI="
|
||||
-if [ $UNAME = "Darwin" ]; then
|
||||
+if [ "$UNAME" = "Darwin" ]; then
|
||||
#GCC_OPTIONS="$GCC_OPTIONS --enable-threads=posix"
|
||||
|
||||
# generally the OS X compiler can create x64 binaries.
|
||||
@@ -1097,7 +1142,7 @@ if [ $UNAME = "Darwin" ]; then
|
||||
# binaries in 10.6 (even if the kernel is 32bit)
|
||||
# For some weird reason, 10.5 autodetects an ABI=64 though
|
||||
# so we're setting the ABI explicitly here.
|
||||
- if [ $(sysctl -n hw.optional.x86_64 2>/dev/null) -eq 1 ] 2>/dev/null; then
|
||||
+ if [ "$(sysctl -n hw.optional.x86_64 2>/dev/null)" -eq 1 ] 2>/dev/null; then
|
||||
OPTIONS="ABI=64"
|
||||
else
|
||||
OPTIONS="ABI=32"
|
||||
@@ -1109,13 +1154,13 @@ if [ $UNAME = "Darwin" ]; then
|
||||
if $CC -v 2>&1 | grep -q LLVM; then
|
||||
CC=llvm-gcc
|
||||
fi
|
||||
-elif [ $UNAME = "Linux" -o $UNAME = "Cygwin" ]; then
|
||||
+elif [ "$UNAME" = "Linux" ] || [ "$UNAME" = "Cygwin" ]; then
|
||||
# gmp is overeager with detecting 64bit CPUs even if they run
|
||||
# a 32bit kernel and userland.
|
||||
if [ "$(uname -m 2>/dev/null)" = "i686" ]; then
|
||||
OPTIONS="ABI=32"
|
||||
fi
|
||||
-elif [ $UNAME = "NetBSD" ]; then
|
||||
+elif [ "$UNAME" = "NetBSD" ]; then
|
||||
# same for NetBSD but this one reports an i386
|
||||
if [ "$(uname -m 2>/dev/null)" = "i386" ]; then
|
||||
OPTIONS="ABI=32"
|
||||
@@ -1149,9 +1194,10 @@ if [ -z "${LANGUAGES}" ]; then
|
||||
fi
|
||||
if ada_requested; then
|
||||
if have_gnat; then
|
||||
- if [ "$BOOTSTRAP" != 1 -a \
|
||||
- \( "$(hostcc_major)" -lt 4 -o \
|
||||
- \( "$(hostcc_major)" -eq 4 -a "$(hostcc_minor)" -lt 9 \) \) ]
|
||||
+ if [ "$BOOTSTRAP" != 1 ] && \
|
||||
+ \( [ "$(hostcc_major)" -lt 4 ] || \
|
||||
+ \( [ "$(hostcc_major)" -eq 4 ] && \
|
||||
+ [ "$(hostcc_minor)" -lt 9 ] \) \) ]
|
||||
then
|
||||
printf "\n${red}WARNING${NC}\n"
|
||||
printf "Building the Ada compiler (GNAT $(buildcc_version)) with a host compiler older\n"
|
||||
@@ -1167,7 +1213,7 @@ if ada_requested; then
|
||||
exit 1
|
||||
fi
|
||||
else
|
||||
- if [ "$(hostcc_major)" -lt 4 -a "$BOOTSTRAP" != 1 ]; then
|
||||
+ if [ "$(hostcc_major)" -lt 4 ] && [ "$BOOTSTRAP" != 1 ]; then
|
||||
printf "\n${red}WARNING${NC}\n"
|
||||
printf "Building GCC $(buildcc_version) with a very old host compiler ($(hostcc_version)).\n"
|
||||
printf "Bootstrapping (-b) is recommended.\n"
|
||||
@@ -1187,8 +1233,8 @@ fi
|
||||
|
||||
# Prepare target directory for building GCC
|
||||
# (dependencies must be in the PATH)
|
||||
-mkdir -p $DESTDIR$TARGETDIR/bin
|
||||
-mkdir -p $DESTDIR$TARGETDIR/share
|
||||
+mkdir -p "$DESTDIR$TARGETDIR/bin"
|
||||
+mkdir -p "$DESTDIR$TARGETDIR/share"
|
||||
export PATH=$DESTDIR$TARGETDIR/bin:$PATH
|
||||
|
||||
# Download, unpack, patch and build all packages
|
||||
--
|
||||
2.17.1
|
||||
|
||||
@ -0,0 +1,29 @@
|
||||
From 8ba9e8cf63f92902cdb71eb5c4d3b3ea579380f4 Mon Sep 17 00:00:00 2001
|
||||
From: Tom Hiller <thrilleratplay@gmail.com>
|
||||
Date: Sat, 21 Jul 2018 00:14:00 -0400
|
||||
Subject: [PATCH 59/59] util: Add description.md to each util
|
||||
|
||||
Descriptions are taken from the files themselves or READMEs. Description
|
||||
followed by a space with the language in marked up as code.
|
||||
|
||||
Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c
|
||||
Signed-off-by: Tom Hiller <thrilleratplay@gmail.com>
|
||||
Reviewed-on: https://review.coreboot.org/27563
|
||||
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
|
||||
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
|
||||
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
|
||||
---
|
||||
util/crossgcc/description.md | 1 +
|
||||
1 file changed, 1 insertion(+)
|
||||
create mode 100644 util/crossgcc/description.md
|
||||
|
||||
diff --git a/util/crossgcc/description.md b/util/crossgcc/description.md
|
||||
new file mode 100644
|
||||
index 0000000000..fa37c2b6ab
|
||||
--- /dev/null
|
||||
+++ b/util/crossgcc/description.md
|
||||
@@ -0,0 +1 @@
|
||||
+A cross toolchain builder for -elf toolchains (ie. no libc support)
|
||||
--
|
||||
2.17.1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user