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Add NovaCustom V540TU board
Co-authored-by: Michał Kopeć <michal.kopec@3mdeb.com> Co-authored-by: Thierry Laurion <insurgo@riseup.net> Signed-off-by: Michał Kopeć <michal.kopec@3mdeb.com> Signed-off-by: Thierry Laurion <insurgo@riseup.net>
This commit is contained in:
Michał Kopeć
parent
99157f2291
commit
ce2b051a48
@ -518,6 +518,13 @@ workflows:
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requires:
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- novacustom_nv4x_adl
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- build:
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name: novacustom-v540tu
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target: novacustom-v540tu
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subcommand: ""
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requires:
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- nitropad-nv41
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# coreboot 4.11
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- build:
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name: UNMAINTAINED_kgpe-d16_workstation
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@ -533,7 +540,7 @@ workflows:
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subcommand: ""
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requires:
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- librem_l1um
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# coreboot 4.11
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- build:
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name: UNMAINTAINED_kgpe-d16_server
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71
boards/novacustom-v540tu/novacustom-v540tu.config
Normal file
71
boards/novacustom-v540tu/novacustom-v540tu.config
Normal file
@ -0,0 +1,71 @@
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# NovaCustom V54 MTL (integrated graphics) board configuration
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export CONFIG_COREBOOT=y
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export CONFIG_COREBOOT_VERSION=dasharo
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export CONFIG_LINUX_VERSION=6.1.8
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CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom-v540tu.config
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CONFIG_LINUX_CONFIG=config/linux-nitropad-x.config
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#Enable DEBUG output
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export CONFIG_DEBUG_OUTPUT=y
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export CONFIG_ENABLE_FUNCTION_TRACING_OUTPUT=y
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#Enable TPM2 pcap output under /tmp
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#export CONFIG_TPM2_CAPTURE_PCAP=y
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#On-demand hardware support (modules.cpio)
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CONFIG_LINUX_USB=y
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CONFIG_LINUX_E1000=y
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CONFIG_MOBILE_TETHERING=y
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#Modules packed into tools.cpio
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CONFIG_CRYPTSETUP2=y
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CONFIG_FLASHPROG=y
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CONFIG_FLASHTOOLS=y
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CONFIG_GPG2=y
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CONFIG_KEXEC=y
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CONFIG_UTIL_LINUX=y
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CONFIG_LVM2=y
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CONFIG_MBEDTLS=y
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CONFIG_PCIUTILS=y
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CONFIG_MSRTOOLS=y
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#Remote attestation support
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# TPM2 requirements
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CONFIG_TPM2_TSS=y
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CONFIG_OPENSSL=y
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#Remote Attestation common tools
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CONFIG_POPT=y
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CONFIG_QRENCODE=y
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CONFIG_TPMTOTP=y
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#HOTP based remote attestation for supported USB Security dongle
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#With/Without TPM support
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CONFIG_HOTPKEY=y
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#Nitrokey Storage admin tool (deprecated)
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#CONFIG_NKSTORECLI=n
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#GUI Support
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#Console based Whiptail support(Console based, no FB):
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#CONFIG_SLANG=y
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#CONFIG_NEWT=y
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#FBWhiptail based (Graphical):
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CONFIG_CAIRO=y
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CONFIG_FBWHIPTAIL=y
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#Additional tools (tools.cpio):
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#SSH server (requires ethernet drivers, eg: CONFIG_LINUX_E1000E)
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CONFIG_DROPBEAR=y
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#Runtime configuration
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#Automatically boot if HOTP is valid
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export CONFIG_AUTO_BOOT_TIMEOUT=5
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#TPM2 requirements
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export CONFIG_TPM2_TOOLS=y
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export CONFIG_PRIMARY_KEY_TYPE=ecc
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#TPM1 requirements
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#export CONFIG_TPM=y
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export CONFIG_BOOTSCRIPT=/bin/gui-init
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export CONFIG_BOOT_REQ_HASH=n
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export CONFIG_BOOT_REQ_ROLLBACK=n
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export CONFIG_BOOT_KERNEL_ADD=""
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export CONFIG_BOOT_KERNEL_REMOVE="intel_iommu=on intel_iommu=igfx_off"
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export CONFIG_BOARD_NAME="NovaCustom V540TU"
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export CONFIG_FLASH_OPTIONS="flashprog --progress --programmer internal"
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export CONFIG_AUTO_BOOT_TIMEOUT=5
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943
config/coreboot-novacustom-v540tu.config
Normal file
943
config/coreboot-novacustom-v540tu.config
Normal file
@ -0,0 +1,943 @@
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#
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# Automatically generated file; DO NOT EDIT.
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# coreboot configuration
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#
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#
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# General setup
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#
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CONFIG_COREBOOT_BUILD=y
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CONFIG_LOCALVERSION="v0.9.0-rc6"
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CONFIG_CBFS_PREFIX="fallback"
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CONFIG_COMPILER_GCC=y
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# CONFIG_COMPILER_LLVM_CLANG is not set
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CONFIG_ARCH_SUPPORTS_CLANG=y
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# CONFIG_ANY_TOOLCHAIN is not set
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# CONFIG_CCACHE is not set
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# CONFIG_IWYU is not set
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# CONFIG_FMD_GENPARSER is not set
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# CONFIG_UTIL_GENPARSER is not set
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CONFIG_OPTION_BACKEND_NONE=y
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# CONFIG_USE_OPTION_TABLE is not set
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CONFIG_COMPRESS_RAMSTAGE_LZMA=y
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# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
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CONFIG_SEPARATE_ROMSTAGE=y
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CONFIG_INCLUDE_CONFIG_FILE=y
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CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
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CONFIG_USE_BLOBS=y
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# CONFIG_USE_AMD_BLOBS is not set
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# CONFIG_USE_QC_BLOBS is not set
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# CONFIG_COVERAGE is not set
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# CONFIG_UBSAN is not set
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CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
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# CONFIG_ASAN is not set
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# CONFIG_NO_STAGE_CACHE is not set
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CONFIG_TSEG_STAGE_CACHE=y
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# CONFIG_UPDATE_IMAGE is not set
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# CONFIG_BOOTSPLASH_IMAGE is not set
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# CONFIG_FW_CONFIG is not set
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#
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# Software Bill Of Materials (SBOM)
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#
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# CONFIG_SBOM is not set
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# end of Software Bill Of Materials (SBOM)
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# end of General setup
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#
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# Mainboard
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#
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#
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# Important: Run 'make distclean' before switching boards
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#
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# CONFIG_VENDOR_51NB is not set
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# CONFIG_VENDOR_ACER is not set
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# CONFIG_VENDOR_ADLINK is not set
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# CONFIG_VENDOR_AMD is not set
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# CONFIG_VENDOR_AOPEN is not set
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# CONFIG_VENDOR_APPLE is not set
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# CONFIG_VENDOR_ASROCK is not set
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# CONFIG_VENDOR_ASUS is not set
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# CONFIG_VENDOR_BIOSTAR is not set
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# CONFIG_VENDOR_BOSTENTECH is not set
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# CONFIG_VENDOR_BYTEDANCE is not set
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# CONFIG_VENDOR_CAVIUM is not set
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CONFIG_VENDOR_CLEVO=y
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# CONFIG_VENDOR_COMPULAB is not set
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# CONFIG_VENDOR_DELL is not set
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# CONFIG_VENDOR_EMULATION is not set
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# CONFIG_VENDOR_EXAMPLE is not set
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# CONFIG_VENDOR_FACEBOOK is not set
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# CONFIG_VENDOR_FOXCONN is not set
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# CONFIG_VENDOR_GETAC is not set
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# CONFIG_VENDOR_GIGABYTE is not set
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# CONFIG_VENDOR_GOOGLE is not set
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# CONFIG_VENDOR_HARDKERNEL is not set
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# CONFIG_VENDOR_HP is not set
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# CONFIG_VENDOR_IBASE is not set
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# CONFIG_VENDOR_IBM is not set
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# CONFIG_VENDOR_INTEL is not set
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# CONFIG_VENDOR_INVENTEC is not set
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# CONFIG_VENDOR_KONTRON is not set
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# CONFIG_VENDOR_LENOVO is not set
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# CONFIG_VENDOR_LIBRETREND is not set
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# CONFIG_VENDOR_MSI is not set
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# CONFIG_VENDOR_NOVACUSTOM is not set
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# CONFIG_VENDOR_OCP is not set
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# CONFIG_VENDOR_OPENCELLULAR is not set
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# CONFIG_VENDOR_PACKARDBELL is not set
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# CONFIG_VENDOR_PCENGINES is not set
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# CONFIG_VENDOR_PINE64 is not set
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# CONFIG_VENDOR_PORTWELL is not set
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# CONFIG_VENDOR_PRODRIVE is not set
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# CONFIG_VENDOR_PROTECTLI is not set
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# CONFIG_VENDOR_PURISM is not set
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# CONFIG_VENDOR_RAZER is not set
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# CONFIG_VENDOR_RODA is not set
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# CONFIG_VENDOR_SAMSUNG is not set
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# CONFIG_VENDOR_SAPPHIRE is not set
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# CONFIG_VENDOR_SIEMENS is not set
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# CONFIG_VENDOR_SIFIVE is not set
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# CONFIG_VENDOR_STARLABS is not set
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# CONFIG_VENDOR_SUPERMICRO is not set
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# CONFIG_VENDOR_SYSTEM76 is not set
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# CONFIG_VENDOR_TI is not set
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# CONFIG_VENDOR_UP is not set
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CONFIG_MAINBOARD_FAMILY="Not Applicable"
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CONFIG_MAINBOARD_PART_NUMBER="V54x_6x_TU"
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CONFIG_MAINBOARD_VERSION="V540TU"
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CONFIG_MAINBOARD_DIR="clevo/mtl-h"
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CONFIG_DIMM_MAX=4
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CONFIG_DIMM_SPD_SIZE=1024
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CONFIG_FMDFILE=""
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# CONFIG_NO_POST is not set
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CONFIG_MAINBOARD_VENDOR="Clevo"
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CONFIG_CBFS_SIZE=0x1000000
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CONFIG_CONSOLE_SERIAL=y
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CONFIG_MAX_CPUS=22
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CONFIG_ONBOARD_VGA_IS_PRIMARY=y
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# CONFIG_POST_DEVICE is not set
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# CONFIG_POST_IO is not set
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CONFIG_UART_FOR_CONSOLE=0
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CONFIG_DEVICETREE="devicetree.cb"
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# CONFIG_VBOOT is not set
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CONFIG_VBOOT_VBNV_OFFSET=0x28
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CONFIG_VARIANT_DIR="igpu"
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CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
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# CONFIG_VGA_BIOS is not set
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CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook"
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CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
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# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
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CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000
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CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
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CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
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CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
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#
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# Alder Lake P
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#
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# CONFIG_BOARD_CLEVO_NS50PU is not set
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# CONFIG_BOARD_CLEVO_NV40PZ is not set
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#
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# Comet Lake U
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#
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# CONFIG_BOARD_CLEVO_L140CU is not set
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#
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# Kaby Lake U
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#
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# CONFIG_BOARD_CLEVO_N130WU is not set
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#
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# Meteor Lake H
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#
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# CONFIG_BOARD_CLEVO_V540TNX is not set
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# CONFIG_BOARD_CLEVO_V560TNX is not set
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CONFIG_BOARD_CLEVO_V540TU=y
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# CONFIG_BOARD_CLEVO_V560TU is not set
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#
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# Tiger Lake U
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#
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# CONFIG_BOARD_CLEVO_L140MU is not set
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# CONFIG_BOARD_CLEVO_NV40MZ is not set
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# CONFIG_BOARD_CLEVO_NS50MU is not set
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CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="V54x_6x_TU"
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# CONFIG_CONSOLE_POST is not set
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# CONFIG_USE_PM_ACPI_TIMER is not set
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CONFIG_TPM_PIRQ=0x61
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# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
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CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)"
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CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
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CONFIG_PXE_ROM_ID="10ec,8168"
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CONFIG_BOARD_CLEVO_MTLH_COMMON=y
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CONFIG_BOARD_CLEVO_V5X0TU_BASE=y
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CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x40000
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CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
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CONFIG_ECAM_MMCONF_BUS_NUMBER=256
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CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
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CONFIG_DCACHE_RAM_BASE=0xfef00000
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CONFIG_DCACHE_RAM_SIZE=0xc0000
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CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
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CONFIG_DCACHE_BSP_STACK_SIZE=0x80400
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CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
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CONFIG_HAVE_INTEL_FIRMWARE=y
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CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
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CONFIG_DRIVERS_INTEL_WIFI=y
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CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin"
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CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin"
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CONFIG_GBE_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/gbe.bin"
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CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x200000
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CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36
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CONFIG_CARDBUS_PLUGIN_SUPPORT=y
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CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
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# CONFIG_USE_LEGACY_8254_TIMER is not set
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# CONFIG_DEBUG_SMI is not set
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CONFIG_HAVE_IFD_BIN=y
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CONFIG_PCIEXP_HOTPLUG_BUSES=42
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CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000
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CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000
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CONFIG_PS2K_EISAID="PNP0303"
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CONFIG_PS2M_EISAID="PNP0F13"
|
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CONFIG_TTYS0_BAUD=115200
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CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
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CONFIG_D3COLD_SUPPORT=y
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CONFIG_PCIEXP_ASPM=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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CONFIG_PCIEXP_CLK_PM=y
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# CONFIG_DRIVERS_UART_8250IO is not set
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CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
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CONFIG_FSP_TEMP_RAM_SIZE=0x20000
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CONFIG_EC_GPE_SCI=0x50
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CONFIG_TPM_MEASURED_BOOT=y
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CONFIG_LINUX_COMMAND_LINE="debug console=uart,mmio32,0xfe02c000"
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CONFIG_BOARD_ROMSIZE_KB_32768=y
|
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# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
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# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
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# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB_32768=y
|
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# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=32768
|
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CONFIG_ROM_SIZE=0x02000000
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CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
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CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
|
||||
# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
|
||||
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
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||||
# end of Mainboard
|
||||
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||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
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||||
|
||||
#
|
||||
# Chipset
|
||||
#
|
||||
|
||||
#
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||||
# SoC
|
||||
#
|
||||
CONFIG_CHIPSET_DEVICETREE="soc/intel/meteorlake/chipset.cb"
|
||||
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
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CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
||||
CONFIG_ROMSTAGE_ADDR=0x2000000
|
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CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe02c000
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||
CONFIG_ACPI_BERT=y
|
||||
CONFIG_ACPI_BERT_SIZE=0x10000
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
|
||||
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
|
||||
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
|
||||
CONFIG_ACPI_CPU_STRING="CP%02X"
|
||||
CONFIG_STACK_SIZE=0x2000
|
||||
CONFIG_EXT_BIOS_WIN_BASE=0xf8000000
|
||||
CONFIG_EXT_BIOS_WIN_SIZE=0x2000000
|
||||
CONFIG_IFD_CHIPSET="mtl"
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_MAX_TBT_ROOT_PORTS=4
|
||||
CONFIG_MAX_ROOT_PORTS=12
|
||||
CONFIG_MAX_PCIE_CLOCK_SRC=9
|
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CONFIG_PCR_BASE_ADDRESS=0xe0000000
|
||||
CONFIG_CPU_BCLK_MHZ=100
|
||||
CONFIG_SOC_INTEL_PERFORMANCE_CORE_SCALE_FACTOR=125
|
||||
CONFIG_SOC_INTEL_EFFICIENT_CORE_SCALE_FACTOR=100
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||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
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||||
CONFIG_CPU_XTAL_HZ=38400000
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
|
||||
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
|
||||
CONFIG_SOC_INTEL_UART_DEV_MAX=3
|
||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
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||||
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
|
||||
CONFIG_FSP_HEADER_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Include/"
|
||||
CONFIG_FSP_FD_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Fsp.fd"
|
||||
CONFIG_DATA_BUS_WIDTH=128
|
||||
CONFIG_DIMMS_PER_CHANNEL=2
|
||||
CONFIG_MRC_CHANNEL_WIDTH=16
|
||||
CONFIG_BUILDING_WITH_DEBUG_FSP=y
|
||||
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258
|
||||
CONFIG_INTEL_GMA_BCLV_WIDTH=32
|
||||
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254
|
||||
CONFIG_INTEL_GMA_BCLM_WIDTH=32
|
||||
CONFIG_FSP_PUBLISH_MBP_HOB=y
|
||||
CONFIG_MAX_HECI_DEVICES=6
|
||||
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||
CONFIG_HAVE_PAM0_REGISTER=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||
CONFIG_SOC_INTEL_METEORLAKE=y
|
||||
CONFIG_SOC_INTEL_METEORLAKE_U_H=y
|
||||
CONFIG_SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT=y
|
||||
CONFIG_METEORLAKE_CAR_ENHANCED_NEM=y
|
||||
CONFIG_CPU_MAX_TEMPERATURE=110
|
||||
CONFIG_IOE_PCR_BASE_ADDRESS=0x3fff0000000
|
||||
CONFIG_SOC_INTEL_USB2_DEV_MAX=10
|
||||
CONFIG_SOC_INTEL_USB3_DEV_MAX=2
|
||||
CONFIG_SOC_INTEL_METEORLAKE_DEBUG_CONSENT=0
|
||||
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x800000
|
||||
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x100f
|
||||
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x100f
|
||||
CONFIG_IOE_DIE_CLOCK_START=6
|
||||
CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET=161
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005
|
||||
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=42
|
||||
CONFIG_INTEL_TME=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||
CONFIG_CBFS_CACHE_ALIGN=8
|
||||
CONFIG_SOC_INTEL_COMMON=y
|
||||
|
||||
#
|
||||
# Intel SoC Common Code for IP blocks
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||
CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
|
||||
# CONFIG_USE_COREBOOT_MP_INIT is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||
CONFIG_CAR_HAS_SF_MASKS=y
|
||||
CONFIG_COS_MAPPED_TO_MSB=y
|
||||
CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y
|
||||
CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y
|
||||
CONFIG_CPU_SUPPORTS_INTEL_TME=y
|
||||
CONFIG_TME_KEY_REGENERATION_ON_WARM_BOOT=y
|
||||
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
|
||||
CONFIG_HAVE_HYPERTHREADING=y
|
||||
CONFIG_FSP_HYPERTHREADING=y
|
||||
CONFIG_INTEL_KEYLOCKER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE=2
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB=y
|
||||
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y
|
||||
CONFIG_SOC_INTEL_CSE_SEND_EOP_LATE=y
|
||||
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
|
||||
CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
|
||||
CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
|
||||
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
|
||||
CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
|
||||
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
|
||||
CONFIG_SOC_INTEL_CSE_RW_FILE=""
|
||||
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
|
||||
CONFIG_SOC_INTEL_CSE_SET_EOP=y
|
||||
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
|
||||
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
|
||||
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
|
||||
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
|
||||
CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY=y
|
||||
CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2=y
|
||||
CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ME_SPEC_18=y
|
||||
CONFIG_ME_SPEC=18
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||
CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PMODE_4BITS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
|
||||
CONFIG_SOC_INTEL_GFX_NON_PREFETCHABLE_MMIO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_IOC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
|
||||
CONFIG_PCIE_CLOCK_CONTROL_THROUGH_P2SB=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||
CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y
|
||||
CONFIG_PMC_IPC_ACPI_INTERFACE=y
|
||||
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
|
||||
# CONFIG_TCSS_HAS_USBC_OPS is not set
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
|
||||
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
|
||||
# CONFIG_FIRMWARE_CONNECTION_MANAGER is not set
|
||||
CONFIG_SOFTWARE_CONNECTION_MANAGER=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y
|
||||
CONFIG_ENABLE_EARLY_DMA_PROTECTION=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
||||
|
||||
#
|
||||
# Intel SoC Common PCH Code
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
||||
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
||||
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
|
||||
CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
|
||||
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
|
||||
|
||||
#
|
||||
# Intel SoC Common coreboot stages and non-IP blocks
|
||||
#
|
||||
CONFIG_SOC_INTEL_COMMON_BASECODE=y
|
||||
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||
CONFIG_PAVP=y
|
||||
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||
CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y
|
||||
# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set
|
||||
CONFIG_SOC_INTEL_CRASHLOG=y
|
||||
CONFIG_SOC_INTEL_IOE_DIE_SUPPORT=y
|
||||
|
||||
#
|
||||
# CPU
|
||||
#
|
||||
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||
CONFIG_CPU_INTEL_COMMON=y
|
||||
CONFIG_ENABLE_VMX=y
|
||||
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
||||
CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
|
||||
CONFIG_CPU_INTEL_COMMON_SMM=y
|
||||
CONFIG_PARALLEL_MP=y
|
||||
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||
CONFIG_DEFAULT_X2APIC_LATE_WORKAROUND=y
|
||||
# CONFIG_XAPIC_ONLY is not set
|
||||
# CONFIG_X2APIC_ONLY is not set
|
||||
# CONFIG_X2APIC_RUNTIME is not set
|
||||
CONFIG_X2APIC_LATE_WORKAROUND=y
|
||||
CONFIG_UDELAY_TSC=y
|
||||
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||
CONFIG_X86_CLFLUSH_CAR=y
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
CONFIG_SMM_TSEG=y
|
||||
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
|
||||
CONFIG_X86_INIT_NEED_1_SIPI=y
|
||||
CONFIG_AP_STACK_SIZE=0x800
|
||||
CONFIG_SMP=y
|
||||
CONFIG_SSE=y
|
||||
CONFIG_SSE2=y
|
||||
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||
|
||||
#
|
||||
# Northbridge
|
||||
#
|
||||
|
||||
#
|
||||
# Southbridge
|
||||
#
|
||||
CONFIG_PCIEXP_HOTPLUG=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
||||
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
||||
CONFIG_RCBA_LENGTH=0x4000
|
||||
|
||||
#
|
||||
# Super I/O
|
||||
#
|
||||
|
||||
#
|
||||
# Embedded Controllers
|
||||
#
|
||||
CONFIG_EC_ACPI=y
|
||||
CONFIG_EC_SYSTEM76_EC=y
|
||||
# CONFIG_EC_SYSTEM76_EC_UPDATE is not set
|
||||
|
||||
#
|
||||
# Intel Firmware
|
||||
#
|
||||
# CONFIG_IFDTOOL_DISABLE_ME is not set
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
# CONFIG_STITCH_ME_BIN is not set
|
||||
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
||||
CONFIG_HAVE_INTEL_ME_HAP=y
|
||||
# CONFIG_INTEL_ME_DISABLED_HECI is not set
|
||||
# CONFIG_INTEL_ME_DISABLED_HAP is not set
|
||||
CONFIG_INTEL_ME_ENABLED=y
|
||||
CONFIG_INTEL_ME_DEFAULT_STATE=0
|
||||
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||
CONFIG_BIOS_VENDOR="3mdeb"
|
||||
|
||||
#
|
||||
# Dasharo
|
||||
#
|
||||
|
||||
#
|
||||
# Dasharo Configuration
|
||||
#
|
||||
# CONFIG_DASHARO_PREFER_S3_SLEEP is not set
|
||||
CONFIG_DASHARO_FIRMWARE_UPDATE_MODE=y
|
||||
# end of Dasharo Configuration
|
||||
|
||||
CONFIG_UDK_BASE=y
|
||||
# CONFIG_UDK_202005_BINDING is not set
|
||||
CONFIG_UDK_202302_BINDING=y
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_202005_VERSION=202005
|
||||
CONFIG_UDK_202302_VERSION=202302
|
||||
CONFIG_UDK_VERSION=202302
|
||||
CONFIG_ARCH_X86=y
|
||||
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
|
||||
CONFIG_X86_CUSTOM_BOOTMEDIA=y
|
||||
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
|
||||
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_POSTCAR_STAGE=y
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||
CONFIG_HAVE_CF9_RESET=y
|
||||
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
||||
CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
|
||||
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
||||
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
|
||||
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
|
||||
# end of Chipset
|
||||
|
||||
#
|
||||
# Devices
|
||||
#
|
||||
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_HAVE_FSP_GOP=y
|
||||
# CONFIG_VGA_ROM_RUN is not set
|
||||
CONFIG_RUN_FSP_GOP=y
|
||||
# CONFIG_NO_GFX_INIT is not set
|
||||
CONFIG_NO_EARLY_GFX_INIT=y
|
||||
|
||||
#
|
||||
# Display
|
||||
#
|
||||
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||
CONFIG_BOOTSPLASH=y
|
||||
# end of Display
|
||||
|
||||
CONFIG_PCI=y
|
||||
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
|
||||
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
|
||||
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
||||
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
||||
CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
|
||||
CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y
|
||||
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
|
||||
CONFIG_PCIEXP_HOTPLUG_IO=0x800
|
||||
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||
# CONFIG_SOFTWARE_I2C is not set
|
||||
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
|
||||
# end of Devices
|
||||
|
||||
#
|
||||
# Generic Drivers
|
||||
#
|
||||
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||
# CONFIG_ELOG is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||
CONFIG_MRC_CACHE_USING_MRC_VERSION=y
|
||||
# CONFIG_SMMSTORE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||
CONFIG_TPM_INIT_RAMSTAGE=y
|
||||
CONFIG_TPM_PPI=y
|
||||
CONFIG_DRIVERS_UART=y
|
||||
CONFIG_NO_UART_ON_SUPERIO=y
|
||||
CONFIG_DRIVERS_UART_8250MEM=y
|
||||
CONFIG_DRIVERS_UART_8250MEM_32=y
|
||||
# CONFIG_VPD is not set
|
||||
CONFIG_DRIVERS_GENERIC_BAYHUB_LV2=y
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
||||
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
||||
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||
CONFIG_DRIVERS_I2C_GENERIC=y
|
||||
CONFIG_DRIVERS_I2C_HID=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
||||
# CONFIG_DISPLAY_HOBS is not set
|
||||
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||
# CONFIG_BMP_LOGO is not set
|
||||
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||
CONFIG_PLATFORM_USES_FSP2_1=y
|
||||
CONFIG_PLATFORM_USES_FSP2_2=y
|
||||
CONFIG_PLATFORM_USES_FSP2_3=y
|
||||
CONFIG_PLATFORM_USES_FSP2_X86_32=y
|
||||
CONFIG_ADD_FSP_BINARIES=y
|
||||
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||
CONFIG_FSP_FULL_FD=y
|
||||
CONFIG_FSP_T_RESERVED_SIZE=0x0
|
||||
CONFIG_FSP_M_XIP=y
|
||||
CONFIG_FSP_USES_CB_STACK=y
|
||||
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
|
||||
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
|
||||
CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
|
||||
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
|
||||
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
|
||||
CONFIG_FSPS_HAS_ARCH_UPD=y
|
||||
CONFIG_FSPS_USE_MULTI_PHASE_INIT=y
|
||||
CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
|
||||
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
|
||||
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
|
||||
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
|
||||
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
|
||||
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
|
||||
CONFIG_INTEL_GMA_OPREGION_2_1=y
|
||||
CONFIG_INTEL_GMA_VERSION_2=y
|
||||
CONFIG_DRIVERS_INTEL_PMC=y
|
||||
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
||||
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_USE_PC_CMOS_ALTCENTURY=y
|
||||
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
|
||||
CONFIG_MEMORY_MAPPED_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||
CONFIG_DRIVERS_USB_ACPI=y
|
||||
CONFIG_DRIVERS_WIFI_GENERIC=y
|
||||
CONFIG_DRIVERS_MTK_WIFI=y
|
||||
CONFIG_MP_SERVICES_PPI=y
|
||||
CONFIG_MP_SERVICES_PPI_V2=y
|
||||
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
|
||||
# end of Generic Drivers
|
||||
|
||||
#
|
||||
# Security
|
||||
#
|
||||
|
||||
#
|
||||
# CBFS verification
|
||||
#
|
||||
# CONFIG_CBFS_VERIFICATION is not set
|
||||
# end of CBFS verification
|
||||
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
CONFIG_VBOOT_LIB=y
|
||||
# end of Verified Boot (vboot)
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
# CONFIG_TPM1 is not set
|
||||
CONFIG_TPM2=y
|
||||
CONFIG_TPM=y
|
||||
CONFIG_MAINBOARD_HAS_TPM2=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
CONFIG_TPM_RDRESP_NEED_DELAY=y
|
||||
# CONFIG_TPM_LOG_CB is not set
|
||||
CONFIG_TPM_LOG_TPM2=y
|
||||
# CONFIG_TPM_HASH_SHA1 is not set
|
||||
CONFIG_TPM_HASH_SHA256=y
|
||||
# CONFIG_TPM_HASH_SHA384 is not set
|
||||
# CONFIG_TPM_HASH_SHA512 is not set
|
||||
CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
|
||||
CONFIG_PCR_BOOT_MODE=1
|
||||
CONFIG_PCR_HWID=1
|
||||
CONFIG_PCR_SRTM=2
|
||||
CONFIG_PCR_FW_VER=10
|
||||
CONFIG_PCR_RUNTIME_DATA=3
|
||||
# end of Trusted Platform Module
|
||||
|
||||
#
|
||||
# Memory initialization
|
||||
#
|
||||
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||
# end of Memory initialization
|
||||
|
||||
# CONFIG_INTEL_TXT is not set
|
||||
# CONFIG_STM is not set
|
||||
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
||||
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
||||
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
||||
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
||||
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
||||
# end of Security
|
||||
|
||||
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
CONFIG_ACPI_SOC_NVS=y
|
||||
CONFIG_ACPI_CUSTOM_MADT=y
|
||||
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
|
||||
CONFIG_HAVE_ACPI_TABLES=y
|
||||
CONFIG_ACPI_LPIT=y
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||
CONFIG_RTC=y
|
||||
CONFIG_HEAP_SIZE=0x100000
|
||||
|
||||
#
|
||||
# Console
|
||||
#
|
||||
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||
CONFIG_POSTCAR_CONSOLE=y
|
||||
CONFIG_SQUELCH_EARLY_SMP=y
|
||||
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
||||
|
||||
#
|
||||
# memory mapped, 8250-compatible
|
||||
#
|
||||
CONFIG_TTYS0_BASE=0x3f8
|
||||
# CONFIG_CONSOLE_SERIAL_921600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_460800 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_230400 is not set
|
||||
CONFIG_CONSOLE_SERIAL_115200=y
|
||||
# CONFIG_CONSOLE_SERIAL_57600 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_38400 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_19200 is not set
|
||||
# CONFIG_CONSOLE_SERIAL_9600 is not set
|
||||
CONFIG_TTYS0_LCS=3
|
||||
# CONFIG_SPKMODEM is not set
|
||||
# CONFIG_CONSOLE_NE2K is not set
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||
# CONFIG_CONSOLE_I2C_SMBUS is not set
|
||||
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
||||
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
||||
# CONFIG_CMOS_POST is not set
|
||||
CONFIG_HWBASE_DEBUG_CB=y
|
||||
# end of Console
|
||||
|
||||
CONFIG_ACPI_S1_NOT_SUPPORTED=y
|
||||
CONFIG_HAVE_ACPI_RESUME=y
|
||||
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
CONFIG_IOAPIC=y
|
||||
|
||||
#
|
||||
# System tables
|
||||
#
|
||||
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
# end of System tables
|
||||
|
||||
#
|
||||
# Payload
|
||||
#
|
||||
# CONFIG_PAYLOAD_NONE is not set
|
||||
# CONFIG_PAYLOAD_ELF is not set
|
||||
# CONFIG_PAYLOAD_BOOTBOOT is not set
|
||||
# CONFIG_PAYLOAD_FILO is not set
|
||||
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||
# CONFIG_PAYLOAD_SEAGRUB is not set
|
||||
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
||||
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||
# CONFIG_PAYLOAD_UBOOT is not set
|
||||
# CONFIG_PAYLOAD_EDK2 is not set
|
||||
CONFIG_PAYLOAD_LINUX=y
|
||||
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
|
||||
CONFIG_PAYLOAD_OPTIONS=""
|
||||
# CONFIG_PXE is not set
|
||||
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
#
|
||||
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||
# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
|
||||
# end of Secondary Payloads
|
||||
# end of Payload
|
||||
|
||||
#
|
||||
# Debugging
|
||||
#
|
||||
|
||||
#
|
||||
# CPU Debug Settings
|
||||
#
|
||||
# CONFIG_DISPLAY_MTRRS is not set
|
||||
|
||||
#
|
||||
# Vendorcode Debug Settings
|
||||
#
|
||||
|
||||
#
|
||||
# BLOB Debug Settings
|
||||
#
|
||||
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||
# CONFIG_VERIFY_HOBS is not set
|
||||
# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
|
||||
CONFIG_DISPLAY_FSP_VERSION_INFO_2=y
|
||||
# CONFIG_ENABLE_FSP_ERROR_INFO is not set
|
||||
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
|
||||
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
|
||||
|
||||
#
|
||||
# General Debug Settings
|
||||
#
|
||||
# CONFIG_GDB_STUB is not set
|
||||
# CONFIG_FATAL_ASSERTS is not set
|
||||
CONFIG_HAVE_DEBUG_GPIO=y
|
||||
# CONFIG_DEBUG_GPIO is not set
|
||||
# CONFIG_DEBUG_CBFS is not set
|
||||
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
# CONFIG_DEBUG_SMBUS is not set
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
# CONFIG_DEBUG_ADA_CODE is not set
|
||||
CONFIG_HAVE_EM100_SUPPORT=y
|
||||
# CONFIG_EM100 is not set
|
||||
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
|
||||
# end of Debugging
|
||||
|
||||
CONFIG_SPD_READ_BY_WORD=y
|
||||
CONFIG_DECOMPRESS_OFAST=y
|
||||
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_RELOCATABLE_MODULES=y
|
||||
CONFIG_GENERIC_GPIO_LIB=y
|
||||
CONFIG_HAVE_BOOTBLOCK=y
|
||||
CONFIG_HAVE_ROMSTAGE=y
|
||||
CONFIG_HAVE_RAMSTAGE=y
|
||||
File diff suppressed because it is too large
Load Diff
@ -93,8 +93,7 @@ $(eval $(call coreboot_module,purism,24.02.01))
|
||||
|
||||
# MSI and Nitropad NV41 / NS50 boards are based on Dasharo coreboot port
|
||||
coreboot-dasharo_repo := https://github.com/dasharo/coreboot
|
||||
coreboot-dasharo_commit_hash := 3a9aa3a4692f3dd49732f5b4e3ec54be385f0969
|
||||
coreboot-dasharo_patch_version := unreleased
|
||||
coreboot-dasharo_commit_hash := db1d9cd59d0d7d5b708bbdf8670780914061410c
|
||||
$(eval $(call coreboot_module,dasharo,))
|
||||
|
||||
# Check that the board configured the coreboot version correctly
|
||||
|
||||
@ -1,27 +0,0 @@
|
||||
From 6cd77aa95a7ab46771874b72c7dba6b3600d9b29 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= <michal.zygowski@3mdeb.com>
|
||||
Date: Mon, 13 May 2024 09:31:27 +0200
|
||||
Subject: [PATCH] src/mainboard/clevo/adl-p/Kconfig: Add missing TPM PIRQ for
|
||||
NV41
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
|
||||
---
|
||||
src/mainboard/clevo/adl-p/Kconfig | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/mainboard/clevo/adl-p/Kconfig b/src/mainboard/clevo/adl-p/Kconfig
|
||||
index 6e4b679d4d1..e9bcf53c7be 100644
|
||||
--- a/src/mainboard/clevo/adl-p/Kconfig
|
||||
+++ b/src/mainboard/clevo/adl-p/Kconfig
|
||||
@@ -115,7 +115,7 @@ config FMDFILE
|
||||
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT && VBOOT_SLOTS_RW_A
|
||||
|
||||
config TPM_PIRQ
|
||||
- default 0x27 if BOARD_CLEVO_NS50PU_BASE # GPP_E1
|
||||
+ default 0x27 # GPP_E1
|
||||
|
||||
config SOC_INTEL_CSE_SEND_EOP_EARLY
|
||||
default n
|
||||
@ -1,37 +0,0 @@
|
||||
From b83a7607203d285b76e94ffd2013c55b184f5d42 Mon Sep 17 00:00:00 2001
|
||||
From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= <michal.zygowski@3mdeb.com>
|
||||
Date: Wed, 30 Oct 2024 10:50:37 +0100
|
||||
Subject: [PATCH] security/tpm/tspi/log-tpm1.c: Clear whole log area on
|
||||
creation
|
||||
MIME-Version: 1.0
|
||||
Content-Type: text/plain; charset=UTF-8
|
||||
Content-Transfer-Encoding: 8bit
|
||||
|
||||
The log area was not entirely cleared on creation resulting in
|
||||
garbage after the last valid lgo entry. It caused the cbmem utility
|
||||
to parse invalid events and access data outside the log area.
|
||||
In the TPM2 log sources, the entire area is being cleared, thus the
|
||||
issue has not been observed.
|
||||
|
||||
Change-Id: I7c780b62b1c6507e1dd1806b20b0270e364cde3d
|
||||
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
|
||||
---
|
||||
src/security/tpm/tspi/log-tpm1.c | 2 +-
|
||||
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||
|
||||
diff --git a/src/security/tpm/tspi/log-tpm1.c b/src/security/tpm/tspi/log-tpm1.c
|
||||
index 481b569cd5..453e74b4e8 100644
|
||||
--- a/src/security/tpm/tspi/log-tpm1.c
|
||||
+++ b/src/security/tpm/tspi/log-tpm1.c
|
||||
@@ -33,7 +33,7 @@ void *tpm1_log_cbmem_init(void)
|
||||
if (!tclt)
|
||||
return NULL;
|
||||
|
||||
- memset(tclt, 0, sizeof(*tclt));
|
||||
+ memset(tclt, 0, tpm_log_len);
|
||||
hdr = &tclt->spec_id;
|
||||
|
||||
/* Fill in first "header" entry. */
|
||||
--
|
||||
2.39.5
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user