mirror of
https://github.com/linuxboot/heads.git
synced 2024-12-19 21:17:55 +00:00
Start updating to coreboot 4.8.1
missing librem patches
This commit is contained in:
parent
72c42fa5ea
commit
c326ff62c7
@ -35,9 +35,7 @@ CONFIG_INCLUDE_CONFIG_FILE=y
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#
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# Important: Run 'make distclean' before switching boards
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#
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# CONFIG_VENDOR_A_TREND is not set
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# CONFIG_VENDOR_AAEON is not set
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# CONFIG_VENDOR_ABIT is not set
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# CONFIG_VENDOR_ADI is not set
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# CONFIG_VENDOR_ADLINK is not set
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# CONFIG_VENDOR_ADVANSUS is not set
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@ -48,18 +46,14 @@ CONFIG_INCLUDE_CONFIG_FILE=y
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# CONFIG_VENDOR_ASROCK is not set
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CONFIG_VENDOR_ASUS=y
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# CONFIG_VENDOR_AVALUE is not set
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# CONFIG_VENDOR_AZZA is not set
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# CONFIG_VENDOR_BACHMANN is not set
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# CONFIG_VENDOR_BAP is not set
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# CONFIG_VENDOR_BCOM is not set
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# CONFIG_VENDOR_BIOSTAR is not set
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# CONFIG_VENDOR_BROADCOM is not set
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# CONFIG_VENDOR_COMPAQ is not set
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# CONFIG_VENDOR_COMPULAB is not set
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# CONFIG_VENDOR_CUBIETECH is not set
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# CONFIG_VENDOR_DIGITALLOGIC is not set
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# CONFIG_VENDOR_DMP is not set
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# CONFIG_VENDOR_ECS is not set
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# CONFIG_VENDOR_ELMEX is not set
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# CONFIG_VENDOR_EMULATION is not set
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# CONFIG_VENDOR_ESD is not set
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@ -72,40 +66,34 @@ CONFIG_VENDOR_ASUS=y
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# CONFIG_VENDOR_IBASE is not set
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# CONFIG_VENDOR_IEI is not set
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# CONFIG_VENDOR_INTEL is not set
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# CONFIG_VENDOR_IWAVE is not set
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# CONFIG_VENDOR_IWILL is not set
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# CONFIG_VENDOR_JETWAY is not set
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# CONFIG_VENDOR_KONTRON is not set
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# CONFIG_VENDOR_LANNER is not set
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# CONFIG_VENDOR_LENOVO is not set
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# CONFIG_VENDOR_LINUTOP is not set
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# CONFIG_VENDOR_LIPPERT is not set
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# CONFIG_VENDOR_LOWRISC is not set
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# CONFIG_VENDOR_MITAC is not set
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# CONFIG_VENDOR_MSI is not set
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# CONFIG_VENDOR_NEC is not set
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# CONFIG_VENDOR_NOKIA is not set
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# CONFIG_VENDOR_NVIDIA is not set
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# CONFIG_VENDOR_OCP is not set
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# CONFIG_VENDOR_PACKARDBELL is not set
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# CONFIG_VENDOR_PCENGINES is not set
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# CONFIG_VENDOR_PURISM is not set
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# CONFIG_VENDOR_RCA is not set
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# CONFIG_VENDOR_RODA is not set
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# CONFIG_VENDOR_SAMSUNG is not set
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# CONFIG_VENDOR_SAPPHIRE is not set
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# CONFIG_VENDOR_SCALEWAY is not set
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# CONFIG_VENDOR_SIEMENS is not set
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# CONFIG_VENDOR_SOYO is not set
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# CONFIG_VENDOR_SIFIVE is not set
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# CONFIG_VENDOR_SUNW is not set
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# CONFIG_VENDOR_SUPERMICRO is not set
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# CONFIG_VENDOR_TECHNEXION is not set
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# CONFIG_VENDOR_THOMSON is not set
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# CONFIG_VENDOR_TI is not set
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# CONFIG_VENDOR_TRAVERSE is not set
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# CONFIG_VENDOR_TYAN is not set
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# CONFIG_VENDOR_VIA is not set
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# CONFIG_VENDOR_WINENT is not set
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# CONFIG_VENDOR_WINNET is not set
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# CONFIG_VENDOR_WYSE is not set
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CONFIG_BOARD_SPECIFIC_OPTIONS=y
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CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
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CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
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@ -134,7 +122,6 @@ CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
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# CONFIG_BOARD_ASUS_A8V_E_DELUXE is not set
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# CONFIG_BOARD_ASUS_A8V_E_SE is not set
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# CONFIG_BOARD_ASUS_AM1I_A is not set
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# CONFIG_BOARD_ASUS_DSBF is not set
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# CONFIG_BOARD_ASUS_F2A85_M is not set
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# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
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# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
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@ -150,8 +137,7 @@ CONFIG_BOARD_ASUS_KGPE_D16=y
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# CONFIG_BOARD_ASUS_M4A785M is not set
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# CONFIG_BOARD_ASUS_M4A785TM is not set
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# CONFIG_BOARD_ASUS_M5A88_V is not set
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# CONFIG_BOARD_ASUS_MEW_AM is not set
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# CONFIG_BOARD_ASUS_MEW_VM is not set
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# CONFIG_BOARD_ASUS_MAXIMUS_IV_GENE_Z is not set
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# CONFIG_BOARD_ASUS_P2B_D is not set
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# CONFIG_BOARD_ASUS_P2B_DS is not set
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# CONFIG_BOARD_ASUS_P2B_F is not set
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@ -159,7 +145,6 @@ CONFIG_BOARD_ASUS_KGPE_D16=y
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# CONFIG_BOARD_ASUS_P2B is not set
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# CONFIG_BOARD_ASUS_P3B_F is not set
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# CONFIG_BOARD_ASUS_P5GC_MX is not set
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CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
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CONFIG_POST_IO=y
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CONFIG_DEVICETREE="devicetree.cb"
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CONFIG_AGP_APERTURE_SIZE=0x4000000
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@ -167,7 +152,7 @@ CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
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CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
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CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL=y
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CONFIG_MAX_REBOOT_CNT=10
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CONFIG_ID_SECTION_OFFSET=0x80
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CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
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CONFIG_POST_DEVICE=y
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# CONFIG_VBOOT is not set
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CONFIG_TPM_PIRQ=0x0
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@ -185,6 +170,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
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CONFIG_DRIVERS_PS2_KEYBOARD=y
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CONFIG_PCIEXP_L1_SUB_STATE=y
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# CONFIG_NO_POST is not set
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CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
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CONFIG_BOARD_ROMSIZE_KB_2048=y
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# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
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# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
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@ -201,7 +187,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_16384=y
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# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
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CONFIG_COREBOOT_ROMSIZE_KB=16384
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CONFIG_ROM_SIZE=0x1000000
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# CONFIG_MAINBOARD_HAS_TPM2 is not set
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# CONFIG_SYSTEM_TYPE_LAPTOP is not set
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# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
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@ -235,7 +220,6 @@ CONFIG_TTYS0_BASE=0x2f8
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CONFIG_STACK_SIZE=0x1000
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CONFIG_CONSOLE_CBMEM=y
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CONFIG_UART_PCI_ADDR=0x0
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CONFIG_HPET_MIN_TICKS=0x14
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# CONFIG_SOC_INTEL_KABYLAKE is not set
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# CONFIG_SOC_LOWRISC_LOWRISC is not set
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# CONFIG_SOC_MARVELL_MVMAP2315 is not set
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@ -245,6 +229,7 @@ CONFIG_TTYS0_BAUD=115200
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# CONFIG_SOC_NVIDIA_TEGRA210 is not set
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# CONFIG_SOC_QC_IPQ40XX is not set
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# CONFIG_SOC_QC_IPQ806X is not set
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# CONFIG_SOC_QUALCOMM_SDM845 is not set
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# CONFIG_SOC_ROCKCHIP_RK3288 is not set
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# CONFIG_SOC_ROCKCHIP_RK3399 is not set
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# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
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@ -341,6 +326,7 @@ CONFIG_LIMIT_HT_UP_WIDTH_16=y
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# CONFIG_NORTHBRIDGE_AMD_PI is not set
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# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
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CONFIG_HPET_ADDRESS=0xfed00000
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CONFIG_HPET_MIN_TICKS=0x14
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CONFIG_MAX_PIRQ_LINKS=4
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#
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@ -363,6 +349,7 @@ CONFIG_SOUTHBRIDGE_AMD_SR5650=y
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# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
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# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
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# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
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# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
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#
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# Super I/O
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@ -378,6 +365,11 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y
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# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
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# CONFIG_UEFI_2_4_BINDING is not set
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# CONFIG_UDK_2015_BINDING is not set
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# CONFIG_UDK_2017_BINDING is not set
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CONFIG_UDK_2013_VERSION=2013
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CONFIG_UDK_2015_VERSION=2015
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CONFIG_UDK_2017_VERSION=2017
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CONFIG_UDK_VERSION=2013
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# CONFIG_USE_SIEMENS_HWILIB is not set
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# CONFIG_ARCH_ARM is not set
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# CONFIG_ARCH_BOOTBLOCK_ARM is not set
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@ -408,6 +400,8 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y
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# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
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# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
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# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
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CONFIG_ARCH_ARMV8_EXTENSION=0
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# CONFIG_ARM64_USE_ARCH_TIMER is not set
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# CONFIG_ARM64_A53_ERRATUM_843419 is not set
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# CONFIG_ARCH_MIPS is not set
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# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
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@ -420,6 +414,7 @@ CONFIG_SUPERIO_WINBOND_W83667HG_A=y
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# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
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# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
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# CONFIG_ARCH_RISCV is not set
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# CONFIG_ARCH_RISCV_COMPRESSED is not set
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# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
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# CONFIG_ARCH_VERSTAGE_RISCV is not set
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# CONFIG_ARCH_ROMSTAGE_RISCV is not set
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@ -447,21 +442,30 @@ CONFIG_HAVE_CMOS_DEFAULT=y
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CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
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CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
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# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
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CONFIG_ID_SECTION_OFFSET=0x80
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# CONFIG_POSTCAR_STAGE is not set
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# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
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# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
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CONFIG_BOOTBLOCK_SIMPLE=y
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# CONFIG_BOOTBLOCK_NORMAL is not set
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CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
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# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
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# CONFIG_IDT_IN_EVERY_STAGE is not set
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#
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# Devices
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#
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CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
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CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
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CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
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# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
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CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
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# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
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#
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# Display
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#
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CONFIG_VGA_TEXT_FRAMEBUFFER=y
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CONFIG_SMBUS_HAS_AUX_CHANNELS=y
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CONFIG_PCI=y
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CONFIG_MMCONF_SUPPORT=y
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@ -518,7 +522,9 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
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CONFIG_DRIVERS_ASPEED_AST2050=y
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CONFIG_DRIVERS_ASPEED_AST_COMMON=y
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# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
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# CONFIG_DRIVERS_I2C_MAX98373 is not set
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# CONFIG_DRIVERS_I2C_MAX98927 is not set
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# CONFIG_DRIVERS_I2C_PCA9538 is not set
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# CONFIG_DRIVERS_I2C_PCF8523 is not set
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# CONFIG_DRIVERS_I2C_RT5663 is not set
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# CONFIG_DRIVERS_I2C_RTD2132 is not set
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@ -527,11 +533,13 @@ CONFIG_DRIVERS_ASPEED_AST_COMMON=y
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# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
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# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
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CONFIG_DRIVERS_I2C_W83795=y
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# CONFIG_PLATFORM_USES_FSP2_0 is not set
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# CONFIG_INTEL_DDI is not set
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# CONFIG_INTEL_EDID is not set
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# CONFIG_INTEL_INT15 is not set
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# CONFIG_INTEL_GMA_ACPI is not set
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# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
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# CONFIG_INTEL_GMA_SWSMISCI is not set
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# CONFIG_DRIVER_INTEL_I210 is not set
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# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
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# CONFIG_DRIVERS_INTEL_WIFI is not set
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@ -541,12 +549,12 @@ CONFIG_DRIVERS_I2C_W83795=y
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# CONFIG_DRIVER_PARADE_PS8625 is not set
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# CONFIG_DRIVER_PARADE_PS8640 is not set
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CONFIG_DRIVERS_MC146818=y
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CONFIG_MAINBOARD_HAS_LPC_TPM=y
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CONFIG_LPC_TPM=y
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CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
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# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
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# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
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# CONFIG_TPM_DEACTIVATE is not set
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# CONFIG_TPM_RDRESP_NEED_DELAY is not set
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CONFIG_VGA=y
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# CONFIG_DRIVERS_RICOH_RCE822 is not set
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# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
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@ -567,6 +575,16 @@ CONFIG_VGA=y
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#
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# Verified Boot (vboot)
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#
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#
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# Trusted Platform Module
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#
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# CONFIG_TPM is not set
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CONFIG_TPM2=y
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# CONFIG_DEBUG_TPM is not set
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# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
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CONFIG_MAINBOARD_HAS_LPC_TPM=y
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# CONFIG_MAINBOARD_HAS_TPM2 is not set
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# CONFIG_ACPI_SATA_GENERATOR is not set
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# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
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# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
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@ -575,9 +593,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
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CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
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# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
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# CONFIG_RTC is not set
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# CONFIG_TPM is not set
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CONFIG_TPM2=y
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# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
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#
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# Console
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@ -669,6 +684,7 @@ CONFIG_PAYLOAD_OPTIONS=""
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CONFIG_LINUX_COMMAND_LINE="nohz=on console=ttyS1,115200n8 earlyprintk=ttyS1,115200"
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CONFIG_LINUX_INITRD="../../build/kgpe-d16/initrd.cpio.xz"
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# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
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CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
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#
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# Secondary Payloads
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@ -693,7 +709,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
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# CONFIG_DEBUG_SMBUS is not set
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# CONFIG_DEBUG_MALLOC is not set
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# CONFIG_DEBUG_ACPI is not set
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# CONFIG_DEBUG_TPM is not set
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# CONFIG_DEBUG_SPI_FLASH is not set
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# CONFIG_TRACE is not set
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# CONFIG_DEBUG_BOOT_STATE is not set
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@ -15,9 +15,11 @@ CONFIG_COMPILER_GCC=y
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# CONFIG_CCACHE is not set
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# CONFIG_FMD_GENPARSER is not set
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# CONFIG_UTIL_GENPARSER is not set
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# CONFIG_USE_OPTION_TABLE is not set
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CONFIG_COMPRESS_RAMSTAGE=y
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# CONFIG_INCLUDE_CONFIG_FILE is not set
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CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
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# CONFIG_USE_BLOBS is not set
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# CONFIG_COVERAGE is not set
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# CONFIG_UBSAN is not set
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@ -32,9 +34,7 @@ CONFIG_COLLECT_TIMESTAMPS=y
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#
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# Important: Run 'make distclean' before switching boards
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#
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# CONFIG_VENDOR_A_TREND is not set
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# CONFIG_VENDOR_AAEON is not set
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# CONFIG_VENDOR_ABIT is not set
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# CONFIG_VENDOR_ADI is not set
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# CONFIG_VENDOR_ADLINK is not set
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# CONFIG_VENDOR_ADVANSUS is not set
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@ -45,18 +45,14 @@ CONFIG_COLLECT_TIMESTAMPS=y
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# CONFIG_VENDOR_ASROCK is not set
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# CONFIG_VENDOR_ASUS is not set
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# CONFIG_VENDOR_AVALUE is not set
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# CONFIG_VENDOR_AZZA is not set
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# CONFIG_VENDOR_BACHMANN is not set
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# CONFIG_VENDOR_BAP is not set
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# CONFIG_VENDOR_BCOM is not set
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# CONFIG_VENDOR_BIOSTAR is not set
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# CONFIG_VENDOR_BROADCOM is not set
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# CONFIG_VENDOR_COMPAQ is not set
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# CONFIG_VENDOR_COMPULAB is not set
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# CONFIG_VENDOR_CUBIETECH is not set
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# CONFIG_VENDOR_DIGITALLOGIC is not set
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# CONFIG_VENDOR_DMP is not set
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# CONFIG_VENDOR_ECS is not set
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# CONFIG_VENDOR_ELMEX is not set
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CONFIG_VENDOR_EMULATION=y
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# CONFIG_VENDOR_ESD is not set
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@ -69,40 +65,34 @@ CONFIG_VENDOR_EMULATION=y
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# CONFIG_VENDOR_IBASE is not set
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# CONFIG_VENDOR_IEI is not set
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# CONFIG_VENDOR_INTEL is not set
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# CONFIG_VENDOR_IWAVE is not set
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# CONFIG_VENDOR_IWILL is not set
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# CONFIG_VENDOR_JETWAY is not set
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# CONFIG_VENDOR_KONTRON is not set
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# CONFIG_VENDOR_LANNER is not set
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# CONFIG_VENDOR_LENOVO is not set
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# CONFIG_VENDOR_LINUTOP is not set
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# CONFIG_VENDOR_LIPPERT is not set
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# CONFIG_VENDOR_LOWRISC is not set
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# CONFIG_VENDOR_MITAC is not set
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# CONFIG_VENDOR_MSI is not set
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# CONFIG_VENDOR_NEC is not set
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# CONFIG_VENDOR_NOKIA is not set
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# CONFIG_VENDOR_NVIDIA is not set
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# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="emulation/qemu-q35"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 q35/ich9"
|
||||
@ -117,12 +107,10 @@ CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||
CONFIG_DCACHE_RAM_BASE=0xd0000
|
||||
CONFIG_DCACHE_RAM_SIZE=0x10000
|
||||
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Emulation"
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xb0000000
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/emulation/qemu-q35/bootblock.c"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
|
||||
# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
|
||||
@ -130,6 +118,7 @@ CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y
|
||||
# CONFIG_BOARD_EMULATION_QEMU_UCB_RISCV is not set
|
||||
# CONFIG_BOARD_EMULATION_SPIKE_UCB_RISCV is not set
|
||||
CONFIG_BOARD_EMULATION_QEMU_X86=y
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xb0000000
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_FMDFILE=""
|
||||
@ -143,6 +132,7 @@ CONFIG_MAINBOARD_VERSION="1.0"
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x03
|
||||
CONFIG_BOARD_ROMSIZE_KB_2048=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -159,7 +149,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=8192
|
||||
CONFIG_ROM_SIZE=0x800000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
# CONFIG_SYSTEM_TYPE_LAPTOP is not set
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
@ -188,7 +177,6 @@ CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801ix/bootblock.c"
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
@ -197,6 +185,7 @@ CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
@ -256,6 +245,7 @@ CONFIG_CPU_UCODE_BINARIES=""
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
@ -271,6 +261,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
|
||||
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
|
||||
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM is not set
|
||||
CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
|
||||
|
||||
#
|
||||
@ -285,6 +276,11 @@ CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_UDK_2017_BINDING is not set
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2013
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
@ -315,6 +311,8 @@ CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
@ -327,6 +325,7 @@ CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_RISCV_COMPRESSED is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
@ -350,13 +349,19 @@ CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||
CONFIG_PC80_SYSTEM=y
|
||||
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
|
||||
# CONFIG_HAVE_CMOS_DEFAULT is not set
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS=y
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
# CONFIG_COLLECT_TIMESTAMPS_NO_TSC is not set
|
||||
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -414,18 +419,22 @@ CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
|
||||
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
# CONFIG_DRIVERS_I2C_RX6110SA is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_PLATFORM_USES_FSP2_0 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
# CONFIG_INTEL_EDID is not set
|
||||
# CONFIG_INTEL_INT15 is not set
|
||||
# CONFIG_INTEL_GMA_ACPI is not set
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
# CONFIG_DRIVER_INTEL_I210 is not set
|
||||
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
|
||||
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
@ -435,7 +444,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
CONFIG_VGA=y
|
||||
# CONFIG_DRIVERS_RICOH_RCE822 is not set
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
@ -455,6 +463,14 @@ CONFIG_VGA=y
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
# CONFIG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
# CONFIG_ACPI_SATA_GENERATOR is not set
|
||||
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -463,8 +479,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
# CONFIG_RTC is not set
|
||||
# CONFIG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
@ -499,7 +513,7 @@ CONFIG_HAVE_HARD_RESET=y
|
||||
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
|
||||
# CONFIG_HAVE_MONOTONIC_TIMER is not set
|
||||
# CONFIG_HAVE_OPTION_TABLE is not set
|
||||
CONFIG_HAVE_OPTION_TABLE=y
|
||||
# CONFIG_PIRQ_ROUTE is not set
|
||||
CONFIG_HAVE_SMI_HANDLER=y
|
||||
# CONFIG_PCI_IO_CFG_EXT is not set
|
||||
@ -535,6 +549,7 @@ CONFIG_PAYLOAD_OPTIONS=""
|
||||
CONFIG_LINUX_COMMAND_LINE=""
|
||||
CONFIG_LINUX_INITRD="../../build/qemu-coreboot/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
|
@ -23,6 +23,7 @@ CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
@ -34,9 +35,7 @@ CONFIG_MEASURED_BOOT=y
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
@ -47,18 +46,14 @@ CONFIG_MEASURED_BOOT=y
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
@ -71,40 +66,34 @@ CONFIG_MEASURED_BOOT=y
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="lenovo/x220"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
|
||||
@ -124,12 +113,11 @@ CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21db
|
||||
CONFIG_HAVE_IFD_BIN=y
|
||||
CONFIG_HAVE_ME_BIN=y
|
||||
CONFIG_DRAM_RESET_GATE_GPIO=10
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_HAVE_GBE_BIN=y
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
|
||||
# CONFIG_VBOOT is not set
|
||||
CONFIG_TPM_PIRQ=0x0
|
||||
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||
@ -149,6 +137,7 @@ CONFIG_ME_BIN_PATH="../../blobs/x220/me.bin"
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_W520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
@ -160,12 +149,14 @@ CONFIG_BOARD_LENOVO_X220=y
|
||||
# CONFIG_BOARD_LENOVO_X230 is not set
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
# CONFIG_BOARD_LENOVO_BASEBOARD_T520 is not set
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
CONFIG_NO_POST=y
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_BOARD_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -182,7 +173,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_8192=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=8192
|
||||
CONFIG_ROM_SIZE=0x800000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
@ -200,6 +190,7 @@ CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
|
||||
@ -211,6 +202,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
# CONFIG_BUILD_WITH_FAKE_IFD is not set
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
@ -220,7 +212,6 @@ CONFIG_CACHE_MRC_SIZE_KB=512
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0x0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
@ -229,6 +220,7 @@ CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
@ -296,8 +288,7 @@ CONFIG_CPU_UCODE_BINARIES=""
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
|
||||
CONFIG_MRC_CACHE_SIZE=0x10000
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
@ -305,6 +296,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
@ -325,6 +317,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
@ -356,6 +349,11 @@ CONFIG_GBE_BIN_PATH="../../blobs/x220/gbe.bin"
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_UDK_2017_BINDING is not set
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2013
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
@ -386,6 +384,8 @@ CONFIG_GBE_BIN_PATH="../../blobs/x220/gbe.bin"
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
@ -398,6 +398,7 @@ CONFIG_GBE_BIN_PATH="../../blobs/x220/gbe.bin"
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_RISCV_COMPRESSED is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
@ -425,12 +426,15 @@ CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -472,6 +476,13 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@ -506,7 +517,9 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
@ -514,11 +527,13 @@ CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_PLATFORM_USES_FSP2_0 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Sandybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
@ -535,12 +550,12 @@ CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
@ -560,6 +575,15 @@ CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -568,8 +592,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
@ -638,6 +660,7 @@ CONFIG_PAYLOAD_OPTIONS=""
|
||||
CONFIG_LINUX_COMMAND_LINE="quiet"
|
||||
CONFIG_LINUX_INITRD="../../build/x220/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
@ -661,7 +684,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
CONFIG_DEBUG_SMM_RELOCATION=y
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
|
@ -23,6 +23,7 @@ CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
@ -34,9 +35,7 @@ CONFIG_MEASURED_BOOT=y
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
@ -47,18 +46,14 @@ CONFIG_MEASURED_BOOT=y
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
@ -71,40 +66,34 @@ CONFIG_MEASURED_BOOT=y
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="lenovo/x230"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
|
||||
@ -125,12 +114,11 @@ CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
|
||||
# CONFIG_HAVE_IFD_BIN is not set
|
||||
# CONFIG_HAVE_ME_BIN is not set
|
||||
CONFIG_DRAM_RESET_GATE_GPIO=10
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
|
||||
CONFIG_POST_IO=y
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_IFD_BIOS_SECTION=""
|
||||
CONFIG_IFD_ME_SECTION=""
|
||||
@ -153,6 +141,7 @@ CONFIG_IFD_GBE_SECTION=""
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_W520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
@ -164,12 +153,14 @@ CONFIG_IFD_GBE_SECTION=""
|
||||
CONFIG_BOARD_LENOVO_X230=y
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
# CONFIG_BOARD_LENOVO_BASEBOARD_T520 is not set
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -186,7 +177,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0xc00000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
@ -204,6 +194,7 @@ CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
|
||||
@ -215,6 +206,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
CONFIG_BUILD_WITH_FAKE_IFD=y
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
@ -225,7 +217,6 @@ CONFIG_TTYS0_BASE=0x3f8
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
@ -235,6 +226,7 @@ CONFIG_TTYS0_BAUD=115200
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
@ -302,8 +294,7 @@ CONFIG_CPU_UCODE_BINARIES=""
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
|
||||
CONFIG_MRC_CACHE_SIZE=0x10000
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
@ -311,6 +302,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
@ -331,6 +323,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
@ -358,6 +351,11 @@ CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_UDK_2017_BINDING is not set
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2013
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
@ -388,6 +386,8 @@ CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
@ -400,6 +400,7 @@ CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_RISCV_COMPRESSED is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
@ -427,12 +428,15 @@ CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -474,6 +478,13 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@ -509,7 +520,9 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
@ -517,11 +530,13 @@ CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_PLATFORM_USES_FSP2_0 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Ivybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
@ -538,12 +553,12 @@ CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
@ -563,6 +578,15 @@ CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -571,8 +595,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
@ -659,6 +681,7 @@ CONFIG_PAYLOAD_OPTIONS=""
|
||||
CONFIG_LINUX_COMMAND_LINE=""
|
||||
CONFIG_LINUX_INITRD="../../build/x230-flash/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
@ -683,7 +706,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
CONFIG_DEBUG_SMM_RELOCATION=y
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
|
@ -23,6 +23,7 @@ CONFIG_USE_BLOBS=y
|
||||
# CONFIG_COVERAGE is not set
|
||||
# CONFIG_UBSAN is not set
|
||||
CONFIG_RELOCATABLE_RAMSTAGE=y
|
||||
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
|
||||
# CONFIG_UPDATE_IMAGE is not set
|
||||
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||
CONFIG_MEASURED_BOOT=y
|
||||
@ -34,9 +35,7 @@ CONFIG_MEASURED_BOOT=y
|
||||
#
|
||||
# Important: Run 'make distclean' before switching boards
|
||||
#
|
||||
# CONFIG_VENDOR_A_TREND is not set
|
||||
# CONFIG_VENDOR_AAEON is not set
|
||||
# CONFIG_VENDOR_ABIT is not set
|
||||
# CONFIG_VENDOR_ADI is not set
|
||||
# CONFIG_VENDOR_ADLINK is not set
|
||||
# CONFIG_VENDOR_ADVANSUS is not set
|
||||
@ -47,18 +46,14 @@ CONFIG_MEASURED_BOOT=y
|
||||
# CONFIG_VENDOR_ASROCK is not set
|
||||
# CONFIG_VENDOR_ASUS is not set
|
||||
# CONFIG_VENDOR_AVALUE is not set
|
||||
# CONFIG_VENDOR_AZZA is not set
|
||||
# CONFIG_VENDOR_BACHMANN is not set
|
||||
# CONFIG_VENDOR_BAP is not set
|
||||
# CONFIG_VENDOR_BCOM is not set
|
||||
# CONFIG_VENDOR_BIOSTAR is not set
|
||||
# CONFIG_VENDOR_BROADCOM is not set
|
||||
# CONFIG_VENDOR_COMPAQ is not set
|
||||
# CONFIG_VENDOR_COMPULAB is not set
|
||||
# CONFIG_VENDOR_CUBIETECH is not set
|
||||
# CONFIG_VENDOR_DIGITALLOGIC is not set
|
||||
# CONFIG_VENDOR_DMP is not set
|
||||
# CONFIG_VENDOR_ECS is not set
|
||||
# CONFIG_VENDOR_ELMEX is not set
|
||||
# CONFIG_VENDOR_EMULATION is not set
|
||||
# CONFIG_VENDOR_ESD is not set
|
||||
@ -71,40 +66,34 @@ CONFIG_MEASURED_BOOT=y
|
||||
# CONFIG_VENDOR_IBASE is not set
|
||||
# CONFIG_VENDOR_IEI is not set
|
||||
# CONFIG_VENDOR_INTEL is not set
|
||||
# CONFIG_VENDOR_IWAVE is not set
|
||||
# CONFIG_VENDOR_IWILL is not set
|
||||
# CONFIG_VENDOR_JETWAY is not set
|
||||
# CONFIG_VENDOR_KONTRON is not set
|
||||
# CONFIG_VENDOR_LANNER is not set
|
||||
CONFIG_VENDOR_LENOVO=y
|
||||
# CONFIG_VENDOR_LINUTOP is not set
|
||||
# CONFIG_VENDOR_LIPPERT is not set
|
||||
# CONFIG_VENDOR_LOWRISC is not set
|
||||
# CONFIG_VENDOR_MITAC is not set
|
||||
# CONFIG_VENDOR_MSI is not set
|
||||
# CONFIG_VENDOR_NEC is not set
|
||||
# CONFIG_VENDOR_NOKIA is not set
|
||||
# CONFIG_VENDOR_NVIDIA is not set
|
||||
# CONFIG_VENDOR_OCP is not set
|
||||
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||
# CONFIG_VENDOR_PCENGINES is not set
|
||||
# CONFIG_VENDOR_PURISM is not set
|
||||
# CONFIG_VENDOR_RCA is not set
|
||||
# CONFIG_VENDOR_RODA is not set
|
||||
# CONFIG_VENDOR_SAMSUNG is not set
|
||||
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||
# CONFIG_VENDOR_SCALEWAY is not set
|
||||
# CONFIG_VENDOR_SIEMENS is not set
|
||||
# CONFIG_VENDOR_SOYO is not set
|
||||
# CONFIG_VENDOR_SIFIVE is not set
|
||||
# CONFIG_VENDOR_SUNW is not set
|
||||
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||
# CONFIG_VENDOR_TECHNEXION is not set
|
||||
# CONFIG_VENDOR_THOMSON is not set
|
||||
# CONFIG_VENDOR_TI is not set
|
||||
# CONFIG_VENDOR_TRAVERSE is not set
|
||||
# CONFIG_VENDOR_TYAN is not set
|
||||
# CONFIG_VENDOR_VIA is not set
|
||||
# CONFIG_VENDOR_WINENT is not set
|
||||
# CONFIG_VENDOR_WINNET is not set
|
||||
# CONFIG_VENDOR_WYSE is not set
|
||||
CONFIG_BOARD_SPECIFIC_OPTIONS=y
|
||||
CONFIG_MAINBOARD_DIR="lenovo/x230"
|
||||
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
|
||||
@ -124,12 +113,11 @@ CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
|
||||
# CONFIG_HAVE_IFD_BIN is not set
|
||||
# CONFIG_HAVE_ME_BIN is not set
|
||||
CONFIG_DRAM_RESET_GATE_GPIO=10
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
|
||||
# CONFIG_POST_IO is not set
|
||||
CONFIG_DEVICETREE="devicetree.cb"
|
||||
CONFIG_MAX_REBOOT_CNT=3
|
||||
CONFIG_USBDEBUG_HCD_INDEX=2
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
CONFIG_MMCONF_BASE_ADDRESS=0xf0000000
|
||||
# CONFIG_POST_DEVICE is not set
|
||||
CONFIG_IFD_BIOS_SECTION=""
|
||||
CONFIG_IFD_ME_SECTION=""
|
||||
@ -151,6 +139,7 @@ CONFIG_IFD_GBE_SECTION=""
|
||||
# CONFIG_BOARD_LENOVO_T430S is not set
|
||||
# CONFIG_BOARD_LENOVO_T500 is not set
|
||||
# CONFIG_BOARD_LENOVO_T520 is not set
|
||||
# CONFIG_BOARD_LENOVO_W520 is not set
|
||||
# CONFIG_BOARD_LENOVO_T530 is not set
|
||||
# CONFIG_BOARD_LENOVO_T60 is not set
|
||||
# CONFIG_BOARD_LENOVO_X131E is not set
|
||||
@ -162,12 +151,14 @@ CONFIG_IFD_GBE_SECTION=""
|
||||
CONFIG_BOARD_LENOVO_X230=y
|
||||
# CONFIG_BOARD_LENOVO_X60 is not set
|
||||
# CONFIG_BOARD_LENOVO_Z61T is not set
|
||||
# CONFIG_BOARD_LENOVO_BASEBOARD_T520 is not set
|
||||
CONFIG_CPU_ADDR_BITS=36
|
||||
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5
|
||||
# CONFIG_USBDEBUG is not set
|
||||
CONFIG_DRIVERS_PS2_KEYBOARD=y
|
||||
# CONFIG_PCIEXP_L1_SUB_STATE is not set
|
||||
# CONFIG_NO_POST is not set
|
||||
CONFIG_SMBIOS_ENCLOSURE_TYPE=0x09
|
||||
CONFIG_BOARD_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
|
||||
@ -184,7 +175,6 @@ CONFIG_COREBOOT_ROMSIZE_KB_12288=y
|
||||
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||
CONFIG_COREBOOT_ROMSIZE_KB=12288
|
||||
CONFIG_ROM_SIZE=0xc00000
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
|
||||
|
||||
@ -202,6 +192,7 @@ CONFIG_RAMBASE=0x100000
|
||||
CONFIG_EHCI_BAR=0xfef00000
|
||||
CONFIG_SERIRQ_CONTINUOUS_MODE=y
|
||||
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||
CONFIG_SMM_RESERVED_SIZE=0x100000
|
||||
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
|
||||
# CONFIG_SOC_BROADCOM_CYGNUS is not set
|
||||
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
|
||||
@ -213,6 +204,7 @@ CONFIG_VERSTAGE_ADDR=0x2000000
|
||||
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
|
||||
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
|
||||
CONFIG_BUILD_WITH_FAKE_IFD=y
|
||||
CONFIG_IED_REGION_SIZE=0x400000
|
||||
CONFIG_PCIEXP_ASPM=y
|
||||
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||
# CONFIG_PCIEXP_CLK_PM is not set
|
||||
@ -222,7 +214,6 @@ CONFIG_CACHE_MRC_SIZE_KB=512
|
||||
CONFIG_STACK_SIZE=0x1000
|
||||
CONFIG_CONSOLE_CBMEM=y
|
||||
CONFIG_UART_PCI_ADDR=0
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_INTEL_KABYLAKE is not set
|
||||
# CONFIG_SOC_LOWRISC_LOWRISC is not set
|
||||
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
|
||||
@ -231,6 +222,7 @@ CONFIG_HPET_MIN_TICKS=0x80
|
||||
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
|
||||
# CONFIG_SOC_QC_IPQ40XX is not set
|
||||
# CONFIG_SOC_QC_IPQ806X is not set
|
||||
# CONFIG_SOC_QUALCOMM_SDM845 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
|
||||
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
|
||||
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
|
||||
@ -298,8 +290,7 @@ CONFIG_CPU_UCODE_BINARIES=""
|
||||
# CONFIG_AMD_NB_CIMX is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
|
||||
# CONFIG_NORTHBRIDGE_AMD_PI is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
|
||||
CONFIG_MRC_CACHE_SIZE=0x10000
|
||||
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
|
||||
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
|
||||
CONFIG_USE_NATIVE_RAMINIT=y
|
||||
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
|
||||
@ -307,6 +298,7 @@ CONFIG_USE_NATIVE_RAMINIT=y
|
||||
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
|
||||
CONFIG_IF_NATIVE_VGA_INIT=y
|
||||
CONFIG_HPET_ADDRESS=0xfed00000
|
||||
CONFIG_HPET_MIN_TICKS=0x80
|
||||
CONFIG_MAX_PIRQ_LINKS=4
|
||||
|
||||
#
|
||||
@ -327,6 +319,7 @@ CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
|
||||
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
|
||||
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMM=y
|
||||
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
|
||||
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||
|
||||
@ -354,6 +347,11 @@ CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
|
||||
# CONFIG_UEFI_2_4_BINDING is not set
|
||||
# CONFIG_UDK_2015_BINDING is not set
|
||||
# CONFIG_UDK_2017_BINDING is not set
|
||||
CONFIG_UDK_2013_VERSION=2013
|
||||
CONFIG_UDK_2015_VERSION=2015
|
||||
CONFIG_UDK_2017_VERSION=2017
|
||||
CONFIG_UDK_VERSION=2013
|
||||
# CONFIG_USE_SIEMENS_HWILIB is not set
|
||||
# CONFIG_ARCH_ARM is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
|
||||
@ -384,6 +382,8 @@ CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
|
||||
CONFIG_ARCH_ARMV8_EXTENSION=0
|
||||
# CONFIG_ARM64_USE_ARCH_TIMER is not set
|
||||
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
|
||||
# CONFIG_ARCH_MIPS is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
|
||||
@ -396,6 +396,7 @@ CONFIG_IFD_PLATFORM_SECTION=""
|
||||
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
|
||||
# CONFIG_ARCH_RISCV is not set
|
||||
# CONFIG_ARCH_RISCV_COMPRESSED is not set
|
||||
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
|
||||
# CONFIG_ARCH_VERSTAGE_RISCV is not set
|
||||
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
|
||||
@ -423,12 +424,15 @@ CONFIG_HAVE_CMOS_DEFAULT=y
|
||||
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
|
||||
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
|
||||
CONFIG_ID_SECTION_OFFSET=0x80
|
||||
# CONFIG_POSTCAR_STAGE is not set
|
||||
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
|
||||
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
|
||||
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
|
||||
# CONFIG_PAGING_IN_CACHE_AS_RAM is not set
|
||||
# CONFIG_IDT_IN_EVERY_STAGE is not set
|
||||
|
||||
#
|
||||
# Devices
|
||||
@ -470,6 +474,13 @@ CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||
# CONFIG_GIC is not set
|
||||
# CONFIG_IPMI_KCS is not set
|
||||
# CONFIG_DRIVERS_LENOVO_WACOM is not set
|
||||
CONFIG_CACHE_MRC_SETTINGS=y
|
||||
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||
# CONFIG_MRC_SETTINGS_PROTECT is not set
|
||||
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
|
||||
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
|
||||
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
|
||||
# CONFIG_MRC_WRITE_NV_LATE is not set
|
||||
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
|
||||
# CONFIG_RT8168_SET_LED_MODE is not set
|
||||
CONFIG_SPI_FLASH=y
|
||||
@ -505,7 +516,9 @@ CONFIG_HAVE_USBDEBUG=y
|
||||
CONFIG_HAVE_USBDEBUG_OPTIONS=y
|
||||
# CONFIG_DRIVERS_AMD_PI is not set
|
||||
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_DRIVERS_I2C_MAX98373 is not set
|
||||
# CONFIG_DRIVERS_I2C_MAX98927 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCA9538 is not set
|
||||
# CONFIG_DRIVERS_I2C_PCF8523 is not set
|
||||
# CONFIG_DRIVERS_I2C_RT5663 is not set
|
||||
# CONFIG_DRIVERS_I2C_RTD2132 is not set
|
||||
@ -513,11 +526,13 @@ CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
|
||||
# CONFIG_I2C_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
|
||||
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
|
||||
# CONFIG_PLATFORM_USES_FSP2_0 is not set
|
||||
# CONFIG_INTEL_DDI is not set
|
||||
CONFIG_INTEL_EDID=y
|
||||
CONFIG_INTEL_INT15=y
|
||||
CONFIG_INTEL_GMA_ACPI=y
|
||||
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
|
||||
# CONFIG_INTEL_GMA_SWSMISCI is not set
|
||||
CONFIG_GFX_GMA=y
|
||||
CONFIG_GFX_GMA_CPU="Ivybridge"
|
||||
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
|
||||
@ -534,12 +549,12 @@ CONFIG_DRIVERS_INTEL_WIFI=y
|
||||
# CONFIG_DRIVER_PARADE_PS8625 is not set
|
||||
# CONFIG_DRIVER_PARADE_PS8640 is not set
|
||||
CONFIG_DRIVERS_MC146818=y
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
CONFIG_LPC_TPM=y
|
||||
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
|
||||
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
|
||||
# CONFIG_TPM_DEACTIVATE is not set
|
||||
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||
CONFIG_VGA=y
|
||||
CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
|
||||
@ -559,6 +574,15 @@ CONFIG_DRIVERS_RICOH_RCE822=y
|
||||
#
|
||||
# Verified Boot (vboot)
|
||||
#
|
||||
|
||||
#
|
||||
# Trusted Platform Module
|
||||
#
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
CONFIG_MAINBOARD_HAS_LPC_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM2 is not set
|
||||
CONFIG_ACPI_SATA_GENERATOR=y
|
||||
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
|
||||
@ -567,8 +591,6 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
|
||||
CONFIG_RTC=y
|
||||
CONFIG_TPM=y
|
||||
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
|
||||
|
||||
#
|
||||
# Console
|
||||
@ -640,6 +662,7 @@ CONFIG_PAYLOAD_OPTIONS=""
|
||||
CONFIG_LINUX_COMMAND_LINE="quiet"
|
||||
CONFIG_LINUX_INITRD="../../build/x230/initrd.cpio.xz"
|
||||
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
|
||||
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||
|
||||
#
|
||||
# Secondary Payloads
|
||||
@ -663,7 +686,6 @@ CONFIG_HAVE_DEBUG_SMBUS=y
|
||||
CONFIG_DEBUG_SMM_RELOCATION=y
|
||||
# CONFIG_DEBUG_MALLOC is not set
|
||||
# CONFIG_DEBUG_ACPI is not set
|
||||
# CONFIG_DEBUG_TPM is not set
|
||||
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||
# CONFIG_TRACE is not set
|
||||
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||
|
@ -2,12 +2,12 @@ modules-$(CONFIG_COREBOOT) += coreboot
|
||||
|
||||
#coreboot_version := git
|
||||
#coreboot_repo := https://github.com/osresearch/coreboot
|
||||
coreboot_version := 4.7
|
||||
coreboot_version := 4.8.1
|
||||
coreboot_base_dir := coreboot-$(coreboot_version)
|
||||
coreboot_dir := $(coreboot_base_dir)/$(BOARD)
|
||||
coreboot_tar := coreboot-$(coreboot_version).tar.xz
|
||||
coreboot_url := https://www.coreboot.org/releases/$(coreboot_tar)
|
||||
coreboot_hash := d68a83f8f687e8ea212b8c5bb501e24444b57c3f73896042d09628188c851368
|
||||
coreboot_hash := f0ddf4db0628c1fe1e8348c40084d9cbeb5771400c963fd419cda3995b69ad23
|
||||
|
||||
# Coreboot builds are specialized on a per-target basis.
|
||||
# The builds are done in a per-target subdirectory
|
||||
@ -79,7 +79,7 @@ coreboot-blobs_version := $(coreboot_version)
|
||||
coreboot-blobs_tar := coreboot-blobs-$(coreboot-blobs_version).tar.xz
|
||||
coreboot-blobs_dir := coreboot-$(coreboot-blobs_version)/3rdparty/blobs
|
||||
coreboot-blobs_url := https://www.coreboot.org/releases/$(coreboot-blobs_tar)
|
||||
coreboot-blobs_hash := 443379a2207e350747cbbfe7968ceafddc7dd8563b067476f755ff11791bb5f5
|
||||
coreboot-blobs_hash := 18aa509ae3af005a05d7b1e0b0246dc640249c14fc828f5144b6fd20bb10e295
|
||||
|
||||
## there is nothing to build for the blobs, this should be
|
||||
## made easier to make happen
|
||||
|
474
patches/coreboot-4.8.1/0000-measuredboot.patch
Normal file
474
patches/coreboot-4.8.1/0000-measuredboot.patch
Normal file
@ -0,0 +1,474 @@
|
||||
diff --git ./src/Kconfig ./src/Kconfig
|
||||
index 99a704d..004b4a7 100644
|
||||
--- ./src/Kconfig
|
||||
+++ ./src/Kconfig
|
||||
@@ -260,6 +260,21 @@ config BOOTSPLASH_FILE
|
||||
The path and filename of the file to use as graphical bootsplash
|
||||
screen. The file format has to be jpg.
|
||||
|
||||
+config MEASURED_BOOT
|
||||
+ bool "Enable TPM measured boot"
|
||||
+ default n
|
||||
+ select TPM
|
||||
+ depends on MAINBOARD_HAS_LPC_TPM
|
||||
+ depends on !VBOOT
|
||||
+ help
|
||||
+ Enable this option to measure the bootblock, romstage and
|
||||
+ CBFS files into TPM PCRs. This does not verify these values
|
||||
+ (that is the job of something like vboot), but makes it possible
|
||||
+ for the payload to validate the boot path and allow something
|
||||
+ like Heads to attest to the user that the system is likely safe.
|
||||
+
|
||||
+ You probably want to say N.
|
||||
+
|
||||
endmenu
|
||||
|
||||
menu "Mainboard"
|
||||
diff --git ./src/drivers/pc80/tpm/romstage.c ./src/drivers/pc80/tpm/romstage.c
|
||||
index b8e4705..7732e66 100644
|
||||
--- ./src/drivers/pc80/tpm/romstage.c
|
||||
+++ ./src/drivers/pc80/tpm/romstage.c
|
||||
@@ -48,6 +48,12 @@ static const struct {
|
||||
|
||||
static const struct {
|
||||
u8 buffer[12];
|
||||
+} tpm2_startup_cmd = {
|
||||
+ {0x80, 0x01, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x01, 0x44, 0x0, 0x0 }
|
||||
+};
|
||||
+
|
||||
+static const struct {
|
||||
+ u8 buffer[12];
|
||||
} tpm_deactivate_cmd = {
|
||||
{0x0, 0xc1, 0x0, 0x0, 0x0, 0xc, 0x0, 0x0, 0x0, 0x99, 0x0, 0x3 }
|
||||
};
|
||||
@@ -229,9 +235,15 @@ void init_tpm(int s3resume)
|
||||
return;
|
||||
}
|
||||
} else {
|
||||
- printk(BIOS_SPEW, "TPM: Startup\n");
|
||||
- result = TlclSendReceive(tpm_startup_cmd.buffer,
|
||||
- response, sizeof(response));
|
||||
+ if (IS_ENABLED(CONFIG_TPM2)) {
|
||||
+ printk(BIOS_SPEW, "TPM2: Startup\n");
|
||||
+ result = TlclSendReceive(tpm2_startup_cmd.buffer,
|
||||
+ response, sizeof(response));
|
||||
+ } else {
|
||||
+ printk(BIOS_SPEW, "TPM: Startup\n");
|
||||
+ result = TlclSendReceive(tpm_startup_cmd.buffer,
|
||||
+ response, sizeof(response));
|
||||
+ }
|
||||
}
|
||||
|
||||
tis_close();
|
||||
diff --git ./src/drivers/pc80/tpm/tis.c ./src/drivers/pc80/tpm/tis.c
|
||||
index 3549173..11fc027 100644
|
||||
--- ./src/drivers/pc80/tpm/tis.c
|
||||
+++ ./src/drivers/pc80/tpm/tis.c
|
||||
@@ -125,10 +125,11 @@ static const struct device_name atmel_devices[] = {
|
||||
|
||||
static const struct device_name infineon_devices[] = {
|
||||
{0x000b, "SLB9635 TT 1.2"},
|
||||
- {0x001a, "SLB9660 TT 1.2"},
|
||||
#if IS_ENABLED(CONFIG_TPM2)
|
||||
+ {0x001a, "SLB9665 TT 2.0"},
|
||||
{0x001b, "SLB9670 TT 2.0"},
|
||||
#else
|
||||
+ {0x001a, "SLB9660 TT 1.2"},
|
||||
{0x001b, "SLB9670 TT 1.2"},
|
||||
#endif
|
||||
{0xffff}
|
||||
diff --git ./src/include/program_loading.h ./src/include/program_loading.h
|
||||
index 7aba302..879c26e 100644
|
||||
--- ./src/include/program_loading.h
|
||||
+++ ./src/include/program_loading.h
|
||||
@@ -24,6 +24,8 @@ enum {
|
||||
/* Last segment of program. Can be used to take different actions for
|
||||
* cache maintenance of a program load. */
|
||||
SEG_FINAL = 1 << 0,
|
||||
+ /* Indicate that the program segment should not be measured */
|
||||
+ SEG_NO_MEASURE = 1 << 1,
|
||||
};
|
||||
|
||||
// The prog_type is a bit mask, so that in searches one can find, e.g.,
|
||||
diff --git ./src/lib/cbfs.c ./src/lib/cbfs.c
|
||||
index 87ab387..708d321 100644
|
||||
--- ./src/lib/cbfs.c
|
||||
+++ ./src/lib/cbfs.c
|
||||
@@ -70,7 +70,13 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
|
||||
if (size != NULL)
|
||||
*size = fsize;
|
||||
|
||||
- return rdev_mmap(&fh.data, 0, fsize);
|
||||
+ void * buffer = rdev_mmap(&fh.data, 0, fsize);
|
||||
+
|
||||
+#ifndef __SMM__
|
||||
+ prog_segment_loaded((uintptr_t)buffer, fsize, 0);
|
||||
+#endif
|
||||
+
|
||||
+ return buffer;
|
||||
}
|
||||
|
||||
int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
|
||||
@@ -98,7 +104,8 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
return 0;
|
||||
if (rdev_readat(rdev, buffer, offset, in_size) != in_size)
|
||||
return 0;
|
||||
- return in_size;
|
||||
+ out_size = in_size;
|
||||
+ break;
|
||||
|
||||
case CBFS_COMPRESS_LZ4:
|
||||
if ((ENV_BOOTBLOCK || ENV_VERSTAGE) &&
|
||||
@@ -116,7 +123,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
timestamp_add_now(TS_START_ULZ4F);
|
||||
out_size = ulz4fn(compr_start, in_size, buffer, buffer_size);
|
||||
timestamp_add_now(TS_END_ULZ4F);
|
||||
- return out_size;
|
||||
+ break;
|
||||
|
||||
case CBFS_COMPRESS_LZMA:
|
||||
if (ENV_BOOTBLOCK || ENV_VERSTAGE)
|
||||
@@ -135,11 +142,15 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
|
||||
|
||||
rdev_munmap(rdev, map);
|
||||
|
||||
- return out_size;
|
||||
+ break;
|
||||
|
||||
default:
|
||||
return 0;
|
||||
}
|
||||
+
|
||||
+ prog_segment_loaded((uintptr_t)buffer, out_size, 0);
|
||||
+
|
||||
+ return out_size;
|
||||
}
|
||||
|
||||
static inline int tohex4(unsigned int c)
|
||||
diff --git ./src/lib/hardwaremain.c ./src/lib/hardwaremain.c
|
||||
index 6fd55d7..edcc668 100644
|
||||
--- ./src/lib/hardwaremain.c
|
||||
+++ ./src/lib/hardwaremain.c
|
||||
@@ -33,6 +33,7 @@
|
||||
#include <reset.h>
|
||||
#include <boot/tables.h>
|
||||
#include <program_loading.h>
|
||||
+#include <security/tpm/tss.h>
|
||||
#include <lib.h>
|
||||
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
|
||||
#include <arch/acpi.h>
|
||||
@@ -545,3 +546,13 @@ void boot_state_current_unblock(void)
|
||||
{
|
||||
boot_state_unblock(current_phase.state_id, current_phase.seq);
|
||||
}
|
||||
+
|
||||
+// ramstage measurements go into PCR3 if we are doing measured boot
|
||||
+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
|
||||
+{
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE))
|
||||
+ {
|
||||
+ tlcl_measure(3, (const void*) start, size);
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
diff --git ./src/lib/rmodule.c ./src/lib/rmodule.c
|
||||
index 66d5120..b50afe7 100644
|
||||
--- ./src/lib/rmodule.c
|
||||
+++ ./src/lib/rmodule.c
|
||||
@@ -198,7 +198,7 @@ int rmodule_load(void *base, struct rmodule *module)
|
||||
rmodule_clear_bss(module);
|
||||
|
||||
prog_segment_loaded((uintptr_t)module->location,
|
||||
- rmodule_memory_size(module), SEG_FINAL);
|
||||
+ rmodule_memory_size(module), SEG_FINAL | SEG_NO_MEASURE);
|
||||
|
||||
return 0;
|
||||
}
|
||||
diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
|
||||
index 2385635..52d088c 100644
|
||||
--- ./src/security/tpm/Makefile.inc
|
||||
+++ ./src/security/tpm/Makefile.inc
|
||||
@@ -4,8 +4,12 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
|
||||
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
|
||||
|
||||
-ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
+romstage-$(CONFIG_TPM) += sha1.c
|
||||
+ramstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
|
||||
+ramstage-$(CONFIG_TPM) += sha1.c
|
||||
+
|
||||
+ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
|
||||
romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
|
||||
romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
|
||||
endif # CONFIG_VBOOT_SEPARATE_VERSTAGE
|
||||
diff --git ./src/security/tpm/sha1.c ./src/security/tpm/sha1.c
|
||||
new file mode 100644
|
||||
index 0000000..506907f
|
||||
--- /dev/null
|
||||
+++ ./src/security/tpm/sha1.c
|
||||
@@ -0,0 +1,175 @@
|
||||
+/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved.
|
||||
+ * Use of this source code is governed by a BSD-style license that can be
|
||||
+ * found in the LICENSE file.
|
||||
+ *
|
||||
+ * SHA-1 implementation largely based on libmincrypt in the the Android
|
||||
+ * Open Source Project (platorm/system/core.git/libmincrypt/sha.c
|
||||
+ */
|
||||
+
|
||||
+#include <security/tpm/sha1.h>
|
||||
+#include <string.h>
|
||||
+
|
||||
+static uint32_t ror27(uint32_t val)
|
||||
+{
|
||||
+ return (val >> 27) | (val << 5);
|
||||
+}
|
||||
+static uint32_t ror2(uint32_t val)
|
||||
+{
|
||||
+ return (val >> 2) | (val << 30);
|
||||
+}
|
||||
+static uint32_t ror31(uint32_t val)
|
||||
+{
|
||||
+ return (val >> 31) | (val << 1);
|
||||
+}
|
||||
+
|
||||
+static void sha1_transform(struct sha1_ctx *ctx)
|
||||
+{
|
||||
+ uint32_t W[80];
|
||||
+ register uint32_t A, B, C, D, E;
|
||||
+ int t;
|
||||
+
|
||||
+ A = ctx->state[0];
|
||||
+ B = ctx->state[1];
|
||||
+ C = ctx->state[2];
|
||||
+ D = ctx->state[3];
|
||||
+ E = ctx->state[4];
|
||||
+
|
||||
+#define SHA_F1(A, B, C, D, E, t) \
|
||||
+ E += ror27(A) + \
|
||||
+ (W[t] = __builtin_bswap32(ctx->buf.w[t])) + \
|
||||
+ (D^(B&(C^D))) + 0x5A827999; \
|
||||
+ B = ror2(B);
|
||||
+
|
||||
+ for (t = 0; t < 15; t += 5) {
|
||||
+ SHA_F1(A, B, C, D, E, t + 0);
|
||||
+ SHA_F1(E, A, B, C, D, t + 1);
|
||||
+ SHA_F1(D, E, A, B, C, t + 2);
|
||||
+ SHA_F1(C, D, E, A, B, t + 3);
|
||||
+ SHA_F1(B, C, D, E, A, t + 4);
|
||||
+ }
|
||||
+ SHA_F1(A, B, C, D, E, t + 0); /* 16th one, t == 15 */
|
||||
+
|
||||
+#undef SHA_F1
|
||||
+
|
||||
+#define SHA_F1(A, B, C, D, E, t) \
|
||||
+ E += ror27(A) + \
|
||||
+ (W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
|
||||
+ (D^(B&(C^D))) + 0x5A827999; \
|
||||
+ B = ror2(B);
|
||||
+
|
||||
+ SHA_F1(E, A, B, C, D, t + 1);
|
||||
+ SHA_F1(D, E, A, B, C, t + 2);
|
||||
+ SHA_F1(C, D, E, A, B, t + 3);
|
||||
+ SHA_F1(B, C, D, E, A, t + 4);
|
||||
+
|
||||
+#undef SHA_F1
|
||||
+
|
||||
+#define SHA_F2(A, B, C, D, E, t) \
|
||||
+ E += ror27(A) + \
|
||||
+ (W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
|
||||
+ (B^C^D) + 0x6ED9EBA1; \
|
||||
+ B = ror2(B);
|
||||
+
|
||||
+ for (t = 20; t < 40; t += 5) {
|
||||
+ SHA_F2(A, B, C, D, E, t + 0);
|
||||
+ SHA_F2(E, A, B, C, D, t + 1);
|
||||
+ SHA_F2(D, E, A, B, C, t + 2);
|
||||
+ SHA_F2(C, D, E, A, B, t + 3);
|
||||
+ SHA_F2(B, C, D, E, A, t + 4);
|
||||
+ }
|
||||
+
|
||||
+#undef SHA_F2
|
||||
+
|
||||
+#define SHA_F3(A, B, C, D, E, t) \
|
||||
+ E += ror27(A) + \
|
||||
+ (W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
|
||||
+ ((B&C)|(D&(B|C))) + 0x8F1BBCDC; \
|
||||
+ B = ror2(B);
|
||||
+
|
||||
+ for (; t < 60; t += 5) {
|
||||
+ SHA_F3(A, B, C, D, E, t + 0);
|
||||
+ SHA_F3(E, A, B, C, D, t + 1);
|
||||
+ SHA_F3(D, E, A, B, C, t + 2);
|
||||
+ SHA_F3(C, D, E, A, B, t + 3);
|
||||
+ SHA_F3(B, C, D, E, A, t + 4);
|
||||
+ }
|
||||
+
|
||||
+#undef SHA_F3
|
||||
+
|
||||
+#define SHA_F4(A, B, C, D, E, t) \
|
||||
+ E += ror27(A) + \
|
||||
+ (W[t] = ror31(W[t-3] ^ W[t-8] ^ W[t-14] ^ W[t-16])) + \
|
||||
+ (B^C^D) + 0xCA62C1D6; \
|
||||
+ B = ror2(B);
|
||||
+
|
||||
+ for (; t < 80; t += 5) {
|
||||
+ SHA_F4(A, B, C, D, E, t + 0);
|
||||
+ SHA_F4(E, A, B, C, D, t + 1);
|
||||
+ SHA_F4(D, E, A, B, C, t + 2);
|
||||
+ SHA_F4(C, D, E, A, B, t + 3);
|
||||
+ SHA_F4(B, C, D, E, A, t + 4);
|
||||
+ }
|
||||
+
|
||||
+#undef SHA_F4
|
||||
+
|
||||
+ ctx->state[0] += A;
|
||||
+ ctx->state[1] += B;
|
||||
+ ctx->state[2] += C;
|
||||
+ ctx->state[3] += D;
|
||||
+ ctx->state[4] += E;
|
||||
+}
|
||||
+
|
||||
+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len)
|
||||
+{
|
||||
+ int i = ctx->count % sizeof(ctx->buf);
|
||||
+ const uint8_t *p = (const uint8_t *)data;
|
||||
+
|
||||
+ ctx->count += len;
|
||||
+
|
||||
+ while (len > sizeof(ctx->buf) - i) {
|
||||
+ memcpy(&ctx->buf.b[i], p, sizeof(ctx->buf) - i);
|
||||
+ len -= sizeof(ctx->buf) - i;
|
||||
+ p += sizeof(ctx->buf) - i;
|
||||
+ sha1_transform(ctx);
|
||||
+ i = 0;
|
||||
+ }
|
||||
+
|
||||
+ while (len--) {
|
||||
+ ctx->buf.b[i++] = *p++;
|
||||
+ if (i == sizeof(ctx->buf)) {
|
||||
+ sha1_transform(ctx);
|
||||
+ i = 0;
|
||||
+ }
|
||||
+ }
|
||||
+}
|
||||
+
|
||||
+
|
||||
+uint8_t *sha1_final(struct sha1_ctx *ctx)
|
||||
+{
|
||||
+ uint32_t cnt = ctx->count * 8;
|
||||
+ int i;
|
||||
+
|
||||
+ sha1_update(ctx, (uint8_t *)"\x80", 1);
|
||||
+ while ((ctx->count % sizeof(ctx->buf)) != (sizeof(ctx->buf) - 8))
|
||||
+ sha1_update(ctx, (uint8_t *)"\0", 1);
|
||||
+
|
||||
+ for (i = 0; i < 8; ++i) {
|
||||
+ uint8_t tmp = cnt >> ((7 - i) * 8);
|
||||
+ sha1_update(ctx, &tmp, 1);
|
||||
+ }
|
||||
+
|
||||
+ for (i = 0; i < 5; i++)
|
||||
+ ctx->buf.w[i] = __builtin_bswap32(ctx->state[i]);
|
||||
+
|
||||
+ return ctx->buf.b;
|
||||
+}
|
||||
+
|
||||
+void sha1_init(struct sha1_ctx *ctx)
|
||||
+{
|
||||
+ ctx->state[0] = 0x67452301;
|
||||
+ ctx->state[1] = 0xEFCDAB89;
|
||||
+ ctx->state[2] = 0x98BADCFE;
|
||||
+ ctx->state[3] = 0x10325476;
|
||||
+ ctx->state[4] = 0xC3D2E1F0;
|
||||
+ ctx->count = 0;
|
||||
+}
|
||||
diff --git ./src/security/tpm/sha1.h ./src/security/tpm/sha1.h
|
||||
new file mode 100644
|
||||
index 0000000..e7e28e6
|
||||
--- /dev/null
|
||||
+++ ./src/security/tpm/sha1.h
|
||||
@@ -0,0 +1,31 @@
|
||||
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
|
||||
+ * Use of this source code is governed by a BSD-style license that can be
|
||||
+ * found in the LICENSE file.
|
||||
+ */
|
||||
+
|
||||
+/* SHA-1 functions */
|
||||
+
|
||||
+#ifndef _sha1_h_
|
||||
+#define _sha1_h_
|
||||
+
|
||||
+#include <stdint.h>
|
||||
+#include <commonlib/helpers.h>
|
||||
+
|
||||
+#define SHA1_DIGEST_SIZE 20
|
||||
+#define SHA1_BLOCK_SIZE 64
|
||||
+
|
||||
+/* SHA-1 context */
|
||||
+struct sha1_ctx {
|
||||
+ uint32_t count;
|
||||
+ uint32_t state[5];
|
||||
+ union {
|
||||
+ uint8_t b[SHA1_BLOCK_SIZE];
|
||||
+ uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))];
|
||||
+ } buf;
|
||||
+};
|
||||
+
|
||||
+void sha1_init(struct sha1_ctx *ctx);
|
||||
+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len);
|
||||
+uint8_t *sha1_final(struct sha1_ctx *ctx);
|
||||
+
|
||||
+#endif /* _sha1_h_ */
|
||||
diff --git ./src/security/tpm/tss.h ./src/security/tpm/tss.h
|
||||
index 8f3f1cb..5c569cb 100644
|
||||
--- ./src/security/tpm/tss.h
|
||||
+++ ./src/security/tpm/tss.h
|
||||
@@ -147,6 +147,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
|
||||
uint8_t *out_digest);
|
||||
|
||||
/**
|
||||
+ * Perform a SHA1 hash on a region and extend a PCR with the hash.
|
||||
+ */
|
||||
+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len);
|
||||
+
|
||||
+/**
|
||||
* Get the entire set of permanent flags.
|
||||
*/
|
||||
uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags);
|
||||
diff --git ./src/security/tpm/tss/tcg-1.2/tss.c ./src/security/tpm/tss/tcg-1.2/tss.c
|
||||
index 161d29f..4577ec4 100644
|
||||
--- ./src/security/tpm/tss/tcg-1.2/tss.c
|
||||
+++ ./src/security/tpm/tss/tcg-1.2/tss.c
|
||||
@@ -17,6 +17,7 @@
|
||||
#include <arch/early_variables.h>
|
||||
#include <assert.h>
|
||||
#include <string.h>
|
||||
+#include <security/tpm/sha1.h>
|
||||
#include <security/tpm/tis.h>
|
||||
#include <vb2_api.h>
|
||||
#include <security/tpm/tss.h>
|
||||
@@ -354,3 +355,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
|
||||
kPcrDigestLength);
|
||||
return result;
|
||||
}
|
||||
+
|
||||
+
|
||||
+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len)
|
||||
+{
|
||||
+ VBDEBUG("TPM: pcr %d measure %p @ %zu: ", pcr_num, start, len);
|
||||
+
|
||||
+ struct sha1_ctx sha;
|
||||
+ sha1_init(&sha);
|
||||
+ sha1_update(&sha, start, len);
|
||||
+
|
||||
+ const uint8_t * hash = sha1_final(&sha);
|
||||
+ for(unsigned i = 0 ; i < SHA1_DIGEST_SIZE ; i++)
|
||||
+ VBDEBUG("%02x", hash[i]);
|
||||
+ VBDEBUG("\n");
|
||||
+
|
||||
+ //hexdump(start, 128);
|
||||
+
|
||||
+ return tlcl_extend(pcr_num, hash, NULL);
|
||||
+}
|
||||
+
|
152
patches/coreboot-4.8.1/0020-kgpe-d16.patch
Normal file
152
patches/coreboot-4.8.1/0020-kgpe-d16.patch
Normal file
@ -0,0 +1,152 @@
|
||||
diff --git ./src/mainboard/asus/kgpe-d16/Kconfig ./src/mainboard/asus/kgpe-d16/Kconfig
|
||||
index 531ba4f..5227d28 100644
|
||||
--- ./src/mainboard/asus/kgpe-d16/Kconfig
|
||||
+++ ./src/mainboard/asus/kgpe-d16/Kconfig
|
||||
@@ -28,6 +28,7 @@ config BOARD_SPECIFIC_OPTIONS # dummy
|
||||
select BOARD_ROMSIZE_KB_2048
|
||||
select ENABLE_APIC_EXT_ID
|
||||
select SPI_FLASH
|
||||
+ select TPM2
|
||||
select MAINBOARD_HAS_LPC_TPM
|
||||
select HAVE_ACPI_RESUME
|
||||
select DRIVERS_I2C_W83795
|
||||
diff --git ./src/mainboard/asus/kgpe-d16/devicetree.cb ./src/mainboard/asus/kgpe-d16/devicetree.cb
|
||||
index 9039f6d..0ea4216 100644
|
||||
--- ./src/mainboard/asus/kgpe-d16/devicetree.cb
|
||||
+++ ./src/mainboard/asus/kgpe-d16/devicetree.cb
|
||||
@@ -217,6 +217,9 @@ chip northbridge/amd/amdfam10/root_complex # Root complex
|
||||
chip drivers/pc80/tpm
|
||||
device pnp 4e.0 on end # TPM module
|
||||
end
|
||||
+ chip drivers/generic/generic # BMC KCS
|
||||
+ device pnp ca2.0 on end
|
||||
+ end
|
||||
end
|
||||
device pci 14.4 on # Bridge
|
||||
device pci 1.0 on end # VGA
|
||||
diff --git ./src/mainboard/asus/kgpe-d16/dsdt.asl ./src/mainboard/asus/kgpe-d16/dsdt.asl
|
||||
index 6a25b4d..cfcbc98 100644
|
||||
--- ./src/mainboard/asus/kgpe-d16/dsdt.asl
|
||||
+++ ./src/mainboard/asus/kgpe-d16/dsdt.asl
|
||||
@@ -50,6 +50,9 @@ DefinitionBlock (
|
||||
/* HPET enable */
|
||||
Name (HPTE, 0x1)
|
||||
|
||||
+ /* IPMI KCS enable */
|
||||
+ Name (KCSE, 0x1)
|
||||
+
|
||||
#include <southbridge/amd/common/acpi/sleepstates.asl>
|
||||
|
||||
/* The _PIC method is called by the OS to choose between interrupt
|
||||
@@ -485,6 +488,13 @@ DefinitionBlock (
|
||||
Name (_HID, EisaId ("PNP0A05"))
|
||||
Name (_ADR, 0x00140003)
|
||||
|
||||
+ OperationRegion(BMRG, SystemIO, 0xca2, 0x02) /* BMC KCS registers */
|
||||
+ Field(BMRG, AnyAcc, NoLock, Preserve)
|
||||
+ {
|
||||
+ BMRI, 8, /* Index */
|
||||
+ BMRD, 8, /* Data */
|
||||
+ }
|
||||
+
|
||||
/* Real Time Clock Device */
|
||||
Device(RTC0) {
|
||||
Name(_HID, EISAID("PNP0B00")) /* AT Real Time Clock (not PIIX4 compatible) */
|
||||
@@ -606,6 +616,27 @@ DefinitionBlock (
|
||||
})
|
||||
}
|
||||
}
|
||||
+
|
||||
+ Device(KCS1) { /* IPMI KCS */
|
||||
+ Name(_HID,EISAID("IPI0001")) /* ASpeed BMC */
|
||||
+ Method (_STA, 0, NotSerialized) {
|
||||
+ If(KCSE) { /* Detection enabled */
|
||||
+ If(LNotEqual(BMRD, 0xff)) {
|
||||
+ Return(0x0f) /* Device present */
|
||||
+ }
|
||||
+ Return(Zero)
|
||||
+ }
|
||||
+ Return(Zero)
|
||||
+ }
|
||||
+ Method(_CRS, 0) {
|
||||
+ Return(ResourceTemplate() {
|
||||
+ IO(Decode16, 0x0ca2, 0x0ca2, 0x01, 0x02)
|
||||
+ })
|
||||
+ }
|
||||
+ Method (_IFT, 0, NotSerialized) { /* Interface type */
|
||||
+ Return(One) /* KCS interface */
|
||||
+ }
|
||||
+ }
|
||||
}
|
||||
|
||||
/* High Precision Event Timer */
|
||||
diff --git ./src/mainboard/asus/kgpe-d16/mainboard.c ./src/mainboard/asus/kgpe-d16/mainboard.c
|
||||
index 65029d4..8ee3a5e 100644
|
||||
--- ./src/mainboard/asus/kgpe-d16/mainboard.c
|
||||
+++ ./src/mainboard/asus/kgpe-d16/mainboard.c
|
||||
@@ -70,6 +70,13 @@ static void mainboard_enable(device_t dev)
|
||||
|
||||
set_pcie_dereset();
|
||||
/* get_ide_dma66(); */
|
||||
+
|
||||
+ /* Enable access to the BMC IPMI via KCS */
|
||||
+ device_t lpc_sio_dev = dev_find_slot_pnp(0xca2, 0);
|
||||
+ struct resource *res = new_resource(lpc_sio_dev, 0xca2);
|
||||
+ res->base = 0xca2;
|
||||
+ res->size = 1;
|
||||
+ res->flags = IORESOURCE_IO | IORESOURCE_ASSIGNED | IORESOURCE_FIXED;
|
||||
}
|
||||
|
||||
/* override the default SATA PHY setup */
|
||||
diff --git ./src/mainboard/asus/kgpe-d16/romstage.c ./src/mainboard/asus/kgpe-d16/romstage.c
|
||||
index 63b93c1..bb4f181 100644
|
||||
--- ./src/mainboard/asus/kgpe-d16/romstage.c
|
||||
+++ ./src/mainboard/asus/kgpe-d16/romstage.c
|
||||
@@ -88,6 +88,47 @@ static void switch_spd_mux(uint8_t channel)
|
||||
byte &= ~0xc0; /* Enable SPD mux GPIO output drivers */
|
||||
byte |= (channel << 2) & 0xc; /* Set SPD mux GPIOs */
|
||||
pci_write_config8(PCI_DEV(0, 0x14, 0), 0x54, byte);
|
||||
+
|
||||
+ /* Temporary AST PCI mapping */
|
||||
+ uint32_t base_memory = 0xfc000000;
|
||||
+ uint32_t memory_limit = 0xfc800000;
|
||||
+
|
||||
+ /* Temporarily enable the SP5100 PCI bridge */
|
||||
+ uint16_t prev_sec_cfg = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x04);
|
||||
+ uint8_t prev_sec_bus = pci_read_config8(PCI_DEV(0, 0x14, 4), 0x19);
|
||||
+ uint8_t prev_sec_sub_bus = pci_read_config8(PCI_DEV(0, 0x14, 4), 0x1a);
|
||||
+ uint16_t prev_sec_mem_base = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x20);
|
||||
+ uint16_t prev_sec_mem_limit = pci_read_config16(PCI_DEV(0, 0x14, 4), 0x22);
|
||||
+ pci_write_config8(PCI_DEV(0, 0x14, 4), 0x19, 0x01);
|
||||
+ pci_write_config8(PCI_DEV(0, 0x14, 4), 0x1a, 0xff);
|
||||
+ pci_write_config16(PCI_DEV(0, 0x14, 4), 0x20, (base_memory >> 20));
|
||||
+ pci_write_config16(PCI_DEV(0, 0x14, 4), 0x22, (memory_limit >> 20));
|
||||
+ pci_write_config16(PCI_DEV(0, 0x14, 4), 0x04, 0x2);
|
||||
+
|
||||
+ /* Temporarily enable AST BAR1 */
|
||||
+ uint32_t prev_ast_cfg = pci_read_config32(PCI_DEV(1, 0x1, 0), 0x04);
|
||||
+ uint32_t prev_ast_bar1 = pci_read_config32(PCI_DEV(1, 0x1, 0), 0x14);
|
||||
+ pci_write_config32(PCI_DEV(1, 0x1, 0), 0x14, base_memory);
|
||||
+ pci_write_config32(PCI_DEV(1, 0x1, 0), 0x04, 0x02100002);
|
||||
+
|
||||
+ /* Use the P2A bridge to set ASpeed SPD mux GPIOs to the same values as the SP5100 */
|
||||
+ void* ast_bar1 = (void*)base_memory;
|
||||
+ write32(ast_bar1 + 0xf004, 0x1e780000); /* Enable access to GPIO controller */
|
||||
+ write32(ast_bar1 + 0xf000, 0x1);
|
||||
+ write32(ast_bar1 + 0x10024, read32(ast_bar1 + 0x10024) | 0x3000); /* Enable SPD mux GPIO output drivers */
|
||||
+ write32(ast_bar1 + 0x10020, (read32(ast_bar1 + 0x10020) & ~0x3000) | ((channel & 0x3) << 12)); /* Set SPD mux GPIOs */
|
||||
+ write32(ast_bar1 + 0xf000, 0x0);
|
||||
+
|
||||
+ /* Deconfigure AST BAR1 */
|
||||
+ pci_write_config32(PCI_DEV(1, 0x1, 0), 0x04, prev_ast_cfg);
|
||||
+ pci_write_config32(PCI_DEV(1, 0x1, 0), 0x14, prev_ast_bar1);
|
||||
+
|
||||
+ /* Deconfigure SP5100 PCI bridge */
|
||||
+ pci_write_config16(PCI_DEV(0, 0x14, 4), 0x04, prev_sec_cfg);
|
||||
+ pci_write_config16(PCI_DEV(0, 0x14, 4), 0x22, prev_sec_mem_limit);
|
||||
+ pci_write_config16(PCI_DEV(0, 0x14, 4), 0x20, prev_sec_mem_base);
|
||||
+ pci_write_config8(PCI_DEV(0, 0x14, 4), 0x1a, prev_sec_sub_bus);
|
||||
+ pci_write_config8(PCI_DEV(0, 0x14, 4), 0x19, prev_sec_bus);
|
||||
}
|
||||
|
||||
static const uint8_t spd_addr_fam15[] = {
|
58
patches/coreboot-4.8.1/0030-sandybridge.patch
Normal file
58
patches/coreboot-4.8.1/0030-sandybridge.patch
Normal file
@ -0,0 +1,58 @@
|
||||
diff --git ./src/northbridge/intel/sandybridge/romstage.c ./src/northbridge/intel/sandybridge/romstage.c
|
||||
index 0426b83..d348b9e 100644
|
||||
--- ./src/northbridge/intel/sandybridge/romstage.c
|
||||
+++ ./src/northbridge/intel/sandybridge/romstage.c
|
||||
@@ -29,6 +29,8 @@
|
||||
#include <device/device.h>
|
||||
#include <halt.h>
|
||||
#include <security/tpm/tis.h>
|
||||
+#include <security/tpm/tss.h>
|
||||
+#include <program_loading.h>
|
||||
#include <northbridge/intel/sandybridge/chip.h>
|
||||
#include "southbridge/intel/bd82x6x/pch.h"
|
||||
#include <southbridge/intel/common/gpio.h>
|
||||
@@ -72,6 +74,19 @@ void mainboard_romstage_entry(unsigned long bist)
|
||||
/* Initialize superio */
|
||||
mainboard_config_superio();
|
||||
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
|
||||
+ // we don't know if we are coming out of a resume
|
||||
+ // at this point, but want to setup the tpm ASAP
|
||||
+ init_tpm(0);
|
||||
+ tlcl_lib_init();
|
||||
+ const void * const bootblock = (const void*) 0xFFFFF800;
|
||||
+ const unsigned bootblock_size = 0x800;
|
||||
+ tlcl_measure(0, bootblock, bootblock_size);
|
||||
+
|
||||
+ extern char _romstage, _eromstage;
|
||||
+ tlcl_measure(1, &_romstage, &_eromstage - &_romstage);
|
||||
+ }
|
||||
+
|
||||
/* USB is initialized in MRC if MRC is used. */
|
||||
if (CONFIG_USE_NATIVE_RAMINIT) {
|
||||
early_usb_init(mainboard_usb_ports);
|
||||
@@ -117,9 +132,23 @@ void mainboard_romstage_entry(unsigned long bist)
|
||||
|
||||
northbridge_romstage_finalize(s3resume);
|
||||
|
||||
- if (IS_ENABLED(CONFIG_LPC_TPM)) {
|
||||
+ // the normal TPM init happens here, if we haven't already
|
||||
+ // set it up as part of the measured boot.
|
||||
+ if (!IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
|
||||
init_tpm(s3resume);
|
||||
}
|
||||
|
||||
+ printk(BIOS_DEBUG, "%s: romstage complete\n", __FILE__);
|
||||
+
|
||||
post_code(0x3f);
|
||||
}
|
||||
+
|
||||
+
|
||||
+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
|
||||
+{
|
||||
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE))
|
||||
+ {
|
||||
+ tlcl_measure(2, (const void*) start, size);
|
||||
+ }
|
||||
+}
|
||||
+
|
Loading…
Reference in New Issue
Block a user