From 95322c66291d7e34c437f77f12cdd89707a6b0ce Mon Sep 17 00:00:00 2001 From: gaspar-ilom Date: Fri, 14 Mar 2025 16:07:24 +0100 Subject: [PATCH] t440p/w541 use broadwell mrc blob Signed-off-by: gaspar-ilom --- blobs/broadwell/.gitignore | 1 + blobs/broadwell/obtain-mrc | 44 +++++++++++++++++++ boards/t440p-maximized/t440p-maximized.config | 6 ++- boards/w541-maximized/w541-maximized.config | 6 ++- config/coreboot-t440p.config | 16 ++++--- config/coreboot-w541.config | 16 ++++--- 6 files changed, 73 insertions(+), 16 deletions(-) create mode 100644 blobs/broadwell/.gitignore create mode 100755 blobs/broadwell/obtain-mrc diff --git a/blobs/broadwell/.gitignore b/blobs/broadwell/.gitignore new file mode 100644 index 00000000..b3810c18 --- /dev/null +++ b/blobs/broadwell/.gitignore @@ -0,0 +1 @@ +mrc.bin diff --git a/blobs/broadwell/obtain-mrc b/blobs/broadwell/obtain-mrc new file mode 100755 index 00000000..2fdd0408 --- /dev/null +++ b/blobs/broadwell/obtain-mrc @@ -0,0 +1,44 @@ +#!/usr/bin/env bash + +set -e + +function usage() { + echo -n \ + "Usage: $(basename "$0") path_to_output_directory +Obtain mrc.bin from a Broadwell Chromebook firmware image. +" +} + +MRC_BIN_HASH="dd05ab481e1fe0ce20ade164cf3dbef3c479592801470e6e79faa17624751343" + +if [[ "${BASH_SOURCE[0]}" == "$0" ]]; then + if [[ "${1:-}" == "--help" ]]; then + usage + else + if [[ -z "${COREBOOT_DIR}" ]]; then + echo "ERROR: No COREBOOT_DIR variable defined." + exit 1 + fi + + output_dir="$(realpath "${1:-./}")" + + # Obtain broadwell mrc blob + if [[ ! -f "${output_dir}/mrc.bin" ]]; then + pushd "${COREBOOT_DIR}" + + make -C util/cbfstool + cd util/chromeos + ./crosfirmware.sh samus + ../cbfstool/cbfstool coreboot-*.bin extract -f mrc.bin -n mrc.bin -r RO_SECTION + + mv mrc.bin "${output_dir}/mrc.bin" + + popd + fi + + if ! echo "${MRC_BIN_HASH} ${output_dir}/mrc.bin" | sha256sum --check; then + echo "ERROR: SHA256 checksum for mrc.bin doesn't match." + exit 1 + fi + fi +fi diff --git a/boards/t440p-maximized/t440p-maximized.config b/boards/t440p-maximized/t440p-maximized.config index 20730d0f..1e6bb277 100644 --- a/boards/t440p-maximized/t440p-maximized.config +++ b/boards/t440p-maximized/t440p-maximized.config @@ -49,7 +49,11 @@ export CONFIG_FLASH_OPTIONS="flashprog --progress --programmer internal" # Make the Coreboot build depend on the following 3rd party blobs: $(build)/coreboot-$(CONFIG_COREBOOT_VERSION)/$(BOARD)/.build: \ - $(pwd)/blobs/t440p/me.bin + $(pwd)/blobs/broadwell/mrc.bin $(pwd)/blobs/t440p/me.bin + +$(pwd)/blobs/broadwell/mrc.bin: + COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \ + $(pwd)/blobs/broadwell/obtain-mrc $(pwd)/blobs/broadwell $(pwd)/blobs/t440p/me.bin: COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \ diff --git a/boards/w541-maximized/w541-maximized.config b/boards/w541-maximized/w541-maximized.config index e9db1529..8cc6614d 100644 --- a/boards/w541-maximized/w541-maximized.config +++ b/boards/w541-maximized/w541-maximized.config @@ -49,7 +49,11 @@ export CONFIG_FLASH_OPTIONS="flashprog --progress --programmer internal" # Make the Coreboot build depend on the following 3rd party blobs: $(build)/coreboot-$(CONFIG_COREBOOT_VERSION)/$(BOARD)/.build: \ - $(pwd)/blobs/w541/me.bin + $(pwd)/blobs/broadwell/mrc.bin $(pwd)/blobs/w541/me.bin + +$(pwd)/blobs/broadwell/mrc.bin: + COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \ + $(pwd)/blobs/broadwell/obtain-mrc $(pwd)/blobs/broadwell $(pwd)/blobs/w541/me.bin: COREBOOT_DIR="$(build)/$(coreboot_base_dir)" \ diff --git a/config/coreboot-t440p.config b/config/coreboot-t440p.config index a4a3e1ca..2f588581 100644 --- a/config/coreboot-t440p.config +++ b/config/coreboot-t440p.config @@ -153,9 +153,9 @@ CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xff7c0000 -CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x20000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 @@ -275,7 +275,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 -CONFIG_EHCI_BAR=0xe8000000 +CONFIG_EHCI_BAR=0xd8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 CONFIG_IED_REGION_SIZE=0x400000 @@ -284,7 +284,9 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="@BLOB_DIR@/broadwell/mrc.bin" +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 @@ -335,7 +337,9 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # Northbridge # CONFIG_NORTHBRIDGE_INTEL_HASWELL=y -CONFIG_USE_NATIVE_RAMINIT=y +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_USE_BROADWELL_MRC=y +CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y # # Southbridge @@ -691,8 +695,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # General Debug Settings # # CONFIG_DEBUG_CBFS is not set -CONFIG_HAVE_DEBUG_RAM_SETUP=y -# CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_CONSOLE_INIT is not set diff --git a/config/coreboot-w541.config b/config/coreboot-w541.config index aac258dd..2ab61cf3 100644 --- a/config/coreboot-w541.config +++ b/config/coreboot-w541.config @@ -153,9 +153,9 @@ CONFIG_MAX_SOCKET=1 CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0 CONFIG_TPM_PIRQ=0x0 CONFIG_DCACHE_RAM_BASE=0xff7c0000 -CONFIG_DCACHE_RAM_SIZE=0x40000 +CONFIG_DCACHE_RAM_SIZE=0x10000 CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000 -CONFIG_DCACHE_BSP_STACK_SIZE=0x20000 +CONFIG_DCACHE_BSP_STACK_SIZE=0x2000 CONFIG_MAX_ACPI_TABLE_SIZE_KB=144 CONFIG_HAVE_INTEL_FIRMWARE=y CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000 @@ -275,7 +275,7 @@ CONFIG_SMM_MODULE_STACK_SIZE=0x400 CONFIG_SERIRQ_CONTINUOUS_MODE=y CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000 CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xf0000000 -CONFIG_EHCI_BAR=0xe8000000 +CONFIG_EHCI_BAR=0xd8000000 CONFIG_ACPI_CPU_STRING="CP%02X" CONFIG_STACK_SIZE=0x2000 CONFIG_IED_REGION_SIZE=0x400000 @@ -284,7 +284,9 @@ CONFIG_INTEL_GMA_BCLV_WIDTH=16 CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8256 CONFIG_INTEL_GMA_BCLM_WIDTH=16 CONFIG_BOOTBLOCK_IN_CBFS=y -CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0 +CONFIG_HAVE_MRC=y +CONFIG_MRC_FILE="@BLOB_DIR@/broadwell/mrc.bin" +CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x30000 CONFIG_HPET_MIN_TICKS=0x80 CONFIG_FIXED_MCHBAR_MMIO_BASE=0xfed10000 CONFIG_FIXED_DMIBAR_MMIO_BASE=0xfed18000 @@ -335,7 +337,9 @@ CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y # Northbridge # CONFIG_NORTHBRIDGE_INTEL_HASWELL=y -CONFIG_USE_NATIVE_RAMINIT=y +# CONFIG_USE_NATIVE_RAMINIT is not set +CONFIG_USE_BROADWELL_MRC=y +CONFIG_HASWELL_HIDE_PEG_FROM_MRC=y # # Southbridge @@ -690,8 +694,6 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y # General Debug Settings # # CONFIG_DEBUG_CBFS is not set -CONFIG_HAVE_DEBUG_RAM_SETUP=y -# CONFIG_DEBUG_RAM_SETUP is not set CONFIG_HAVE_DEBUG_SMBUS=y # CONFIG_DEBUG_SMBUS is not set # CONFIG_DEBUG_CONSOLE_INIT is not set