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t480: remove unneeded patches from libreboot under patches/coreboot-2412, resave in oldconfig (reenables compressed fsp)

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repro:

- inspect patches applicability from patch trace

if [ ! -e "/home/user/heads/build/x86/coreboot-2412/.patched" ]; then if [ -r patches/coreboot-2412.patch ]; then ( git apply --verbose --reject --binary --directory build/x86/coreboot-2412 ) < patches/coreboot-2412.patch || exit 1 ; fi && if [ -d patches/coreboot-2412 ] && [ -r patches/coreboot-2412 ] ; then for patch in patches/coreboot-2412/*.patch ; do echo "Applying patch file : $patch " ; ( git apply --verbose --reject --binary --directory build/x86/coreboot-2412 ) < $patch || exit 1 ; done ; fi && touch "/home/user/heads/build/x86/coreboot-2412/.patched"; fi
Applying patch file : patches/coreboot-2412/0001-soc-intel-skylake-configure-usb-acpi.patch
Checking patch build/x86/coreboot-2412/src/soc/intel/skylake/Kconfig...
Checking patch build/x86/coreboot-2412/src/soc/intel/skylake/chipset.cb...
Applied patch build/x86/coreboot-2412/src/soc/intel/skylake/Kconfig cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/skylake/chipset.cb cleanly.
Applying patch file : patches/coreboot-2412/0002-soc-intel-skylake-Enable-4E-4F-PNP-I-O-ports-in-boot.patch
Checking patch build/x86/coreboot-2412/src/soc/intel/skylake/bootblock/pch.c...
Applied patch build/x86/coreboot-2412/src/soc/intel/skylake/bootblock/pch.c cleanly.
Applying patch file : patches/coreboot-2412/0003-mb-lenovo-Add-ThinkPad-T480-and-ThinkPad-T480s.patch
Checking patch build/x86/coreboot-2412/src/device/pci_rom.c...
Checking patch build/x86/coreboot-2412/src/ec/lenovo/h8/acpi/ec.asl...
Checking patch build/x86/coreboot-2412/src/ec/lenovo/h8/bluetooth.c...
Checking patch build/x86/coreboot-2412/src/ec/lenovo/h8/wwan.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/ec.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/ec.h...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin...
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin...
Applied patch build/x86/coreboot-2412/src/device/pci_rom.c cleanly.
Applied patch build/x86/coreboot-2412/src/ec/lenovo/h8/acpi/ec.asl cleanly.
Applied patch build/x86/coreboot-2412/src/ec/lenovo/h8/bluetooth.c cleanly.
Applied patch build/x86/coreboot-2412/src/ec/lenovo/h8/wwan.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/Kconfig.name cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/Makefile.mk cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/acpi/ec.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/acpi/superio.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/bootblock.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/devicetree.cb cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/dsdt.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/ec.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/ec.h cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/gpio.h cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/ramstage.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/data.vbt cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gma-mainboard.ads cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/gpio.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/hda_verb.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/memory_init_params.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480/overridetree.cb cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/data.vbt cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gma-mainboard.ads cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/gpio.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/hda_verb.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/memory_init_params.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/overridetree.cb cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_0.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_1.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_10.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_11.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_12.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_13.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_14.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_15.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_16.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_17.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_18.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_19.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_2.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_20.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_3.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_4.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_5.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_6.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_7.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_8.bin cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480s/spd/spd_9.bin cleanly.
Applying patch file : patches/coreboot-2412/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig.name...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Makefile.mk...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/acpi/ec.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/acpi/superio.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/board_info.txt...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/cmos.default...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/cmos.layout...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/cstates.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/devicetree.cb...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/dsdt.asl...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/gma-mainboard.ads...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb...
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig.name cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Makefile.mk cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/acpi/ec.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/acpi/superio.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/board_info.txt cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/cmos.default cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/cmos.layout cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/cstates.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/devicetree.cb cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/dsdt.asl cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/gma-mainboard.ads cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb cleanly.
Applying patch file : patches/coreboot-2412/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
Checking patch build/x86/coreboot-2412/util/ifdtool/ifdtool.c...
Applied patch build/x86/coreboot-2412/util/ifdtool/ifdtool.c cleanly.
Applying patch file : patches/coreboot-2412/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
Checking patch build/x86/coreboot-2412/payloads/Makefile.mk...
Applied patch build/x86/coreboot-2412/payloads/Makefile.mk cleanly.
Applying patch file : patches/coreboot-2412/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig.name...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c...
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb...
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/Kconfig.name cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c cleanly.
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb cleanly.
Applying patch file : patches/coreboot-2412/0008-dell-3050micro-disable-nvme-hotplug.patch
Checking patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_3050/devicetree.cb...
Applied patch build/x86/coreboot-2412/src/mainboard/dell/optiplex_3050/devicetree.cb cleanly.
Applying patch file : patches/coreboot-2412/0009-lenovo-Add-Kconfig-option-CONFIG_LENOVO_TBFW_BIN.patch
Checking patch build/x86/coreboot-2412/src/mainboard/lenovo/Kconfig...
Applied patch build/x86/coreboot-2412/src/mainboard/lenovo/Kconfig cleanly.
Applying patch file : patches/coreboot-2412/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
Checking patch build/x86/coreboot-2412/src/soc/intel/skylake/Kconfig...
Applied patch build/x86/coreboot-2412/src/soc/intel/skylake/Kconfig cleanly.
Applying patch file : patches/coreboot-2412/0011-soc-intel-pmc-Hardcoded-poweroff-after-power-fail.patch
Checking patch build/x86/coreboot-2412/src/soc/intel/common/block/pmc/pmclib.c...
Applied patch build/x86/coreboot-2412/src/soc/intel/common/block/pmc/pmclib.c cleanly.
Applying patch file : patches/coreboot-2412/0012-ec-dasharo-Comment-EC_DASHARO_EC_FLASH_SIZE.patch
Checking patch build/x86/coreboot-2412/src/ec/dasharo/ec/Kconfig...
Applied patch build/x86/coreboot-2412/src/ec/dasharo/ec/Kconfig cleanly.
Applying patch file : patches/coreboot-2412/0013-src-intel-skylake-Disable-stack-overflow-debug-optio.patch
Checking patch build/x86/coreboot-2412/src/soc/intel/skylake/Kconfig...
Applied patch build/x86/coreboot-2412/src/soc/intel/skylake/Kconfig cleanly.
Applying patch file : patches/coreboot-2412/0014-src-intel-x4x-Disable-stack-overflow-debug.patch
Checking patch build/x86/coreboot-2412/src/northbridge/intel/x4x/Kconfig...
Applied patch build/x86/coreboot-2412/src/northbridge/intel/x4x/Kconfig cleanly.
Applying patch file : patches/coreboot-2412/85278-post-skylake-pr0.patch
Checking patch build/x86/coreboot-2412/src/soc/intel/alderlake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/cannonlake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/block/lpc/Makefile.mk...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/block/smm/smihandler.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/pch/include/intelpch/lockdown.h...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/Kconfig...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/Makefile.mk...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/lockdown.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/lockdown_lpc.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/lockdown_spi.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/denverton_ns/lpc.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/elkhartlake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/jasperlake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/meteorlake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/pantherlake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/skylake/finalize.c...
Checking patch build/x86/coreboot-2412/src/soc/intel/tigerlake/finalize.c...
Applied patch build/x86/coreboot-2412/src/soc/intel/alderlake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/cannonlake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/block/lpc/Makefile.mk cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/block/smm/smihandler.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/pch/include/intelpch/lockdown.h cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/Kconfig cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/Makefile.mk cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/lockdown.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/lockdown_lpc.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/common/pch/lockdown/lockdown_spi.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/denverton_ns/lpc.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/elkhartlake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/jasperlake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/meteorlake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/pantherlake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/skylake/finalize.c cleanly.
Applied patch build/x86/coreboot-2412/src/soc/intel/tigerlake/finalize.c cleanly.

- remove patches unrelated to t480, skylake etc
- clean local build cache for coreboot fork
  - remove files added per patches
    - sudo rm -rf build/x86/coreboot-2412/src/mainboard/lenovo/sklkbl_thinkpad/variants/t480*
  - rewrite canary content so that coreboot fork si resynced
    - echo "bogus" |sudo tee build/x86/coreboot-2412/.canary
  - rebuild the board, so that coreboot fork is resynced and patches are reapplied
    - ./docker_repro.sh make BOARD=t480-hotp-maximized
  - save oldconfig changes from patches applied/removed
    - ./docker_repro.sh make BOARD=t480-maximized coreboot.modify_and_save_oldconfig_in_place

Signed-off-by: Thierry Laurion <insurgo@riseup.net>
This commit is contained in:
Thierry Laurion 2025-02-14 11:58:48 -05:00
parent b2637cec90
commit 796a6c338f
No known key found for this signature in database
GPG Key ID: 9A53E1BB3FF00461
7 changed files with 1 additions and 1363 deletions
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1
config/coreboot-t480-maximized.config
View File

@ -652,6 +652,7 @@ CONFIG_FSP_FULL_FD=y
CONFIG_FSP_T_RESERVED_SIZE=0x0
CONFIG_FSP_M_XIP=y
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
CONFIG_USE_FSP_NOTIFY_PHASE_POST_PCI_ENUM=y
CONFIG_USE_FSP_NOTIFY_PHASE_READY_TO_BOOT=y

708
patches/coreboot-2412/0004-mb-dell-Add-Optiplex-780-MT-x4x-ICH10.patch
View File

@ -1,708 +0,0 @@
From 2527c4a5131d7b33e43bbc03a94921e7e59b4b02 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Mon, 30 Sep 2024 20:44:38 -0400
Subject: [PATCH 04/11] mb/dell: Add Optiplex 780 MT (x4x/ICH10)
Change-Id: Idb45737ce95bfd26e978323c650de7d308b5079c
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/optiplex_780/Kconfig | 40 ++++
src/mainboard/dell/optiplex_780/Kconfig.name | 4 +
src/mainboard/dell/optiplex_780/Makefile.mk | 10 +
src/mainboard/dell/optiplex_780/acpi/ec.asl | 5 +
.../dell/optiplex_780/acpi/ich10_pci_irqs.asl | 32 ++++
.../dell/optiplex_780/acpi/superio.asl | 18 ++
.../dell/optiplex_780/board_info.txt | 6 +
src/mainboard/dell/optiplex_780/cmos.default | 8 +
src/mainboard/dell/optiplex_780/cmos.layout | 72 ++++++++
src/mainboard/dell/optiplex_780/cstates.c | 8 +
src/mainboard/dell/optiplex_780/devicetree.cb | 63 +++++++
src/mainboard/dell/optiplex_780/dsdt.asl | 26 +++
.../dell/optiplex_780/gma-mainboard.ads | 16 ++
.../optiplex_780/variants/780_mt/data.vbt | Bin 0 -> 1917 bytes
.../optiplex_780/variants/780_mt/early_init.c | 12 ++
.../dell/optiplex_780/variants/780_mt/gpio.c | 174 ++++++++++++++++++
.../optiplex_780/variants/780_mt/hda_verb.c | 26 +++
.../variants/780_mt/overridetree.cb | 10 +
18 files changed, 530 insertions(+)
create mode 100644 src/mainboard/dell/optiplex_780/Kconfig
create mode 100644 src/mainboard/dell/optiplex_780/Kconfig.name
create mode 100644 src/mainboard/dell/optiplex_780/Makefile.mk
create mode 100644 src/mainboard/dell/optiplex_780/acpi/ec.asl
create mode 100644 src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
create mode 100644 src/mainboard/dell/optiplex_780/acpi/superio.asl
create mode 100644 src/mainboard/dell/optiplex_780/board_info.txt
create mode 100644 src/mainboard/dell/optiplex_780/cmos.default
create mode 100644 src/mainboard/dell/optiplex_780/cmos.layout
create mode 100644 src/mainboard/dell/optiplex_780/cstates.c
create mode 100644 src/mainboard/dell/optiplex_780/devicetree.cb
create mode 100644 src/mainboard/dell/optiplex_780/dsdt.asl
create mode 100644 src/mainboard/dell/optiplex_780/gma-mainboard.ads
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
new file mode 100644
index 0000000000..2d06c75c9a
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/Kconfig
@@ -0,0 +1,40 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_DELL_OPTIPLEX_780_COMMON
+ def_bool n
+ select BOARD_ROMSIZE_KB_8192
+ select CPU_INTEL_SOCKET_LGA775
+ select DRIVERS_I2C_CK505
+ select HAVE_ACPI_RESUME
+ select HAVE_ACPI_TABLES
+ select HAVE_CMOS_DEFAULT
+ select HAVE_OPTION_TABLE
+ select INTEL_GMA_HAVE_VBT
+ select MAINBOARD_HAS_LIBGFXINIT
+ select MAINBOARD_USES_IFD_GBE_REGION
+ select NORTHBRIDGE_INTEL_X4X
+ select PCIEXP_ASPM
+ select PCIEXP_CLK_PM
+ select SOUTHBRIDGE_INTEL_I82801JX
+
+config BOARD_DELL_OPTIPLEX_780_MT
+ select BOARD_DELL_OPTIPLEX_780_COMMON
+
+if BOARD_DELL_OPTIPLEX_780_COMMON
+
+config VGA_BIOS_ID
+ default "8086,2e22"
+
+config MAINBOARD_DIR
+ default "dell/optiplex_780"
+
+config MAINBOARD_PART_NUMBER
+ default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
+
+config OVERRIDE_DEVICETREE
+ default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
+
+config VARIANT_DIR
+ default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
+
+endif # BOARD_DELL_OPTIPLEX_780_COMMON
diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
new file mode 100644
index 0000000000..db7f2e8fe3
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/Kconfig.name
@@ -0,0 +1,4 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+config BOARD_DELL_OPTIPLEX_780_MT
+ bool "OptiPlex 780 MT"
diff --git a/src/mainboard/dell/optiplex_780/Makefile.mk b/src/mainboard/dell/optiplex_780/Makefile.mk
new file mode 100644
index 0000000000..d462995d75
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/Makefile.mk
@@ -0,0 +1,10 @@
+# SPDX-License-Identifier: GPL-2.0-only
+
+ramstage-y += cstates.c
+romstage-y += variants/$(VARIANT_DIR)/gpio.c
+
+bootblock-y += variants/$(VARIANT_DIR)/early_init.c
+romstage-y += variants/$(VARIANT_DIR)/early_init.c
+
+ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
+ramstage-y += variants/$(VARIANT_DIR)/hda_verb.c
diff --git a/src/mainboard/dell/optiplex_780/acpi/ec.asl b/src/mainboard/dell/optiplex_780/acpi/ec.asl
new file mode 100644
index 0000000000..479296cb76
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/acpi/ec.asl
@@ -0,0 +1,5 @@
+/* SPDX-License-Identifier: CC-PDDC */
+
+/* Please update the license if adding licensable material. */
+
+/* dummy */
diff --git a/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
new file mode 100644
index 0000000000..b7588dcc41
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/acpi/ich10_pci_irqs.asl
@@ -0,0 +1,32 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* This is board specific information:
+ * IRQ routing for the 0:1e.0 PCI bridge of the ICH10
+ */
+
+If (PICM) {
+ Return (Package() {
+ /* PCI slot */
+ Package() { 0x0001ffff, 0, 0, 0x14},
+ Package() { 0x0001ffff, 1, 0, 0x15},
+ Package() { 0x0001ffff, 2, 0, 0x16},
+ Package() { 0x0001ffff, 3, 0, 0x17},
+
+ Package() { 0x0002ffff, 0, 0, 0x15},
+ Package() { 0x0002ffff, 1, 0, 0x16},
+ Package() { 0x0002ffff, 2, 0, 0x17},
+ Package() { 0x0002ffff, 3, 0, 0x14},
+ })
+} Else {
+ Return (Package() {
+ Package() { 0x0001ffff, 0, \_SB.PCI0.LPCB.LNKE, 0},
+ Package() { 0x0001ffff, 1, \_SB.PCI0.LPCB.LNKF, 0},
+ Package() { 0x0001ffff, 2, \_SB.PCI0.LPCB.LNKG, 0},
+ Package() { 0x0001ffff, 3, \_SB.PCI0.LPCB.LNKH, 0},
+
+ Package() { 0x0002ffff, 0, \_SB.PCI0.LPCB.LNKF, 0},
+ Package() { 0x0002ffff, 1, \_SB.PCI0.LPCB.LNKG, 0},
+ Package() { 0x0002ffff, 2, \_SB.PCI0.LPCB.LNKH, 0},
+ Package() { 0x0002ffff, 3, \_SB.PCI0.LPCB.LNKE, 0},
+ })
+}
diff --git a/src/mainboard/dell/optiplex_780/acpi/superio.asl b/src/mainboard/dell/optiplex_780/acpi/superio.asl
new file mode 100644
index 0000000000..9f3900b86c
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/acpi/superio.asl
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#undef SUPERIO_DEV
+#undef SUPERIO_PNP_BASE
+#undef IT8720F_SHOW_SP1
+#undef IT8720F_SHOW_SP2
+#undef IT8720F_SHOW_EC
+#undef IT8720F_SHOW_KBCK
+#undef IT8720F_SHOW_KBCM
+#undef IT8720F_SHOW_GPIO
+#undef IT8720F_SHOW_CIR
+#define SUPERIO_DEV SIO0
+#define SUPERIO_PNP_BASE 0x2e
+#define IT8720F_SHOW_EC 1
+#define IT8720F_SHOW_KBCK 1
+#define IT8720F_SHOW_KBCM 1
+#define IT8720F_SHOW_GPIO 1
+#include <superio/ite/it8720f/acpi/superio.asl>
diff --git a/src/mainboard/dell/optiplex_780/board_info.txt b/src/mainboard/dell/optiplex_780/board_info.txt
new file mode 100644
index 0000000000..aaf657b583
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/board_info.txt
@@ -0,0 +1,6 @@
+Category: desktop
+Board URL: https://www.acer.com/ac/en/GB/content/support-product/1137?b=1
+ROM package: SOIC-8
+ROM protocol: SPI
+ROM socketed: n
+Flashrom support: y
diff --git a/src/mainboard/dell/optiplex_780/cmos.default b/src/mainboard/dell/optiplex_780/cmos.default
new file mode 100644
index 0000000000..23f0e55f3e
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/cmos.default
@@ -0,0 +1,8 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+boot_option=Fallback
+debug_level=Debug
+power_on_after_fail=Disable
+nmi=Enable
+sata_mode=AHCI
+gfx_uma_size=64M
diff --git a/src/mainboard/dell/optiplex_780/cmos.layout b/src/mainboard/dell/optiplex_780/cmos.layout
new file mode 100644
index 0000000000..9f5012adb4
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/cmos.layout
@@ -0,0 +1,72 @@
+## SPDX-License-Identifier: GPL-2.0-only
+
+# -----------------------------------------------------------------
+entries
+
+# -----------------------------------------------------------------
+0 120 r 0 reserved_memory
+
+# -----------------------------------------------------------------
+# RTC_BOOT_BYTE (coreboot hardcoded)
+384 1 e 4 boot_option
+388 4 h 0 reboot_counter
+
+# -----------------------------------------------------------------
+# coreboot config options: console
+395 4 e 6 debug_level
+
+# coreboot config options: southbridge
+408 1 e 10 sata_mode
+409 2 e 7 power_on_after_fail
+411 1 e 1 nmi
+
+# coreboot config options: cpu
+
+# coreboot config options: northbridge
+432 4 e 11 gfx_uma_size
+
+# coreboot config options: check sums
+984 16 h 0 check_sum
+
+# -----------------------------------------------------------------
+
+enumerations
+
+#ID value text
+1 0 Disable
+1 1 Enable
+2 0 Enable
+2 1 Disable
+4 0 Fallback
+4 1 Normal
+6 0 Emergency
+6 1 Alert
+6 2 Critical
+6 3 Error
+6 4 Warning
+6 5 Notice
+6 6 Info
+6 7 Debug
+6 8 Spew
+7 0 Disable
+7 1 Enable
+7 2 Keep
+10 0 AHCI
+10 1 Compatible
+11 1 4M
+11 2 8M
+11 3 16M
+11 4 32M
+11 5 48M
+11 6 64M
+11 7 128M
+11 8 256M
+11 9 96M
+11 10 160M
+11 11 224M
+11 12 352M
+
+# -----------------------------------------------------------------
+checksums
+
+checksum 392 983 984
diff --git a/src/mainboard/dell/optiplex_780/cstates.c b/src/mainboard/dell/optiplex_780/cstates.c
new file mode 100644
index 0000000000..4adf0edc63
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/cstates.c
@@ -0,0 +1,8 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpigen.h>
+
+int get_cst_entries(const acpi_cstate_t **entries)
+{
+ return 0;
+}
diff --git a/src/mainboard/dell/optiplex_780/devicetree.cb b/src/mainboard/dell/optiplex_780/devicetree.cb
new file mode 100644
index 0000000000..95e3bd517c
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/devicetree.cb
@@ -0,0 +1,63 @@
+# SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/x4x
+ device cpu_cluster 0 on ops x4x_cpu_bus_ops end # APIC cluster
+ device domain 0 on
+ ops x4x_pci_domain_ops # PCI domain
+ subsystemid 0x8086 0x0028 inherit
+ device pci 0.0 on end # Host Bridge
+ device pci 1.0 on end # PCIe x16 2.0 slot
+ device pci 2.0 on end # Integrated graphics controller
+ device pci 2.1 on end # Integrated graphics controller 2
+ device pci 3.0 off end # ME
+ device pci 3.1 off end # ME
+ chip southbridge/intel/i82801jx # ICH10
+ register "gpe0_en" = "0x40"
+
+ # Set AHCI mode.
+ register "sata_port_map" = "0x3f"
+ register "sata_clock_request" = "1"
+
+ # Enable PCIe ports 0,1 as slots.
+ register "pcie_slot_implemented" = "0x3"
+
+ device pci 19.0 on end # GBE
+ device pci 1a.0 on end # USB
+ device pci 1a.1 on end # USB
+ device pci 1a.2 on end # USB
+ device pci 1a.7 on end # USB
+ device pci 1b.0 on end # Audio
+ device pci 1c.0 off end # PCIe 1
+ device pci 1c.1 off end # PCIe 2
+ device pci 1c.2 off end # PCIe 3
+ device pci 1c.3 off end # PCIe 4
+ device pci 1c.4 off end # PCIe 5
+ device pci 1c.5 off end # PCIe 6
+ device pci 1d.0 on end # USB
+ device pci 1d.1 on end # USB
+ device pci 1d.2 on end # USB
+ device pci 1d.7 on end # USB
+ device pci 1e.0 on end # PCI bridge
+ device pci 1f.0 on end # LPC bridge
+ device pci 1f.2 on end # SATA (IDE: port 0-3, AHCI/RAID: 0-5)
+ device pci 1f.3 on # SMBus
+ chip drivers/i2c/ck505 # IDT CV194
+ register "mask" = "{ 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff, 0xff,
+ 0xff, 0xff, 0xff }"
+ register "regs" = "{ 0x15, 0x82, 0xff, 0xff,
+ 0xff, 0x00, 0x00, 0x95,
+ 0x00, 0x65, 0x7d, 0x56,
+ 0x13, 0xc0, 0x00, 0x07,
+ 0x01, 0x0a, 0x64 }"
+ device i2c 69 on end
+ end
+ end
+ device pci 1f.4 off end
+ device pci 1f.5 off end # SATA 2 (for port 4-5 in IDE mode)
+ device pci 1f.6 off end # Thermal Subsystem
+ end
+ end
+end
diff --git a/src/mainboard/dell/optiplex_780/dsdt.asl b/src/mainboard/dell/optiplex_780/dsdt.asl
new file mode 100644
index 0000000000..9ad70469de
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/dsdt.asl
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi.h>
+DefinitionBlock(
+ "dsdt.aml",
+ "DSDT",
+ ACPI_DSDT_REV_2,
+ OEM_ID,
+ ACPI_TABLE_CREATOR,
+ 0x20090811 // OEM revision
+)
+{
+ #include <acpi/dsdt_top.asl>
+
+ OSYS = 2002
+ // global NVS and variables
+ #include <southbridge/intel/common/acpi/platform.asl>
+
+ Device (\_SB.PCI0)
+ {
+ #include <northbridge/intel/x4x/acpi/x4x.asl>
+ #include <southbridge/intel/i82801jx/acpi/ich10.asl>
+ }
+
+ #include <southbridge/intel/common/acpi/sleepstates.asl>
+}
diff --git a/src/mainboard/dell/optiplex_780/gma-mainboard.ads b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
new file mode 100644
index 0000000000..bc81cf4a40
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/gma-mainboard.ads
@@ -0,0 +1,16 @@
+-- SPDX-License-Identifier: GPL-2.0-or-later
+
+with HW.GFX.GMA;
+with HW.GFX.GMA.Display_Probing;
+
+use HW.GFX.GMA;
+use HW.GFX.GMA.Display_Probing;
+
+private package GMA.Mainboard is
+
+ ports : constant Port_List :=
+ (DP2,
+ Analog,
+ others => Disabled);
+
+end GMA.Mainboard;
diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_mt/data.vbt
new file mode 100644
index 0000000000000000000000000000000000000000..fefda9d6f226b88ab67c5b044de30a707df22fbf
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z&J)wlZ=a<yoJkutfwu4%aVXlu?i^8v?R77IyGvKcD|M`CFG$6FUmK8q<|o>3T9EmJ
z2x?*GPeN%?=Fj3+fv~4%I(nv~XF7VOqi5RsAt%13JtW>q=<<<Gei4)FzWqGEt6P8D
zA9m}s>;0IkLPSUGL%_1h)2kjaZzuV;`43yCV;I=#Jcyyw@xKE8GGX39@am|0GKhH`
zawsKv^FvHqm+<DDPT)%}_kZ8^eT88YGmG-#)X3=RRB|L^Uj_{yd%JeO<1HRZVz=Fz
z+aqUCWdF3_={#Q&&k)eF1i=WV`AbSlzo*bP?x?ir5BVVO`R34f89jWL{Z}or^BwmG
z-E;A_iWVUUWnWQl3L|~0xA@rHJRA-;7V)Y6B5=@E8R@?(?5{Eh23RefpSOGX_F{8A
z1PtU+iNng^h#C7J<vufJ9>c8*FfFsu??w)Oed@;Mg~21%rCZ%d{x!>-zmv4AyWL1E
xfz+CGUnQ7Y^TD}&c_cQRYlBC+`?m?k6Nuw??s04gg4@4`<@FO{XEbO(<xf!`#Pk3F
literal 0
HcmV?d00001
diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
new file mode 100644
index 0000000000..e2fa05cd8f
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_mt/early_init.c
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <northbridge/intel/x4x/x4x.h>
+
+void mb_get_spd_map(u8 spd_map[4])
+{
+ // BTX form factor
+ spd_map[0] = 0x53;
+ spd_map[1] = 0x52;
+ spd_map[2] = 0x51;
+ spd_map[3] = 0x50;
+}
diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
new file mode 100644
index 0000000000..9993f17c55
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_mt/gpio.c
@@ -0,0 +1,174 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <southbridge/intel/common/gpio.h>
+
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
+ .gpio0 = GPIO_MODE_NATIVE,
+ .gpio1 = GPIO_MODE_NATIVE,
+ .gpio2 = GPIO_MODE_GPIO,
+ .gpio3 = GPIO_MODE_GPIO,
+ .gpio4 = GPIO_MODE_GPIO,
+ .gpio5 = GPIO_MODE_GPIO,
+ .gpio6 = GPIO_MODE_GPIO,
+ .gpio7 = GPIO_MODE_NATIVE,
+ .gpio8 = GPIO_MODE_NATIVE,
+ .gpio9 = GPIO_MODE_GPIO,
+ .gpio10 = GPIO_MODE_GPIO,
+ .gpio11 = GPIO_MODE_NATIVE,
+ .gpio12 = GPIO_MODE_NATIVE,
+ .gpio13 = GPIO_MODE_GPIO,
+ .gpio14 = GPIO_MODE_GPIO,
+ .gpio15 = GPIO_MODE_NATIVE,
+ .gpio16 = GPIO_MODE_GPIO,
+ .gpio17 = GPIO_MODE_NATIVE,
+ .gpio18 = GPIO_MODE_GPIO,
+ .gpio19 = GPIO_MODE_GPIO,
+ .gpio20 = GPIO_MODE_GPIO,
+ .gpio21 = GPIO_MODE_GPIO,
+ .gpio22 = GPIO_MODE_GPIO,
+ .gpio23 = GPIO_MODE_NATIVE,
+ .gpio24 = GPIO_MODE_GPIO,
+ .gpio25 = GPIO_MODE_NATIVE,
+ .gpio26 = GPIO_MODE_NATIVE,
+ .gpio27 = GPIO_MODE_GPIO,
+ .gpio28 = GPIO_MODE_GPIO,
+ .gpio29 = GPIO_MODE_GPIO,
+ .gpio30 = GPIO_MODE_GPIO,
+ .gpio31 = GPIO_MODE_GPIO,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
+ .gpio2 = GPIO_DIR_INPUT,
+ .gpio3 = GPIO_DIR_INPUT,
+ .gpio4 = GPIO_DIR_INPUT,
+ .gpio5 = GPIO_DIR_INPUT,
+ .gpio6 = GPIO_DIR_INPUT,
+ .gpio9 = GPIO_DIR_OUTPUT,
+ .gpio10 = GPIO_DIR_INPUT,
+ .gpio13 = GPIO_DIR_INPUT,
+ .gpio14 = GPIO_DIR_INPUT,
+ .gpio16 = GPIO_DIR_INPUT,
+ .gpio18 = GPIO_DIR_OUTPUT,
+ .gpio19 = GPIO_DIR_INPUT,
+ .gpio20 = GPIO_DIR_OUTPUT,
+ .gpio21 = GPIO_DIR_INPUT,
+ .gpio22 = GPIO_DIR_INPUT,
+ .gpio24 = GPIO_DIR_INPUT,
+ .gpio27 = GPIO_DIR_INPUT,
+ .gpio28 = GPIO_DIR_OUTPUT,
+ .gpio29 = GPIO_DIR_INPUT,
+ .gpio30 = GPIO_DIR_INPUT,
+ .gpio31 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
+ .gpio9 = GPIO_LEVEL_HIGH,
+ .gpio18 = GPIO_LEVEL_HIGH,
+ .gpio20 = GPIO_LEVEL_HIGH,
+ .gpio28 = GPIO_LEVEL_LOW,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
+ .gpio13 = GPIO_INVERT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
+ .gpio32 = GPIO_MODE_GPIO,
+ .gpio33 = GPIO_MODE_GPIO,
+ .gpio34 = GPIO_MODE_GPIO,
+ .gpio35 = GPIO_MODE_GPIO,
+ .gpio36 = GPIO_MODE_GPIO,
+ .gpio37 = GPIO_MODE_GPIO,
+ .gpio38 = GPIO_MODE_GPIO,
+ .gpio39 = GPIO_MODE_GPIO,
+ .gpio40 = GPIO_MODE_NATIVE,
+ .gpio41 = GPIO_MODE_NATIVE,
+ .gpio42 = GPIO_MODE_NATIVE,
+ .gpio43 = GPIO_MODE_NATIVE,
+ .gpio44 = GPIO_MODE_NATIVE,
+ .gpio45 = GPIO_MODE_NATIVE,
+ .gpio46 = GPIO_MODE_NATIVE,
+ .gpio47 = GPIO_MODE_NATIVE,
+ .gpio48 = GPIO_MODE_GPIO,
+ .gpio49 = GPIO_MODE_GPIO,
+ .gpio50 = GPIO_MODE_NATIVE,
+ .gpio51 = GPIO_MODE_NATIVE,
+ .gpio52 = GPIO_MODE_NATIVE,
+ .gpio53 = GPIO_MODE_NATIVE,
+ .gpio54 = GPIO_MODE_GPIO,
+ .gpio55 = GPIO_MODE_NATIVE,
+ .gpio56 = GPIO_MODE_GPIO,
+ .gpio57 = GPIO_MODE_GPIO,
+ .gpio58 = GPIO_MODE_NATIVE,
+ .gpio59 = GPIO_MODE_NATIVE,
+ .gpio60 = GPIO_MODE_GPIO,
+ .gpio61 = GPIO_MODE_NATIVE,
+ .gpio62 = GPIO_MODE_NATIVE,
+ .gpio63 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
+ .gpio32 = GPIO_DIR_INPUT,
+ .gpio33 = GPIO_DIR_INPUT,
+ .gpio34 = GPIO_DIR_INPUT,
+ .gpio35 = GPIO_DIR_OUTPUT,
+ .gpio36 = GPIO_DIR_INPUT,
+ .gpio37 = GPIO_DIR_INPUT,
+ .gpio38 = GPIO_DIR_INPUT,
+ .gpio39 = GPIO_DIR_INPUT,
+ .gpio48 = GPIO_DIR_INPUT,
+ .gpio49 = GPIO_DIR_OUTPUT,
+ .gpio54 = GPIO_DIR_INPUT,
+ .gpio56 = GPIO_DIR_OUTPUT,
+ .gpio57 = GPIO_DIR_INPUT,
+ .gpio60 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
+ .gpio35 = GPIO_LEVEL_LOW,
+ .gpio49 = GPIO_LEVEL_HIGH,
+ .gpio56 = GPIO_LEVEL_HIGH,
+ .gpio60 = GPIO_LEVEL_LOW,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
+ .gpio64 = GPIO_MODE_NATIVE,
+ .gpio65 = GPIO_MODE_NATIVE,
+ .gpio66 = GPIO_MODE_NATIVE,
+ .gpio67 = GPIO_MODE_NATIVE,
+ .gpio68 = GPIO_MODE_NATIVE,
+ .gpio69 = GPIO_MODE_NATIVE,
+ .gpio70 = GPIO_MODE_NATIVE,
+ .gpio71 = GPIO_MODE_NATIVE,
+ .gpio72 = GPIO_MODE_GPIO,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
+ .gpio72 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
+};
+
+const struct pch_gpio_map mainboard_gpio_map = {
+ .set1 = {
+ .mode = &pch_gpio_set1_mode,
+ .direction = &pch_gpio_set1_direction,
+ .level = &pch_gpio_set1_level,
+ .blink = &pch_gpio_set1_blink,
+ .invert = &pch_gpio_set1_invert,
+ },
+ .set2 = {
+ .mode = &pch_gpio_set2_mode,
+ .direction = &pch_gpio_set2_direction,
+ .level = &pch_gpio_set2_level,
+ },
+ .set3 = {
+ .mode = &pch_gpio_set3_mode,
+ .direction = &pch_gpio_set3_direction,
+ .level = &pch_gpio_set3_level,
+ },
+};
diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
new file mode 100644
index 0000000000..4158bcf899
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_mt/hda_verb.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ /* coreboot specific header */
+ 0x11d4194a, /* Analog Devices AD1984A */
+ 0xbfd40000, /* Subsystem ID */
+ 10, /* Number of entries */
+
+ /* Pin Widget Verb Table */
+ AZALIA_PIN_CFG(0, 0x11, 0x032140f0),
+ AZALIA_PIN_CFG(0, 0x12, 0x21214010),
+ AZALIA_PIN_CFG(0, 0x13, 0x901701f0),
+ AZALIA_PIN_CFG(0, 0x14, 0x03a190f0),
+ AZALIA_PIN_CFG(0, 0x15, 0xb7a70121),
+ AZALIA_PIN_CFG(0, 0x16, 0x9933012e),
+ AZALIA_PIN_CFG(0, 0x17, 0x97a601f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x90f301f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x014510f0),
+ AZALIA_PIN_CFG(0, 0x1c, 0x21a19020),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
new file mode 100644
index 0000000000..555b1c1f5c
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_mt/overridetree.cb
@@ -0,0 +1,10 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/x4x
+ device domain 0 on
+ chip southbridge/intel/i82801jx
+ device pci 1c.0 on end # PCIe 1
+ device pci 1c.1 on end # PCIe 2
+ end
+ end
+end
--
2.39.5

205
patches/coreboot-2412/0005-util-ifdtool-add-nuke-flag-all-0xFF-on-region.patch
View File

@ -1,205 +0,0 @@
From 27b2f2bc24e5e860b87119c963e534fb0d3e55f2 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Sun, 19 Feb 2023 18:21:43 +0000
Subject: [PATCH 05/11] util/ifdtool: add --nuke flag (all 0xFF on region)
When this option is used, the region's contents are overwritten
with all ones (0xFF).
Example:
./ifdtool --nuke gbe coreboot.rom
./ifdtool --nuke bios coreboot.com
./ifdtool --nuke me coreboot.com
Rebased since the last revision update in lbmk.
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
util/ifdtool/ifdtool.c | 114 ++++++++++++++++++++++++++++++-----------
1 file changed, 83 insertions(+), 31 deletions(-)
diff --git a/util/ifdtool/ifdtool.c b/util/ifdtool/ifdtool.c
index 94105efe52..0706496af2 100644
--- a/util/ifdtool/ifdtool.c
+++ b/util/ifdtool/ifdtool.c
@@ -2230,6 +2230,7 @@ static void print_usage(const char *name)
" tgl - Tiger Lake\n"
" wbg - Wellsburg\n"
" -S | --setpchstrap Write a PCH strap\n"
+ " -N | --nuke <region> Overwrite the specified region with 0xFF (all ones)\n"
" -V | --newvalue The new value to write into PCH strap specified by -S\n"
" -v | --version: print the version\n"
" -h | --help: print this help\n\n"
@@ -2238,6 +2239,60 @@ static void print_usage(const char *name)
"\n");
}
+static int
+get_region_type_string(const char *region_type_string)
+{
+ if (!strcasecmp("Descriptor", region_type_string))
+ return 0;
+ else if (!strcasecmp("BIOS", region_type_string))
+ return 1;
+ else if (!strcasecmp("ME", region_type_string))
+ return 2;
+ else if (!strcasecmp("GbE", region_type_string))
+ return 3;
+ else if (!strcasecmp("Platform Data", region_type_string))
+ return 4;
+ else if (!strcasecmp("Device Exp1", region_type_string))
+ return 5;
+ else if (!strcasecmp("Secondary BIOS", region_type_string))
+ return 6;
+ else if (!strcasecmp("Reserved", region_type_string))
+ return 7;
+ else if (!strcasecmp("EC", region_type_string))
+ return 8;
+ else if (!strcasecmp("Device Exp2", region_type_string))
+ return 9;
+ else if (!strcasecmp("IE", region_type_string))
+ return 10;
+ else if (!strcasecmp("10GbE_0", region_type_string))
+ return 11;
+ else if (!strcasecmp("10GbE_1", region_type_string))
+ return 12;
+ else if (!strcasecmp("PTT", region_type_string))
+ return 15;
+ return -1;
+}
+
+static void
+nuke(const char *filename, char *image, int size, int region_type)
+{
+ int i;
+ struct region region;
+ const struct frba *frba = find_frba(image, size);
+ if (!frba)
+ exit(EXIT_FAILURE);
+
+ region = get_region(frba, region_type);
+ if (region.size > 0) {
+ for (i = region.base; i <= region.limit; i++) {
+ if ((i + 1) > (size))
+ break;
+ image[i] = 0xFF;
+ }
+ write_image(filename, image, size);
+ }
+}
+
int main(int argc, char *argv[])
{
int opt, option_index = 0;
@@ -2245,6 +2300,7 @@ int main(int argc, char *argv[])
int mode_em100 = 0, mode_locked = 0, mode_unlocked = 0, mode_validate = 0;
int mode_layout = 0, mode_newlayout = 0, mode_density = 0, mode_setstrap = 0;
int mode_read = 0, mode_altmedisable = 0, altmedisable = 0, mode_fmap_template = 0;
+ int mode_nuke = 0;
int mode_gpr0_disable = 0, mode_gpr0_enable = 0, mode_gpr0_status = 0;
char *region_type_string = NULL, *region_fname = NULL, *layout_fname = NULL;
char *new_filename = NULL;
@@ -2279,6 +2335,7 @@ int main(int argc, char *argv[])
{"validate", 0, NULL, 't'},
{"setpchstrap", 1, NULL, 'S'},
{"newvalue", 1, NULL, 'V'},
+ {"nuke", 1, NULL, 'N'},
{0, 0, 0, 0}
};
@@ -2328,35 +2385,8 @@ int main(int argc, char *argv[])
region_fname++;
// Descriptor, BIOS, ME, GbE, Platform
// valid type?
- if (!strcasecmp("Descriptor", region_type_string))
- region_type = 0;
- else if (!strcasecmp("BIOS", region_type_string))
- region_type = 1;
- else if (!strcasecmp("ME", region_type_string))
- region_type = 2;
- else if (!strcasecmp("GbE", region_type_string))
- region_type = 3;
- else if (!strcasecmp("Platform Data", region_type_string))
- region_type = 4;
- else if (!strcasecmp("Device Exp1", region_type_string))
- region_type = 5;
- else if (!strcasecmp("Secondary BIOS", region_type_string))
- region_type = 6;
- else if (!strcasecmp("Reserved", region_type_string))
- region_type = 7;
- else if (!strcasecmp("EC", region_type_string))
- region_type = 8;
- else if (!strcasecmp("Device Exp2", region_type_string))
- region_type = 9;
- else if (!strcasecmp("IE", region_type_string))
- region_type = 10;
- else if (!strcasecmp("10GbE_0", region_type_string))
- region_type = 11;
- else if (!strcasecmp("10GbE_1", region_type_string))
- region_type = 12;
- else if (!strcasecmp("PTT", region_type_string))
- region_type = 15;
- if (region_type == -1) {
+ if ((region_type =
+ get_region_type_string(region_type_string)) == -1) {
fprintf(stderr, "No such region type: '%s'\n\n",
region_type_string);
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
@@ -2533,6 +2563,22 @@ int main(int argc, char *argv[])
case 't':
mode_validate = 1;
break;
+ case 'N':
+ region_type_string = strdup(optarg);
+ if (!region_type_string) {
+ fprintf(stderr, "No region specified\n");
+ print_usage(argv[0]);
+ exit(EXIT_FAILURE);
+ }
+ if ((region_type =
+ get_region_type_string(region_type_string)) == -1) {
+ fprintf(stderr, "No such region type: '%s'\n\n",
+ region_type_string);
+ print_usage(argv[0]);
+ exit(EXIT_FAILURE);
+ }
+ mode_nuke = 1;
+ break;
case 'v':
print_version();
exit(EXIT_SUCCESS);
@@ -2552,7 +2598,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + (mode_spifreq | mode_em100 |
mode_unlocked | mode_locked) + mode_altmedisable + mode_validate +
- (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) > 1) {
+ (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
+ mode_nuke) > 1) {
fprintf(stderr, "You may not specify more than one mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2561,7 +2608,8 @@ int main(int argc, char *argv[])
if ((mode_dump + mode_layout + mode_fmap_template + mode_extract + mode_inject +
mode_setstrap + mode_newlayout + mode_spifreq + mode_em100 +
mode_locked + mode_unlocked + mode_density + mode_altmedisable +
- mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status) == 0) {
+ mode_validate + (mode_gpr0_disable | mode_gpr0_enable) + mode_gpr0_status +
+ mode_nuke) == 0) {
fprintf(stderr, "You need to specify a mode.\n\n");
fprintf(stderr, "run '%s -h' for usage\n", argv[0]);
exit(EXIT_FAILURE);
@@ -2674,6 +2722,10 @@ int main(int argc, char *argv[])
write_image(new_filename, image, size);
}
+ if (mode_nuke) {
+ nuke(new_filename, image, size, region_type);
+ }
+
if (mode_altmedisable) {
struct fpsba *fpsba = find_fpsba(image, size);
struct fmsba *fmsba = find_fmsba(image, size);
--
2.39.5

39
patches/coreboot-2412/0006-Remove-warning-for-coreboot-images-built-without-a-p.patch
View File

@ -1,39 +0,0 @@
From 8230acfb9e1f692202b306ffb10fe89f783ab4e8 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Fri, 12 May 2023 19:55:15 -0600
Subject: [PATCH 06/11] Remove warning for coreboot images built without a
payload
I added this in upstream to prevent people from accidentally flashing
roms without a payload resulting in a no boot situation, but in
libreboot lbmk handles the payload and thus this warning always comes
up. This has caused confusion and concern so just patch it out.
---
payloads/Makefile.mk | 13 +------------
1 file changed, 1 insertion(+), 12 deletions(-)
diff --git a/payloads/Makefile.mk b/payloads/Makefile.mk
index 5f988dac1b..516133880f 100644
--- a/payloads/Makefile.mk
+++ b/payloads/Makefile.mk
@@ -50,16 +50,5 @@ distclean-payloads:
print-repo-info-payloads:
-$(foreach payload, $(PAYLOADS_LIST), $(MAKE) -C $(payload) print-repo-info 2>/dev/null; )
-ifeq ($(CONFIG_PAYLOAD_NONE),y)
-show_notices:: warn_no_payload
-endif
-
-warn_no_payload:
- printf "\n\t** WARNING **\n"
- printf "coreboot has been built without a payload. Writing\n"
- printf "a coreboot image without a payload to your board's\n"
- printf "flash chip will result in a non-booting system. You\n"
- printf "can use cbfstool to add a payload to the image.\n\n"
-
.PHONY: force-payload coreinfo nvramcui
-.PHONY: clean-payloads distclean-payloads print-repo-info-payloads warn_no_payload
+.PHONY: clean-payloads distclean-payloads print-repo-info-payloads
--
2.39.5

326
patches/coreboot-2412/0007-mb-dell-optiplex_780-Add-USFF-variant.patch
View File

@ -1,326 +0,0 @@
From 41b93b8786ba14830648cd166f86b6317d655359 Mon Sep 17 00:00:00 2001
From: Nicholas Chin <nic.c3.14@gmail.com>
Date: Wed, 30 Oct 2024 20:55:25 -0600
Subject: [PATCH 07/11] mb/dell/optiplex_780: Add USFF variant
Change-Id: I3aa21c743749f4a11a2501f4c121316bd2f1a103
Signed-off-by: Nicholas Chin <nic.c3.14@gmail.com>
---
src/mainboard/dell/optiplex_780/Kconfig | 5 +
src/mainboard/dell/optiplex_780/Kconfig.name | 3 +
.../optiplex_780/variants/780_usff/data.vbt | Bin 0 -> 1917 bytes
.../variants/780_usff/early_init.c | 9 +
.../optiplex_780/variants/780_usff/gpio.c | 166 ++++++++++++++++++
.../optiplex_780/variants/780_usff/hda_verb.c | 26 +++
.../variants/780_usff/overridetree.cb | 10 ++
7 files changed, 219 insertions(+)
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
create mode 100644 src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
diff --git a/src/mainboard/dell/optiplex_780/Kconfig b/src/mainboard/dell/optiplex_780/Kconfig
index 2d06c75c9a..fc649e35d5 100644
--- a/src/mainboard/dell/optiplex_780/Kconfig
+++ b/src/mainboard/dell/optiplex_780/Kconfig
@@ -20,6 +20,9 @@ config BOARD_DELL_OPTIPLEX_780_COMMON
config BOARD_DELL_OPTIPLEX_780_MT
select BOARD_DELL_OPTIPLEX_780_COMMON
+config BOARD_DELL_OPTIPLEX_780_USFF
+ select BOARD_DELL_OPTIPLEX_780_COMMON
+
if BOARD_DELL_OPTIPLEX_780_COMMON
config VGA_BIOS_ID
@@ -30,11 +33,13 @@ config MAINBOARD_DIR
config MAINBOARD_PART_NUMBER
default "OptiPlex 780 MT" if BOARD_DELL_OPTIPLEX_780_MT
+ default "OptiPlex 780 USFF" if BOARD_DELL_OPTIPLEX_780_USFF
config OVERRIDE_DEVICETREE
default "variants/\$(CONFIG_VARIANT_DIR)/overridetree.cb"
config VARIANT_DIR
default "780_mt" if BOARD_DELL_OPTIPLEX_780_MT
+ default "780_usff" if BOARD_DELL_OPTIPLEX_780_USFF
endif # BOARD_DELL_OPTIPLEX_780_COMMON
diff --git a/src/mainboard/dell/optiplex_780/Kconfig.name b/src/mainboard/dell/optiplex_780/Kconfig.name
index db7f2e8fe3..bc84c82a79 100644
--- a/src/mainboard/dell/optiplex_780/Kconfig.name
+++ b/src/mainboard/dell/optiplex_780/Kconfig.name
@@ -2,3 +2,6 @@
config BOARD_DELL_OPTIPLEX_780_MT
bool "OptiPlex 780 MT"
+
+config BOARD_DELL_OPTIPLEX_780_USFF
+ bool "OptiPlex 780 USFF"
diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt b/src/mainboard/dell/optiplex_780/variants/780_usff/data.vbt
new file mode 100644
index 0000000000000000000000000000000000000000..dbd764f285ed18f7ee9c54bc777560138bd9b5f7
GIT binary patch
literal 1917
zcmd6nO>7%Q6vzLwGv3{}j$^l`v7@w1q*9sEq+2(b3K>`@c5#TSx@i<uQKf!)+gO;|
zveT#>P+W+B10OwbsGtX=N(gc4jSGjKDkP+yIUo^nsel8$^ny^9H?td8Ra=EiCEn=G
z@6DV4?!2AdojnUv^Rirgvs$heXUkGs9S+{Jc2WPhP0buTak^BTFP@&N9-E$(UtuSX
zS{r`=b+EX|Ig`2a*^5oDdG>8jE-1BBxs`*jgrf_sj_fP;%L|PwURRcCFBMCroNRQv
zmp$2TUhc}qJMB(u#jDG@x6(N85thC4%Z=8hiN}lj&zb2~``u3C;?lCrPQOTnInFqB
zhvdwqWv?lxTb=fVEH;~RPHDPw&g*&|s$pU<Iv53Rb6YTgMPOY8;~P1Yglh^6Fgt1^
zCTz|SVPcSpZ44F@&oNPUMO@&BE3y(57YP_Y!4SZhE?GXYa7k+b0(X|s7u3GDRf^1#
zOd2ZCCPO|I&sHEt;p8UshhHtYQ>7!7x2m<d`Gu2<r+Qc4|6pwd8&zFboH_W7XE7uU
zWW-@Cim&mdY2!O{JANR)OTJG2z>LBtAF!g>K`zPnkx!DpPHuk6{_zc*0qi7)Aet$T
z1ks@8hWS#+6cI5)j1oD86{5PX8Zu2(^OC6M`<pE+J?KFZ=&_JVP1YL=#z<-Q*24K4
zn+$YxrHNJJc`k?_8N=Kres26_#E8GLn2{jfW5P%ge`kL(Btkt=>xo)V)Ow=U6P12c
z=U0uNC9T9v{)-|#h(mSX*hSA8)ZeocL7l4J&!{RSO{6~oTtyn535j!RQh#GA*wTF8
zvasRbO~d!?*FbM3K`W?lHx=v*(jiARIhWyh4^io|;n?@1H>uqJy>0sjV-Dt)_=%bE
zgNO3D@uE5m+7aqi?Y8b+inye%Z=HUmgBtaZ3Lc%OLt+bo+)5BjVwT<{mxT`nde$vb
zV99s{>`r76L#Hr6XW6r|<iq#4Jr?XsxKyeJKEj7;e4SZ^1B12u&iV_9M0*Kem@fmn
z1C>>HT47I`**Q#Vu0QW!^VP-9S{xXzpq_zS#9k-;aXz?b+S!Ne$Kkk6dq<Gj{q2D(
z>&Hj-x+kx1W-4#E&beDT*S)=&NoSE?<-w!G@~aW()0ZN4O&=Q+nZa)p%Vd$k-_$a=
T#w3FFBiyj<XAh$hb(enud`r7S
literal 0
HcmV?d00001
diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
new file mode 100644
index 0000000000..2a55fc3a6e
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_usff/early_init.c
@@ -0,0 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <northbridge/intel/x4x/x4x.h>
+
+void mb_get_spd_map(u8 spd_map[4])
+{
+ spd_map[0] = 0x50;
+ spd_map[2] = 0x52;
+}
diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
new file mode 100644
index 0000000000..389f4077d7
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_usff/gpio.c
@@ -0,0 +1,166 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <southbridge/intel/common/gpio.h>
+
+static const struct pch_gpio_set1 pch_gpio_set1_mode = {
+ .gpio0 = GPIO_MODE_NATIVE,
+ .gpio1 = GPIO_MODE_NATIVE,
+ .gpio2 = GPIO_MODE_GPIO,
+ .gpio3 = GPIO_MODE_GPIO,
+ .gpio4 = GPIO_MODE_GPIO,
+ .gpio5 = GPIO_MODE_GPIO,
+ .gpio6 = GPIO_MODE_GPIO,
+ .gpio7 = GPIO_MODE_NATIVE,
+ .gpio8 = GPIO_MODE_NATIVE,
+ .gpio9 = GPIO_MODE_GPIO,
+ .gpio10 = GPIO_MODE_GPIO,
+ .gpio11 = GPIO_MODE_NATIVE,
+ .gpio12 = GPIO_MODE_NATIVE,
+ .gpio13 = GPIO_MODE_GPIO,
+ .gpio14 = GPIO_MODE_GPIO,
+ .gpio15 = GPIO_MODE_NATIVE,
+ .gpio16 = GPIO_MODE_GPIO,
+ .gpio17 = GPIO_MODE_NATIVE,
+ .gpio18 = GPIO_MODE_GPIO,
+ .gpio19 = GPIO_MODE_GPIO,
+ .gpio20 = GPIO_MODE_GPIO,
+ .gpio21 = GPIO_MODE_GPIO,
+ .gpio22 = GPIO_MODE_GPIO,
+ .gpio23 = GPIO_MODE_NATIVE,
+ .gpio24 = GPIO_MODE_GPIO,
+ .gpio25 = GPIO_MODE_NATIVE,
+ .gpio26 = GPIO_MODE_NATIVE,
+ .gpio27 = GPIO_MODE_GPIO,
+ .gpio28 = GPIO_MODE_GPIO,
+ .gpio29 = GPIO_MODE_GPIO,
+ .gpio30 = GPIO_MODE_GPIO,
+ .gpio31 = GPIO_MODE_GPIO,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_direction = {
+ .gpio2 = GPIO_DIR_INPUT,
+ .gpio3 = GPIO_DIR_INPUT,
+ .gpio4 = GPIO_DIR_INPUT,
+ .gpio5 = GPIO_DIR_INPUT,
+ .gpio6 = GPIO_DIR_INPUT,
+ .gpio9 = GPIO_DIR_OUTPUT,
+ .gpio10 = GPIO_DIR_INPUT,
+ .gpio13 = GPIO_DIR_INPUT,
+ .gpio14 = GPIO_DIR_INPUT,
+ .gpio16 = GPIO_DIR_INPUT,
+ .gpio18 = GPIO_DIR_OUTPUT,
+ .gpio19 = GPIO_DIR_INPUT,
+ .gpio20 = GPIO_DIR_OUTPUT,
+ .gpio21 = GPIO_DIR_INPUT,
+ .gpio22 = GPIO_DIR_INPUT,
+ .gpio24 = GPIO_DIR_INPUT,
+ .gpio27 = GPIO_DIR_INPUT,
+ .gpio28 = GPIO_DIR_OUTPUT,
+ .gpio29 = GPIO_DIR_INPUT,
+ .gpio30 = GPIO_DIR_INPUT,
+ .gpio31 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_level = {
+ .gpio9 = GPIO_LEVEL_HIGH,
+ .gpio18 = GPIO_LEVEL_HIGH,
+ .gpio20 = GPIO_LEVEL_HIGH,
+ .gpio28 = GPIO_LEVEL_HIGH,
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_blink = {
+};
+
+static const struct pch_gpio_set1 pch_gpio_set1_invert = {
+ .gpio13 = GPIO_INVERT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_mode = {
+ .gpio32 = GPIO_MODE_GPIO,
+ .gpio33 = GPIO_MODE_GPIO,
+ .gpio34 = GPIO_MODE_GPIO,
+ .gpio35 = GPIO_MODE_GPIO,
+ .gpio36 = GPIO_MODE_GPIO,
+ .gpio37 = GPIO_MODE_GPIO,
+ .gpio38 = GPIO_MODE_GPIO,
+ .gpio39 = GPIO_MODE_GPIO,
+ .gpio40 = GPIO_MODE_NATIVE,
+ .gpio41 = GPIO_MODE_NATIVE,
+ .gpio42 = GPIO_MODE_NATIVE,
+ .gpio43 = GPIO_MODE_NATIVE,
+ .gpio44 = GPIO_MODE_NATIVE,
+ .gpio45 = GPIO_MODE_NATIVE,
+ .gpio46 = GPIO_MODE_NATIVE,
+ .gpio47 = GPIO_MODE_NATIVE,
+ .gpio48 = GPIO_MODE_GPIO,
+ .gpio49 = GPIO_MODE_GPIO,
+ .gpio50 = GPIO_MODE_NATIVE,
+ .gpio51 = GPIO_MODE_NATIVE,
+ .gpio52 = GPIO_MODE_NATIVE,
+ .gpio53 = GPIO_MODE_NATIVE,
+ .gpio54 = GPIO_MODE_GPIO,
+ .gpio55 = GPIO_MODE_NATIVE,
+ .gpio56 = GPIO_MODE_GPIO,
+ .gpio57 = GPIO_MODE_GPIO,
+ .gpio58 = GPIO_MODE_NATIVE,
+ .gpio59 = GPIO_MODE_NATIVE,
+ .gpio60 = GPIO_MODE_GPIO,
+ .gpio61 = GPIO_MODE_NATIVE,
+ .gpio62 = GPIO_MODE_NATIVE,
+ .gpio63 = GPIO_MODE_NATIVE,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_direction = {
+ .gpio32 = GPIO_DIR_INPUT,
+ .gpio33 = GPIO_DIR_INPUT,
+ .gpio34 = GPIO_DIR_INPUT,
+ .gpio35 = GPIO_DIR_OUTPUT,
+ .gpio36 = GPIO_DIR_INPUT,
+ .gpio37 = GPIO_DIR_INPUT,
+ .gpio38 = GPIO_DIR_INPUT,
+ .gpio39 = GPIO_DIR_INPUT,
+ .gpio48 = GPIO_DIR_INPUT,
+ .gpio49 = GPIO_DIR_OUTPUT,
+ .gpio54 = GPIO_DIR_INPUT,
+ .gpio56 = GPIO_DIR_OUTPUT,
+ .gpio57 = GPIO_DIR_INPUT,
+ .gpio60 = GPIO_DIR_OUTPUT,
+};
+
+static const struct pch_gpio_set2 pch_gpio_set2_level = {
+ .gpio35 = GPIO_LEVEL_LOW,
+ .gpio49 = GPIO_LEVEL_HIGH,
+ .gpio56 = GPIO_LEVEL_HIGH,
+ .gpio60 = GPIO_LEVEL_LOW,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_mode = {
+ .gpio72 = GPIO_MODE_GPIO,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_direction = {
+ .gpio72 = GPIO_DIR_INPUT,
+};
+
+static const struct pch_gpio_set3 pch_gpio_set3_level = {
+};
+
+const struct pch_gpio_map mainboard_gpio_map = {
+ .set1 = {
+ .mode = &pch_gpio_set1_mode,
+ .direction = &pch_gpio_set1_direction,
+ .level = &pch_gpio_set1_level,
+ .blink = &pch_gpio_set1_blink,
+ .invert = &pch_gpio_set1_invert,
+ },
+ .set2 = {
+ .mode = &pch_gpio_set2_mode,
+ .direction = &pch_gpio_set2_direction,
+ .level = &pch_gpio_set2_level,
+ },
+ .set3 = {
+ .mode = &pch_gpio_set3_mode,
+ .direction = &pch_gpio_set3_direction,
+ .level = &pch_gpio_set3_level,
+ },
+};
diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
new file mode 100644
index 0000000000..c94e06b156
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_usff/hda_verb.c
@@ -0,0 +1,26 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#include <device/azalia_device.h>
+
+const u32 cim_verb_data[] = {
+ /* coreboot specific header */
+ 0x11d4194a, /* Analog Devices AD1984A */
+ 0x10280420, /* Subsystem ID */
+ 10, /* Number of entries */
+
+ /* Pin Widget Verb Table */
+ AZALIA_PIN_CFG(0, 0x11, 0x02214040),
+ AZALIA_PIN_CFG(0, 0x12, 0x01014010),
+ AZALIA_PIN_CFG(0, 0x13, 0x991301f0),
+ AZALIA_PIN_CFG(0, 0x14, 0x02a19020),
+ AZALIA_PIN_CFG(0, 0x15, 0x01813030),
+ AZALIA_PIN_CFG(0, 0x16, 0x413301f0),
+ AZALIA_PIN_CFG(0, 0x17, 0x41a601f0),
+ AZALIA_PIN_CFG(0, 0x1a, 0x41f301f0),
+ AZALIA_PIN_CFG(0, 0x1b, 0x414501f0),
+ AZALIA_PIN_CFG(0, 0x1c, 0x413301f0),
+};
+
+const u32 pc_beep_verbs[0] = {};
+
+AZALIA_ARRAY_SIZES;
diff --git a/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
new file mode 100644
index 0000000000..555b1c1f5c
--- /dev/null
+++ b/src/mainboard/dell/optiplex_780/variants/780_usff/overridetree.cb
@@ -0,0 +1,10 @@
+## SPDX-License-Identifier: GPL-2.0-or-later
+
+chip northbridge/intel/x4x
+ device domain 0 on
+ chip southbridge/intel/i82801jx
+ device pci 1c.0 on end # PCIe 1
+ device pci 1c.1 on end # PCIe 2
+ end
+ end
+end
--
2.39.5

49
patches/coreboot-2412/0008-dell-3050micro-disable-nvme-hotplug.patch
View File

@ -1,49 +0,0 @@
From c8192c52b2bfa93aeb6c6639476ca217e33c4313 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Wed, 11 Dec 2024 01:06:01 +0000
Subject: [PATCH 08/11] dell/3050micro: disable nvme hotplug
in my testing, when running my 3050micro for a few days,
the nvme would sometimes randomly rename.
e.g. nvme0n1 renamed to nvme0n2
this might cause crashes in linux, if booting only from the
nvme. in my case, i was booting from mdraid (sata+nvme) and
every few days, the nvme would rename at least once, causing
my RAID to become unsynced. since i'm using RAID1, this was
OK and I could simply re-sync the array, but this is quite
precarious indeed. if you're using raid0, that will potentially
corrupt your RAID array indefinitely.
this same issue manifested on the T480/T480 thinkpads, and
S3 resume would break because of that, when booting from nvme,
because the nvme would be "unplugged" and appear to linux as a
new device (the one that you booted from).
the fix there was to disable hotplugging on that pci-e slot
for the nvme, so apply the same fix here for 3050 micro
Signed-off-by: Leah Rowe <leah@libreboot.org>
---
src/mainboard/dell/optiplex_3050/devicetree.cb | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/src/mainboard/dell/optiplex_3050/devicetree.cb b/src/mainboard/dell/optiplex_3050/devicetree.cb
index 039709aa4a..0678ed1765 100644
--- a/src/mainboard/dell/optiplex_3050/devicetree.cb
+++ b/src/mainboard/dell/optiplex_3050/devicetree.cb
@@ -45,7 +45,9 @@ chip soc/intel/skylake
register "PcieRpAdvancedErrorReporting[20]" = "1"
register "PcieRpLtrEnable[20]" = "1"
register "PcieRpClkSrcNumber[20]" = "3"
- register "PcieRpHotPlug[20]" = "1"
+# disable hotplug on nvme to prevent renaming e.g. nvme0n1 rename to nvme0n2,
+# which could cause crashes in linux if booting from nvme
+ register "PcieRpHotPlug[20]" = "0"
end
# Realtek LAN
--
2.39.5

36
patches/coreboot-2412/0010-soc-intel-skylake-Don-t-compress-FSP-S.patch
View File

@ -1,36 +0,0 @@
From f08dbaacf747eb198bbc8f83e0220ca803f19116 Mon Sep 17 00:00:00 2001
From: Leah Rowe <info@minifree.org>
Date: Thu, 26 Dec 2024 19:45:20 +0000
Subject: [PATCH 10/11] soc/intel/skylake: Don't compress FSP-S
Build systems like lbmk need to reproducibly insert
certain vendor files on release images.
Compression isn't always reproducible, and making it
so costs a lot more time than simply disabling compression.
With this change, the FSP-S module will now be inserted
without compression, which means that there will now be
about 40KB of extra space used in the flash.
Signed-off-by: Leah Rowe <info@minifree.org>
---
src/soc/intel/skylake/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig
index c24df2ef75..8e25f796ed 100644
--- a/src/soc/intel/skylake/Kconfig
+++ b/src/soc/intel/skylake/Kconfig
@@ -12,7 +12,7 @@ config SOC_INTEL_COMMON_SKYLAKE_BASE
select CPU_SUPPORTS_PM_TIMER_EMULATION
select DRIVERS_USB_ACPI
select EDK2_CPU_TIMER_LIB if PAYLOAD_EDK2
- select FSP_COMPRESS_FSP_S_LZ4
+# select FSP_COMPRESS_FSP_S_LZ4
select FSP_M_XIP
select GENERIC_GPIO_LIB
select HAVE_FSP_GOP
--
2.39.5