Merge branch 'master' into make-4.2.1

This commit is contained in:
tlaurion 2019-04-22 21:53:43 -04:00 committed by GitHub
commit 64c830e652
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108 changed files with 135671 additions and 6623 deletions

1
.gitignore vendored
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@ -15,7 +15,6 @@ config/*.old
*.log *.log
*~ *~
crossgcc crossgcc
install
clean clean
*.map *.map
*.sec *.sec

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@ -414,13 +414,15 @@ bin_modules-$(CONFIG_PCIUTILS) += pciutils
bin_modules-$(CONFIG_FLASHROM) += flashrom bin_modules-$(CONFIG_FLASHROM) += flashrom
bin_modules-$(CONFIG_CRYPTSETUP) += cryptsetup bin_modules-$(CONFIG_CRYPTSETUP) += cryptsetup
bin_modules-$(CONFIG_GPG) += gpg bin_modules-$(CONFIG_GPG) += gpg
bin_modules-$(CONFIG_GPG2) += gpg2
bin_modules-$(CONFIG_PINENTRY) += pinentry
bin_modules-$(CONFIG_LVM2) += lvm2 bin_modules-$(CONFIG_LVM2) += lvm2
bin_modules-$(CONFIG_DROPBEAR) += dropbear bin_modules-$(CONFIG_DROPBEAR) += dropbear
bin_modules-$(CONFIG_FLASHTOOLS) += flashtools bin_modules-$(CONFIG_FLASHTOOLS) += flashtools
bin_modules-$(CONFIG_NEWT) += newt bin_modules-$(CONFIG_NEWT) += newt
bin_modules-$(CONFIG_CAIRO) += cairo bin_modules-$(CONFIG_CAIRO) += cairo
bin_modules-$(CONFIG_FBWHIPTAIL) += fbwhiptail bin_modules-$(CONFIG_FBWHIPTAIL) += fbwhiptail
bin_modules-$(CONFIG_NITROKEY) += nitrokey-hotp-verification bin_modules-$(CONFIG_LIBREMKEY) += libremkey-hotp-verification
$(foreach m, $(bin_modules-y), \ $(foreach m, $(bin_modules-y), \
$(call map,initrd_bin_add,$(call bins,$m)) \ $(call map,initrd_bin_add,$(call bins,$m)) \
@ -566,7 +568,7 @@ real.clean:
rm -rf "build/$$dir"; \ rm -rf "build/$$dir"; \
fi; \ fi; \
done done
rm -rf ./install cd install && rm -rf -- *
else else

124
blobs/librem_kbl/get_blobs.sh Executable file
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@ -0,0 +1,124 @@
#!/bin/bash -e
# depends on : wget sha256sum gunzip
# Purism source
PURISM_SOURCE="https://source.puri.sm/coreboot/releases/raw/master"
# Librem 13 v4 and Librem 15 v4 binary blob hashes
KBL_UCODE_SHA="a420274eecca369fcca465cc46725d61c0ae8ca2e18f201b1751faf9e081fb2e"
KBL_DESCRIPTOR_SHA="642ca36f52aabb5198b82e013bf64a73a5148693a58376fffce322a4d438b524"
KBL_ME_SHA="0eec2e1135193941edd39d0ec0f463e353d0c6c9068867a2f32a72b64334fb34"
KBL_FSPM_SHA="5da3ad7718eb3f6700fb9d97be988d9c8bdd2d8b5910273a80928c49122d5b2d"
KBL_FSPS_SHA="c81ffa40df0b6cd6cfde4f476d452a1f6f2217bc96a3b98a4fa4a037ee7039cf"
KBL_VBT_SHA="0ba40c1b8c0fb030a0e1a789eda8b2a7369339a410ad8c4620719e451ea69b98"
# cbfstool, ifdtool, coreboot image from Purism repo
CBFSTOOL_FILE="cbfstool.gz"
CBFSTOOL_URL="$PURISM_SOURCE/tools/$CBFSTOOL_FILE"
CBFSTOOL_SHA="3994cba01a51dd34388c8be89fd329f91575c12e499dfe1b81975d9fd115ce58"
CBFSTOOL_BIN="./cbfstool"
IFDTOOL_FILE="ifdtool.gz"
IFDTOOL_URL="$PURISM_SOURCE/tools/$IFDTOOL_FILE"
IFDTOOL_SHA="08228ece4968794499ebd49a851f7d3f7f1b81352da8cd6e0c7916ac931a7d72"
IFDTOOL_BIN="./ifdtool"
COREBOOT_IMAGE="coreboot-l13v4.rom"
COREBOOT_IMAGE_FILE="$COREBOOT_IMAGE.gz"
COREBOOT_IMAGE_URL="$PURISM_SOURCE/librem_13v4/$COREBOOT_IMAGE_FILE"
COREBOOT_IMAGE_SHA="4491efd0a8b2de5a88fd7491a5d2605884ed956c3d271d7761906269b4cfb601"
die () {
local msg=$1
echo ""
echo "$msg"
exit 1
}
check_and_get_url () {
local filename=$1
local url=$2
local hash=$3
local description=$4
if [ -f "$filename" ]; then
sha=$(sha256sum "$filename" | awk '{print $1}')
fi
if [ "$sha" != "$hash" ]; then
echo " Downloading $description..."
wget -O "$filename" "$url" >/dev/null 2>&1
sha=$(sha256sum "$filename" | awk '{print $1}')
if [ "$sha" != "$hash" ]; then
die "Downloaded $description has the wrong SHA256 hash"
fi
if [ "${filename: -3}" == ".gz" ]; then
gunzip -k $filename
fi
fi
}
check_and_get_blob () {
local filename=$1
local hash=$2
local description=$3
echo "Checking $filename"
if [ -f "$filename" ]; then
sha=$(sha256sum "$filename" | awk '{print $1}')
fi
if [ "$sha" != "$hash" ]; then
# get tools
check_and_get_tools
# extract from coreboot image
check_and_get_url $COREBOOT_IMAGE_FILE $COREBOOT_IMAGE_URL $COREBOOT_IMAGE_SHA "precompiled coreboot image"
echo "Extracting $filename"
if [ $filename = "descriptor.bin" ]; then
$IFDTOOL_BIN -x $COREBOOT_IMAGE >/dev/null 2>&1
mv flashregion_0_flashdescriptor.bin descriptor.bin
echo "Extracting me.bin"
mv flashregion_2_intel_me.bin me.bin
rm flashregion_* > /dev/null 2>&1
elif [ $filename = "me.bin" ]; then
$IFDTOOL_BIN -x $COREBOOT_IMAGE >/dev/null 2>&1
mv flashregion_2_intel_me.bin me.bin
rm flashregion_* > /dev/null 2>&1
else
$CBFSTOOL_BIN $COREBOOT_IMAGE extract -n $filename -f $filename >/dev/null 2>&1
fi
sha=$(sha256sum "$filename" | awk '{print $1}')
if [ "$sha" != "$hash" ]; then
die "Downloaded $description has the wrong SHA256 hash"
fi
fi
}
echo ""
check_and_get_tools() {
check_and_get_url $CBFSTOOL_FILE $CBFSTOOL_URL $CBFSTOOL_SHA "cbfstool"
chmod +x $CBFSTOOL_BIN
check_and_get_url $IFDTOOL_FILE $IFDTOOL_URL $IFDTOOL_SHA "ifdtool"
chmod +x $IFDTOOL_BIN
}
# get tools for extraction
#check_and_get_tools
# get/verify blobs
check_and_get_blob descriptor.bin $KBL_DESCRIPTOR_SHA "Intel Flash Descriptor"
check_and_get_blob me.bin $KBL_ME_SHA "Intel ME firmware"
check_and_get_blob fspm.bin $KBL_FSPM_SHA "FSP-M"
check_and_get_blob fsps.bin $KBL_FSPS_SHA "FSP-S"
check_and_get_blob vbt.bin $KBL_VBT_SHA "Video BIOS Table"
check_and_get_blob cpu_microcode_blob.bin $KBL_UCODE_SHA "Intel Microcode Update"
#clean up after ourselves
rm -f $CBFSTOOL_BIN >/dev/null 2>&1
rm -f $IFDTOOL_BIN >/dev/null 2>&1
rm -f $COREBOOT_IMAGE >/dev/null 2>&1
rm -f *.gz >/dev/null 2>&1
echo ""
echo "All blobs have been verified and are ready for use"

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@ -0,0 +1,20 @@
To build for the Librem 3rd generation (Librem 13 v4 and Librem 15 vv4),
we need to have the following files in this folder:
* cpu_microcode_blob.bin - CPU Microcode
* descriptor.bin - The Intel Flash Descriptor
* fspm.bin - FSP 2.0 Memory Init blob
* fsps.bin - FSP 2.0 Silicon Init blob
* me.bin - Intel Management Engine
To get the binaries, run the get_blobs.sh script which will download and
verify all of the files' hashes, then run me_cleaner on the descriptor.bin and me.bin.
The script depends on: wget sha256sum python2.7 bspatch pv
You can now compile the image with:
```
make BOARD=librem13v4
or
make BOARD=librem15v4
```

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@ -1,39 +1,32 @@
#!/bin/bash -e #!/bin/bash -e
# depends on : wget sha256sum python2.7 bspatch # depends on : wget sha256sum gunzip
# Librem 13 v2 and Librem 15 v3 binary blob hashes # Purism source
PURISM_SOURCE="https://source.puri.sm/coreboot/releases/raw/master"
# Librem 13 v2/v3 and Librem 15 v3 binary blob hashes
SKL_UCODE_SHA="9c84936df700d74612a99e6ab581640ecf423d25a0b74a1ea23a6d9872349213" SKL_UCODE_SHA="9c84936df700d74612a99e6ab581640ecf423d25a0b74a1ea23a6d9872349213"
SKL_DESCRIPTOR_SHA="d5110807c9d67cea6d546ac62125d87042a868177241be4ae17a2dbedef10017" SKL_DESCRIPTOR_SHA="642ca36f52aabb5198b82e013bf64a73a5148693a58376fffce322a4d438b524"
SKL_ME_NOCONF_SHA="70f07be7934bdbb215c66455a2b0d32651f3b2ecaf2519d83d8ca9cf475cc366" SKL_ME_SHA="cf06d3eb8b24490a1ab46fd988b6cef822e5347cd6a2e92bc332cb4a376eb8bc"
SKL_ME_SHA="3042150c7f655293a69bcf886836732fc451439ae551a2babf3173f4f0d9a8d3" SKL_FSPM_SHA="5da3ad7718eb3f6700fb9d97be988d9c8bdd2d8b5910273a80928c49122d5b2d"
SKL_FSP_SHA="a7dfec436f5a21a66b5a455775599d73a95170a3446849a34e89a64a2bb69820" SKL_FSPS_SHA="c81ffa40df0b6cd6cfde4f476d452a1f6f2217bc96a3b98a4fa4a037ee7039cf"
SKL_FSPM_SHA="7a1acc72073969e6753bbfe145f06c3f4d35e2516cb241641eae968705e2cc46" SKL_VBT_SHA="0ba40c1b8c0fb030a0e1a789eda8b2a7369339a410ad8c4620719e451ea69b98"
SKL_FSPS_SHA="0dac94d249473e9d366597fd1f96a0232fb7bf045a3d08f16784961273351822"
SKL_VBT_SHA="51fa214ca44a61b171662d4c2ca6adc1aa3dc6c3d7a24bf9ae5f249f012d61c0"
# FSP downloadable from Github # cbfstool, ifdtool, coreboot image from Purism repo
SKL_UCODE_URL="https://github.com/platomav/CPUMicrocodes/raw/bfb23e48eb84dff1495d1c8789f133a1b684de27/Intel/cpu406E3_platC0_ver000000C2_2017-11-16_PRD_C6C6F699.bin" CBFSTOOL_FILE="cbfstool.gz"
SKL_FSP_URL="https://github.com/IntelFsp/FSP/raw/8267cde09763c0c699704fbae10e6bd121f01b6a/KabylakeFspBinPkg/Fsp.fd" CBFSTOOL_URL="$PURISM_SOURCE/tools/$CBFSTOOL_FILE"
SKL_VBT_URL="https://github.com/IntelFsp/FSP/raw/8267cde09763c0c699704fbae10e6bd121f01b6a/KabylakeFspBinPkg/SampleCode/Vbt/Vbt.bin" CBFSTOOL_SHA="3994cba01a51dd34388c8be89fd329f91575c12e499dfe1b81975d9fd115ce58"
SKL_FSP_SPLIT_URL="https://raw.githubusercontent.com/tianocore/edk2/e8a70885d8f34533b6dd69878fe95a249e9af086/IntelFsp2Pkg/Tools/SplitFspBin.py" CBFSTOOL_BIN="./cbfstool"
SKL_FSP_SPLIT_SHA="f654f6363de68ad78b1baf8b8e573b53715c3bc76f7f3c23562641e49a7033f3"
ME_CLEANER_URL="https://github.com/corna/me_cleaner/raw/9e1611fdf21426d66a29a5ea62b7e30d512859e6/me_cleaner.py"
ME_CLEANER_SHA="412e95538c46d6d4d456987a8897b3d0ad1df118c51378a350540eef51c242d4"
SKL_DESCRIPTOR_URL="https://code.puri.sm/kakaroto/coreboot-files/raw/master/descriptor-skl.bin" IFDTOOL_FILE="ifdtool.gz"
SKL_ME_PATCH_URL="https://code.puri.sm/kakaroto/coreboot-files/raw/master/me11.0.18_config.bspatch" IFDTOOL_URL="$PURISM_SOURCE/tools/$IFDTOOL_FILE"
SKL_ME_PATCH_SHA="49019f89206d6371b1377cf738426c3b0ac60c4b1bb89d5d5de00481e7e4fece" IFDTOOL_SHA="08228ece4968794499ebd49a851f7d3f7f1b81352da8cd6e0c7916ac931a7d72"
IFDTOOL_BIN="./ifdtool"
# Link found on : http://www.win-raid.com/t832f39-Intel-Engine-Firmware-Repositories.html COREBOOT_IMAGE="coreboot-l13v3.rom"
# Update link if it changes and becomes invalid. COREBOOT_IMAGE_FILE="$COREBOOT_IMAGE.gz"
SKL_ME_RAR_URL="http://www.mediafire.com/file/1angqt361xdf8k0/" COREBOOT_IMAGE_URL="$PURISM_SOURCE/librem_13v3/$COREBOOT_IMAGE_FILE"
SKL_ME_FILENAME="11.0.18.1002_CON_LP_C0_NPDM_PRD_RGN.bin" COREBOOT_IMAGE_SHA="34276a7b82624cfb29aed688df7f2b4e747a9e951196e376732e972c8575ece6"
SKL_ME_FULL_FILENAME="Intel CSME 11.0 Firmware Repository Pack r50/$SKL_ME_FILENAME"
SKL_ME_RAR_SHA="11a9c199065c513a93c19269ffbb4bb094f8642a97686082e8cd2974673c599d"
# Might be required to compile unrar in case unrar-nonfree is not installed
RAR_NONFREE_SOURCE_URL="https://www.rarlab.com/rar/unrarsrc-5.5.8.tar.gz"
RAR_NONFREE_SOURCE_SHA="9b66e4353a9944bc140eb2a919ff99482dd548f858f5e296d809e8f7cdb2fcf4"
die () { die () {
local msg=$1 local msg=$1
@ -43,176 +36,89 @@ die () {
exit 1 exit 1
} }
check_binary () {
local filename=$1
local hash=$2
if [ ! -f "$filename" ]; then
die "Binary blob file '$filename' does not exist"
fi
sha=$(sha256sum "$filename" | awk '{print $1}')
if [ "$sha" != "$hash" ]; then
die "Extracted binary '$filename' has the wrong SHA256 hash"
fi
}
check_and_get_url () { check_and_get_url () {
filename=$1 local filename=$1
url=$2 local url=$2
hash=$3 local hash=$3
description=$4 local description=$4
if [ -f "$filename" ]; then if [ -f "$filename" ]; then
sha=$(sha256sum "$filename" | awk '{print $1}') sha=$(sha256sum "$filename" | awk '{print $1}')
fi fi
if [ "$sha" != "$hash" ]; then if [ "$sha" != "$hash" ]; then
wget -O "$filename" "$url" echo " Downloading $description..."
wget -O "$filename" "$url" >/dev/null 2>&1
sha=$(sha256sum "$filename" | awk '{print $1}')
if [ "$sha" != "$hash" ]; then
die "Downloaded $description has the wrong SHA256 hash"
fi
if [ "${filename: -3}" == ".gz" ]; then
gunzip -k $filename
fi
fi
}
check_and_get_blob () {
local filename=$1
local hash=$2
local description=$3
echo "Checking $filename"
if [ -f "$filename" ]; then
sha=$(sha256sum "$filename" | awk '{print $1}')
fi
if [ "$sha" != "$hash" ]; then
# get tools
check_and_get_tools
# extract from coreboot image
check_and_get_url $COREBOOT_IMAGE_FILE $COREBOOT_IMAGE_URL $COREBOOT_IMAGE_SHA "precompiled coreboot image"
echo "Extracting $filename"
if [ $filename = "descriptor.bin" ]; then
$IFDTOOL_BIN -x $COREBOOT_IMAGE >/dev/null 2>&1
mv flashregion_0_flashdescriptor.bin descriptor.bin
echo "Extracting me.bin"
mv flashregion_2_intel_me.bin me.bin
rm flashregion_* > /dev/null 2>&1
elif [ $filename = "me.bin" ]; then
$IFDTOOL_BIN -x $COREBOOT_IMAGE >/dev/null 2>&1
mv flashregion_2_intel_me.bin me.bin
rm flashregion_* > /dev/null 2>&1
else
$CBFSTOOL_BIN $COREBOOT_IMAGE extract -n $filename -f $filename >/dev/null 2>&1
fi
sha=$(sha256sum "$filename" | awk '{print $1}') sha=$(sha256sum "$filename" | awk '{print $1}')
if [ "$sha" != "$hash" ]; then if [ "$sha" != "$hash" ]; then
die "Downloaded $description has the wrong SHA256 hash" die "Downloaded $description has the wrong SHA256 hash"
fi fi
fi fi
} }
get_and_split_fsp () { echo ""
fsp="fsp.fd"
fsp_M="fsp_M.fd"
fsp_S="fsp_S.fd"
fsp_T="fsp_T.fd"
fspm="fspm.bin"
fsps="fsps.bin"
fsp_split="SplitFspBin.py"
if [ -f "$fspm" ]; then check_and_get_tools() {
fspm_sha=$(sha256sum "$fspm" | awk '{print $1}') check_and_get_url $CBFSTOOL_FILE $CBFSTOOL_URL $CBFSTOOL_SHA "cbfstool"
fi chmod +x $CBFSTOOL_BIN
if [ -f "$fsps" ]; then check_and_get_url $IFDTOOL_FILE $IFDTOOL_URL $IFDTOOL_SHA "ifdtool"
fsps_sha=$(sha256sum "$fsps" | awk '{print $1}') chmod +x $IFDTOOL_BIN
fi
# No FSP-M or FSP-S
if [ "$fspm_sha" != "$SKL_FSPM_SHA" ] || [ "$fsps_sha" != "$SKL_FSPS_SHA" ]; then
if [ -f "$fsp" ]; then
fsp_sha=$(sha256sum "$fsp" | awk '{print $1}')
fi
# No FSP.fd
if [ "$fsp_sha" != "$SKL_FSP_SHA" ]; then
wget -O "$fsp" "$SKL_FSP_URL"
fsp_sha=$(sha256sum "$fsp" | awk '{print $1}')
if [ "$fsp_sha" != "$SKL_FSP_SHA" ]; then
die "Downloaded FSP image has the wrong SHA256 hash"
fi
fi
# No FspSplit
if [ -f "$fsp_split" ]; then
split_sha=$(sha256sum "$fsp_split" | awk '{print $1}')
fi
if [ "$split_sha" != "$SKL_FSP_SHA" ]; then
wget -O "$fsp_split" "$SKL_FSP_SPLIT_URL"
split_sha=$(sha256sum "$fsp_split" | awk '{print $1}')
if [ "$split_sha" != "$SKL_FSP_SPLIT_SHA" ]; then
die "Downloaded FSP Split Tool has the wrong SHA256 hash"
fi
fi
python2 "$fsp_split" split -f "$fsp"
if [ -f "$fsp_M" ]; then
mv "$fsp_M" "$fspm"
fi
if [ -f "$fsp_S" ]; then
mv "$fsp_S" "$fsps"
fi
fspm_sha=$(sha256sum "$fspm" | awk '{print $1}')
fsps_sha=$(sha256sum "$fsps" | awk '{print $1}')
if [ "$fspm_sha" != "$SKL_FSPM_SHA" ] || [ "$fsps_sha" != "$SKL_FSPS_SHA" ]; then
die "Extracted FSP images have the wrong SHA256 hash"
fi
rm -f "$fsp"
rm -f "$fsp_split"
rm -f "$fsp_T"
fi
} }
get_and_patch_me_11 () { # get tools for extraction
if [ -f "me.bin" ]; then #check_and_get_tools
sha=$(sha256sum "me.bin" | awk '{print $1}')
fi
if [ "$sha" != "$SKL_ME_SHA" ]; then
local rar_filename=me_11_repository.rar
local unrar='unrar-nonfree'
if [ -f "$rar_filename" ]; then # get/verify blobs
sha=$(sha256sum "$rar_filename" | awk '{print $1}') check_and_get_blob descriptor.bin $SKL_DESCRIPTOR_SHA "Intel Flash Descriptor"
fi check_and_get_blob me.bin $SKL_ME_SHA "Intel ME firmware"
if ! type "$unrar" &> /dev/null; then check_and_get_blob fspm.bin $SKL_FSPM_SHA "FSP-M"
wget -O unrar.tar.gz "$RAR_NONFREE_SOURCE_URL" check_and_get_blob fsps.bin $SKL_FSPS_SHA "FSP-S"
sha=$(sha256sum unrar.tar.gz | awk '{print $1}') check_and_get_blob vbt.bin $SKL_VBT_SHA "Video BIOS Table"
if [ "$sha" != "$RAR_NONFREE_SOURCE_SHA" ]; then check_and_get_blob cpu_microcode_blob.bin $SKL_UCODE_SHA "Intel Microcode Update"
die "Unrar source package has the wrong SHA256 hash"
fi
tar -xzvf unrar.tar.gz
(
cd unrar
make
)
unrar="`pwd`/unrar/unrar"
fi
if [ "$sha" != "$SKL_ME_RAR_SHA" ]; then
DIRECT_LINK=$(wget -O - "$SKL_ME_RAR_URL" 2>/dev/null | grep -o -e 'http://download.*.rar' | head -n 1)
wget -O "$rar_filename" "$DIRECT_LINK"
sha=$(sha256sum "$rar_filename" | awk '{print $1}')
if [ "$sha" != "$SKL_ME_RAR_SHA" ]; then
# We'll assume the rar file was updated again
me_dirname=$("$unrar" l "$rar_filename" | grep '\.\.\.D\.\.\.' | tr -s [:blank:] | cut -d' ' -f 6-)
SKL_ME_FULL_FILENAME="$me_dirname/$SKL_ME_FILENAME"
fi
fi
if type "$unrar" &> /dev/null; then
"$unrar" e -y "$rar_filename" "$SKL_ME_FULL_FILENAME"
else
die "Couldn't extract ME image. Requires unrar-nonfree"
fi
sha=""
if [ -f "$SKL_ME_FILENAME" ]; then
sha=$(sha256sum "$SKL_ME_FILENAME" | awk '{print $1}')
fi
if [ "$sha" != "$SKL_ME_NOCONF_SHA" ]; then
die "Couldn't extract ME image with the correct SHA256 hash"
fi
check_and_get_url me11.0.18_config.bspatch $SKL_ME_PATCH_URL $SKL_ME_PATCH_SHA "ME Patch"
bspatch "$SKL_ME_FILENAME" "me.bin" me11.0.18_config.bspatch
rm -f me11.0.18_config.bspatch
rm -f "$SKL_ME_FILENAME"
rm -f "$rar_filename"
fi
}
apply_me_cleaner() { #clean up after ourselves
if [ -f "me_cleaner.py" ]; then rm -f $CBFSTOOL_BIN >/dev/null 2>&1
sha=$(sha256sum "me_cleaner.py" | awk '{print $1}') rm -f $IFDTOOL_BIN >/dev/null 2>&1
fi rm -f $COREBOOT_IMAGE >/dev/null 2>&1
if [ "$sha" != "$ME_CLEANER_SHA" ]; then rm -f *.gz >/dev/null 2>&1
wget -O "me_cleaner.py" "$ME_CLEANER_URL"
sha=$(sha256sum "me_cleaner.py" | awk '{print $1}')
if [ "$sha" != "$ME_CLEANER_SHA" ]; then
die "Downloaded ME Cleaner has the wrong SHA256 hash"
fi
fi
cat descriptor.bin me.bin > desc_me.bin
python2 "me_cleaner.py" -s desc_me.bin
python2 "me_cleaner.py" -w "MFS" me.bin
dd if=desc_me.bin of=descriptor.bin bs=4096 count=1
rm -f desc_me.bin
rm -f me_cleaner.py
}
check_and_get_url descriptor.bin $SKL_DESCRIPTOR_URL $SKL_DESCRIPTOR_SHA "Intel Flash Descriptor"
check_binary descriptor.bin $SKL_DESCRIPTOR_SHA
get_and_patch_me_11
check_binary me.bin $SKL_ME_SHA
apply_me_cleaner
get_and_split_fsp
check_binary fspm.bin $SKL_FSPM_SHA
check_binary fsps.bin $SKL_FSPS_SHA
check_and_get_url vbt.bin $SKL_VBT_URL $SKL_VBT_SHA "Video BIOS Table"
check_and_get_url cpu_microcode_blob.bin $SKL_UCODE_URL $SKL_UCODE_SHA "Intel Microcode Update"
echo ""
echo "All blobs have been verified and are ready for use"

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@ -1,4 +1,4 @@
To build for the Librem 2nd generation (Librem 13 v2/v3 and Librem 15 v3/v4), To build for the Librem 2nd generation (Librem 13 v2/v3 and Librem 15 v3),
we need to have the following files in this folder: we need to have the following files in this folder:
* cpu_microcode_blob.bin - CPU Microcode * cpu_microcode_blob.bin - CPU Microcode
* descriptor.bin - The Intel Flash Descriptor * descriptor.bin - The Intel Flash Descriptor
@ -9,6 +9,8 @@ we need to have the following files in this folder:
To get the binaries, run the get_blobs.sh script which will download and To get the binaries, run the get_blobs.sh script which will download and
verify all of the files' hashes, then run me_cleaner on the descriptor.bin and me.bin. verify all of the files' hashes, then run me_cleaner on the descriptor.bin and me.bin.
The script depends on: wget sha256sum python2.7 bspatch pv
You can now compile the image with: You can now compile the image with:
``` ```

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@ -6,7 +6,7 @@ export CONFIG_COREBOOT=y
CONFIG_CRYPTSETUP=y CONFIG_CRYPTSETUP=y
CONFIG_FLASHROM=y CONFIG_FLASHROM=y
CONFIG_FLASHTOOLS=y CONFIG_FLASHTOOLS=y
CONFIG_GPG=y CONFIG_GPG2=y
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y CONFIG_UTIL_LINUX=y
CONFIG_LVM2=y CONFIG_LVM2=y
@ -20,6 +20,7 @@ CONFIG_TPMTOTP=y
#CONFIG_NEWT=y #CONFIG_NEWT=y
CONFIG_CAIRO=y CONFIG_CAIRO=y
CONFIG_FBWHIPTAIL=y CONFIG_FBWHIPTAIL=y
CONFIG_LIBREMKEY=y
CONFIG_LINUX_USB=y CONFIG_LINUX_USB=y
@ -27,7 +28,7 @@ export CONFIG_TPM=y
export CONFIG_BOOTSCRIPT=/bin/gui-init export CONFIG_BOOTSCRIPT=/bin/gui-init
export CONFIG_BOOT_REQ_HASH=n export CONFIG_BOOT_REQ_HASH=n
export CONFIG_BOOT_REQ_ROLLBACK=n export CONFIG_BOOT_REQ_ROLLBACK=n
export CONFIG_BOOT_KERNEL_ADD="iommu=pt" export CONFIG_BOOT_KERNEL_ADD="intel_iommu=on"
export CONFIG_BOOT_KERNEL_REMOVE="" export CONFIG_BOOT_KERNEL_REMOVE=""
export CONFIG_BOOT_DEV="/dev/sda1" export CONFIG_BOOT_DEV="/dev/sda1"
export CONFIG_BOOT_GUI_MENU_NAME="Purism Librem 13v2 Heads Boot Menu" export CONFIG_BOOT_GUI_MENU_NAME="Purism Librem 13v2 Heads Boot Menu"

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@ -0,0 +1,37 @@
# Configuration for a librem13v4
CONFIG_LINUX_CONFIG=config/linux-librem13v2.config
CONFIG_COREBOOT_CONFIG=config/coreboot-librem13v4.config
export CONFIG_COREBOOT=y
CONFIG_CRYPTSETUP=y
CONFIG_FLASHROM=y
CONFIG_FLASHTOOLS=y
CONFIG_GPG2=y
CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y
CONFIG_LVM2=y
CONFIG_MBEDTLS=y
CONFIG_PCIUTILS=y
CONFIG_POPT=y
CONFIG_QRENCODE=y
CONFIG_TPMTOTP=y
#CONFIG_SLANG=y
#CONFIG_NEWT=y
CONFIG_CAIRO=y
CONFIG_FBWHIPTAIL=y
CONFIG_LIBREMKEY=y
CONFIG_LINUX_USB=y
export CONFIG_TPM=y
export CONFIG_BOOTSCRIPT=/bin/gui-init
export CONFIG_BOOT_REQ_HASH=n
export CONFIG_BOOT_REQ_ROLLBACK=n
export CONFIG_BOOT_KERNEL_ADD="intel_iommu=on"
export CONFIG_BOOT_KERNEL_REMOVE=""
export CONFIG_BOOT_DEV="/dev/sda1"
export CONFIG_BOOT_GUI_MENU_NAME="Purism Librem 13v2 Heads Boot Menu"
export CONFIG_USB_BOOT_DEV="/dev/sdb1"
export CONFIG_WARNING_BG_COLOR="--background-gradient 0 0 0 150 125 0"
export CONFIG_ERROR_BG_COLOR="--background-gradient 0 0 0 150 0 0"

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@ -8,7 +8,7 @@ export CONFIG_COREBOOT=y
CONFIG_CRYPTSETUP=y CONFIG_CRYPTSETUP=y
CONFIG_FLASHROM=y CONFIG_FLASHROM=y
CONFIG_FLASHTOOLS=y CONFIG_FLASHTOOLS=y
CONFIG_GPG=y CONFIG_GPG2=y
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y CONFIG_UTIL_LINUX=y
CONFIG_LVM2=y CONFIG_LVM2=y
@ -22,6 +22,7 @@ CONFIG_TPMTOTP=y
#CONFIG_NEWT=y #CONFIG_NEWT=y
CONFIG_CAIRO=y CONFIG_CAIRO=y
CONFIG_FBWHIPTAIL=y CONFIG_FBWHIPTAIL=y
CONFIG_LIBREMKEY=y
CONFIG_LINUX_USB=y CONFIG_LINUX_USB=y
@ -29,7 +30,7 @@ export CONFIG_TPM=y
export CONFIG_BOOTSCRIPT=/bin/gui-init export CONFIG_BOOTSCRIPT=/bin/gui-init
export CONFIG_BOOT_REQ_HASH=n export CONFIG_BOOT_REQ_HASH=n
export CONFIG_BOOT_REQ_ROLLBACK=n export CONFIG_BOOT_REQ_ROLLBACK=n
export CONFIG_BOOT_KERNEL_ADD="iommu=pt" export CONFIG_BOOT_KERNEL_ADD="intel_iommu=on"
export CONFIG_BOOT_KERNEL_REMOVE="" export CONFIG_BOOT_KERNEL_REMOVE=""
export CONFIG_BOOT_DEV="/dev/sda1" export CONFIG_BOOT_DEV="/dev/sda1"
export CONFIG_BOOT_GUI_MENU_NAME="Purism Librem 15v3 Heads Boot Menu" export CONFIG_BOOT_GUI_MENU_NAME="Purism Librem 15v3 Heads Boot Menu"

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@ -0,0 +1,37 @@
# Configuration for a librem15v4
# The L15v4 Linux config is the same as the L13v2 linux config
CONFIG_LINUX_CONFIG=config/linux-librem13v2.config
CONFIG_COREBOOT_CONFIG=config/coreboot-librem15v4.config
export CONFIG_COREBOOT=y
CONFIG_CRYPTSETUP=y
CONFIG_FLASHROM=y
CONFIG_FLASHTOOLS=y
CONFIG_GPG2=y
CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y
CONFIG_LVM2=y
CONFIG_MBEDTLS=y
CONFIG_PCIUTILS=y
CONFIG_POPT=y
CONFIG_QRENCODE=y
CONFIG_TPMTOTP=y
#CONFIG_SLANG=y
#CONFIG_NEWT=y
CONFIG_CAIRO=y
CONFIG_FBWHIPTAIL=y
CONFIG_LIBREMKEY=y
CONFIG_LINUX_USB=y
export CONFIG_TPM=y
export CONFIG_BOOTSCRIPT=/bin/gui-init
export CONFIG_BOOT_REQ_HASH=n
export CONFIG_BOOT_REQ_ROLLBACK=n
export CONFIG_BOOT_KERNEL_ADD="intel_iommu=on"
export CONFIG_BOOT_KERNEL_REMOVE=""
export CONFIG_BOOT_DEV="/dev/sda1"
export CONFIG_BOOT_GUI_MENU_NAME="Purism Librem 15v4 Heads Boot Menu"
export CONFIG_USB_BOOT_DEV="/dev/sdb1"

View File

@ -17,12 +17,20 @@ CONFIG_FLASHROM=y
CONFIG_PCIUTILS=y CONFIG_PCIUTILS=y
CONFIG_UTIL_LINUX=y CONFIG_UTIL_LINUX=y
CONFIG_CRYPTSETUP=y CONFIG_CRYPTSETUP=y
CONFIG_GPG=y CONFIG_GPG2=y
CONFIG_LVM2=y CONFIG_LVM2=y
CONFIG_MBEDTLS=y CONFIG_MBEDTLS=y
CONFIG_DROPBEAR=y CONFIG_DROPBEAR=y
#Uncomment only one of the following block
#Required for graphical gui-init (FBWhiptail)
#CONFIG_CAIRO=y
#CONFIG_FBWHIPTAIL=y
#
#text-based init (generic-init and gui-init)
CONFIG_NEWT=y CONFIG_NEWT=y
CONFIG_SLANG=y CONFIG_SLANG=y
endif endif
CONFIG_LINUX_ATA=y CONFIG_LINUX_ATA=y
@ -30,7 +38,13 @@ CONFIG_LINUX_AHCI=y
CONFIG_LINUX_USB=y CONFIG_LINUX_USB=y
CONFIG_LINUX_E1000=y CONFIG_LINUX_E1000=y
#Uncomment only one BOOTSCRIPT:
#Whiptail-based init (text-based or FBWhiptail)
#export CONFIG_BOOTSCRIPT=/bin/gui-init
#
#text-based original init:
export CONFIG_BOOTSCRIPT=/bin/generic-init export CONFIG_BOOTSCRIPT=/bin/generic-init
export CONFIG_TPM=n export CONFIG_TPM=n
export CONFIG_BOOT_DEV="/dev/sda1" export CONFIG_BOOT_DEV="/dev/sda1"

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@ -18,7 +18,7 @@ endif
CONFIG_FLASHROM=y CONFIG_FLASHROM=y
CONFIG_FLASHTOOLS=y CONFIG_FLASHTOOLS=y
CONFIG_GPG=y CONFIG_GPG2=y
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y CONFIG_UTIL_LINUX=y
CONFIG_DROPBEAR=y CONFIG_DROPBEAR=y

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@ -3,7 +3,7 @@ BOARD=x230.flash
export CONFIG_COREBOOT=y export CONFIG_COREBOOT=y
CONFIG_FLASHROM=y CONFIG_FLASHROM=y
CONFIG_GPG=y #CONFIG_GPG=y
CONFIG_FLASHTOOLS=y CONFIG_FLASHTOOLS=y
CONFIG_PCIUTILS=y CONFIG_PCIUTILS=y
#CONFIG_MBEDTLS=y #CONFIG_MBEDTLS=y

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@ -6,7 +6,7 @@ CONFIG_LINUX_CONFIG=config/linux-x230.config
CONFIG_CRYPTSETUP=y CONFIG_CRYPTSETUP=y
CONFIG_FLASHROM=y CONFIG_FLASHROM=y
CONFIG_FLASHTOOLS=y CONFIG_FLASHTOOLS=y
CONFIG_GPG=y CONFIG_GPG2=y
CONFIG_KEXEC=y CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y CONFIG_UTIL_LINUX=y
CONFIG_LVM2=y CONFIG_LVM2=y
@ -17,30 +17,28 @@ CONFIG_QRENCODE=y
CONFIG_TPMTOTP=y CONFIG_TPMTOTP=y
CONFIG_DROPBEAR=y CONFIG_DROPBEAR=y
CONFIG_CAIRO=y
CONFIG_FBWHIPTAIL=y
CONFIG_LINUX_USB=y CONFIG_LINUX_USB=y
CONFIG_LINUX_E1000E=y CONFIG_LINUX_E1000E=y
export CONFIG_TPM=y export CONFIG_TPM=y
export CONFIG_BOOTSCRIPT=/bin/generic-init export CONFIG_BOOTSCRIPT=/bin/gui-init
export CONFIG_BOOT_REQ_HASH=n export CONFIG_BOOT_REQ_HASH=n
export CONFIG_BOOT_REQ_ROLLBACK=n export CONFIG_BOOT_REQ_ROLLBACK=n
export CONFIG_BOOT_KERNEL_ADD="intel_iommu=on" export CONFIG_BOOT_KERNEL_ADD="intel_iommu=on intel_iommu=igfx_off"
export CONFIG_BOOT_KERNEL_REMOVE="quiet" export CONFIG_BOOT_KERNEL_REMOVE="quiet"
export CONFIG_BOOT_DEV="/dev/sda1" export CONFIG_BOOT_DEV="/dev/sda1"
export CONFIG_BOOT_GUI_MENU_NAME="Thinkpad X230 Heads Boot Menu"
export CONFIG_USB_BOOT_DEV="/dev/sdb1" export CONFIG_USB_BOOT_DEV="/dev/sdb1"
export CONFIG_WARNING_BG_COLOR="--background-gradient 0 0 0 150 125 0"
export CONFIG_ERROR_BG_COLOR="--background-gradient 0 0 0 150 0 0"
# This board has two SPI flash chips, an 8 MB that holds the IFD, # This board has two SPI flash chips, an 8 MB that holds the IFD,
# the ME image and part of the coreboot image, and a 4 MB one that # the ME image and part of the coreboot image, and a 4 MB one that
# has the rest of the coreboot and the reset vector. # has the rest of the coreboot and the reset vector.
# #
# When flashing via an external programmer it is easiest to have # Only flashing to the bios region is safe to do. The easiest is to
# to separate files for these pieces. # flash internally when the IFD is unlocked for writing, and x230-flash
all: $(build)/$(BOARD)/$(BOARD)-8.rom # is installed first.
$(build)/$(BOARD)/$(BOARD)-8.rom: $(build)/$(BOARD)/coreboot.rom
$(call do,DD 8MB,$@,dd of=$@ if=$< bs=65536 count=128 skip=0 status=none)
@sha256sum $@
all: $(build)/$(BOARD)/$(BOARD)-4.rom
$(build)/$(BOARD)/$(BOARD)-4.rom: $(build)/$(BOARD)/coreboot.rom
$(call do,DD 4MB,$@,dd of=$@ if=$< bs=65536 count=64 skip=128 status=none)
@sha256sum $@

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@ -404,7 +404,7 @@ CONFIG_FEATURE_AWK_GNU_EXTENSIONS=y
# CONFIG_FEATURE_DIFF_DIR is not set # CONFIG_FEATURE_DIFF_DIR is not set
# CONFIG_ED is not set # CONFIG_ED is not set
# CONFIG_PATCH is not set # CONFIG_PATCH is not set
# CONFIG_SED is not set CONFIG_SED=y
CONFIG_VI=y CONFIG_VI=y
CONFIG_FEATURE_VI_MAX_LEN=4096 CONFIG_FEATURE_VI_MAX_LEN=4096
# CONFIG_FEATURE_VI_8BIT is not set # CONFIG_FEATURE_VI_8BIT is not set

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@ -1,714 +1,14 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="heads" CONFIG_LOCALVERSION="heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_USE_OPTION_TABLE=y CONFIG_USE_OPTION_TABLE=y
# CONFIG_STATIC_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
# CONFIG_COLLECT_TIMESTAMPS is not set # CONFIG_COLLECT_TIMESTAMPS is not set
# CONFIG_USE_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
# CONFIG_RELOCATABLE_RAMSTAGE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
# CONFIG_MEASURED_BOOT is not set
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
CONFIG_VENDOR_ASUS=y CONFIG_VENDOR_ASUS=y
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="asus/kgpe-d16"
CONFIG_MAINBOARD_PART_NUMBER="KGPE-D16"
CONFIG_IRQ_SLOT_COUNT=13
CONFIG_MAINBOARD_VENDOR="ASUS"
CONFIG_MAX_CPUS=32
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0x1000000
CONFIG_UART_FOR_CONSOLE=1 CONFIG_UART_FOR_CONSOLE=1
CONFIG_APIC_ID_OFFSET=0x0
CONFIG_HW_MEM_HOLE_SIZEK=0x100000
CONFIG_MAX_PHYSICAL_CPUS=4
# CONFIG_HW_MEM_HOLE_SIZE_AUTO_INC is not set
CONFIG_HT_CHAIN_END_UNITID_BASE=0x20
CONFIG_HT_CHAIN_UNITID_BASE=0x0
CONFIG_VGA_BIOS_ID="1a03,2000"
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_DIMM_SPD_SIZE=256
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
CONFIG_DCACHE_RAM_BASE=0xc2000
CONFIG_DCACHE_RAM_SIZE=0x1e000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="ASUS"
# CONFIG_BOARD_ASUS_A8N_E is not set
# CONFIG_BOARD_ASUS_A8N_SLI is not set
# CONFIG_BOARD_ASUS_A8V_E_DELUXE is not set
# CONFIG_BOARD_ASUS_A8V_E_SE is not set
# CONFIG_BOARD_ASUS_AM1I_A is not set
# CONFIG_BOARD_ASUS_DSBF is not set
# CONFIG_BOARD_ASUS_F2A85_M is not set
# CONFIG_BOARD_ASUS_F2A85_M_PRO is not set
# CONFIG_BOARD_ASUS_F2A85_M_LE is not set
# CONFIG_BOARD_ASUS_K8V_X is not set
# CONFIG_BOARD_ASUS_KCMA_D8 is not set
# CONFIG_BOARD_ASUS_KFSN4_DRE is not set
# CONFIG_BOARD_ASUS_KFSN4_DRE_K8 is not set
CONFIG_BOARD_ASUS_KGPE_D16=y CONFIG_BOARD_ASUS_KGPE_D16=y
# CONFIG_BOARD_ASUS_M2N_E is not set
# CONFIG_BOARD_ASUS_M2V_MX_SE is not set
# CONFIG_BOARD_ASUS_M2V is not set
# CONFIG_BOARD_ASUS_M4A78_EM is not set
# CONFIG_BOARD_ASUS_M4A785M is not set
# CONFIG_BOARD_ASUS_M4A785TM is not set
# CONFIG_BOARD_ASUS_M5A88_V is not set
# CONFIG_BOARD_ASUS_MEW_AM is not set
# CONFIG_BOARD_ASUS_MEW_VM is not set
# CONFIG_BOARD_ASUS_P2B_D is not set
# CONFIG_BOARD_ASUS_P2B_DS is not set
# CONFIG_BOARD_ASUS_P2B_F is not set
# CONFIG_BOARD_ASUS_P2B_LS is not set
# CONFIG_BOARD_ASUS_P2B is not set
# CONFIG_BOARD_ASUS_P3B_F is not set
# CONFIG_BOARD_ASUS_P5GC_MX is not set
CONFIG_MMCONF_BASE_ADDRESS=0xc0000000
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_AGP_APERTURE_SIZE=0x4000000
CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/asus/kgpe-d16/bootblock.c"
CONFIG_SOUTHBRIDGE_AMD_SB700_SATA_PORT_COUNT_BITFIELD=0x3f
CONFIG_MAINBOARD_POWER_ON_AFTER_POWER_FAIL=y
CONFIG_MAX_REBOOT_CNT=10
CONFIG_ID_SECTION_OFFSET=0x80
CONFIG_POST_DEVICE=y
# CONFIG_VBOOT is not set
CONFIG_TPM_PIRQ=0x0
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_TTYS0_LCS=3
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_UDELAY_LAPIC_FIXED_FSB=200
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="KGPE-D16"
CONFIG_CPU_ADDR_BITS=48
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
# CONFIG_USBDEBUG is not set
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_DRIVERS_PS2_KEYBOARD=y
CONFIG_PCIEXP_L1_SUB_STATE=y
# CONFIG_NO_POST is not set
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x1000000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
# CONFIG_SYSTEM_TYPE_LAPTOP is not set
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_MMCONF_BUS_NUMBER=256
CONFIG_RAMTOP=0x400000
CONFIG_HEAP_SIZE=0xc0000
CONFIG_RAMBASE=0x100000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
# CONFIG_SOC_BROADCOM_CYGNUS is not set
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_PCIEXP_CLK_PM=y
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/amd/amdfam10/bootblock.c"
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/amd/sb700/bootblock.c"
CONFIG_TTYS0_BASE=0x2f8
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0x0
CONFIG_HPET_MIN_TICKS=0x14
# CONFIG_SOC_INTEL_KABYLAKE is not set
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
CONFIG_TTYS0_BAUD=115200
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_DCACHE_BSP_STACK_SLUSH=0x4000
CONFIG_DCACHE_AP_STACK_SIZE=0x500
CONFIG_CPU_SOCKET_TYPE=0x15
# CONFIG_EXT_RT_TBL_SUPPORT is not set
CONFIG_CBB=0x0
CONFIG_CDB=0x18
CONFIG_XIP_ROM_SIZE=0x80000
CONFIG_CPU_AMD_SOCKET_G34_NON_AGESA=y
CONFIG_DIMM_SUPPORT=0x0005
CONFIG_LIFT_BSP_APIC_ID=y
CONFIG_SET_FIDVID=y
CONFIG_SET_FIDVID_DEBUG=y
# CONFIG_SET_FIDVID_CORE0_ONLY is not set
CONFIG_SET_FIDVID_STORE_AP_APICID_AT_FIRST=y
CONFIG_CPU_AMD_MODEL_10XXX=y
CONFIG_USE_LARGE_DCACHE=y
CONFIG_NUM_IPI_STARTS=1
CONFIG_SET_FIDVID_CORE_RANGE=0
# CONFIG_CPU_AMD_AGESA is not set
CONFIG_S3_DATA_POS=0x0
CONFIG_S3_DATA_SIZE=32768
# CONFIG_CPU_AMD_PI is not set
CONFIG_EXT_CONF_SUPPORT=y
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_SSE2=y
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
# CONFIG_CPU_TI_AM335X is not set
CONFIG_PARALLEL_CPU_INIT=y
# CONFIG_PARALLEL_MP is not set
# CONFIG_UDELAY_IO is not set
CONFIG_UDELAY_LAPIC=y
# CONFIG_LAPIC_MONOTONIC_TIMER is not set
# CONFIG_UDELAY_TSC is not set
# CONFIG_UDELAY_TIMER2 is not set
CONFIG_TSC_SYNC_LFENCE=y
# CONFIG_TSC_SYNC_MFENCE is not set
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
CONFIG_LOGICAL_CPUS=y
# CONFIG_SMM_TSEG is not set
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
CONFIG_X86_AMD_FIXED_MTRRS=y
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
CONFIG_CPU_MICROCODE_MULTIPLE_FILES=y
CONFIG_CPU_UCODE_BINARIES=""
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
CONFIG_NORTHBRIDGE_AMD_AMDFAM10=y
CONFIG_SB_HT_CHAIN_UNITID_OFFSET_ONLY=y
# CONFIG_HT_CHAIN_DISTRIBUTE is not set
# CONFIG_DIMM_FBDIMM is not set
# CONFIG_DIMM_DDR2 is not set
CONFIG_DIMM_DDR3=y
CONFIG_DIMM_REGISTERED=y
CONFIG_DIMM_VOLTAGE_SET_SUPPORT=y
# CONFIG_SVI_HIGH_FREQ is not set
#
# HyperTransport setup
#
# CONFIG_LIMIT_HT_DOWN_WIDTH_8 is not set
CONFIG_LIMIT_HT_DOWN_WIDTH_16=y
# CONFIG_LIMIT_HT_UP_WIDTH_8 is not set
CONFIG_LIMIT_HT_UP_WIDTH_16=y
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_AMD_SB700=y
CONFIG_SOUTHBRIDGE_SPECIFIC_OPTIONS=y
# CONFIG_SOUTHBRIDGE_AMD_SB700_33MHZ_SPI is not set
CONFIG_SOUTHBRIDGE_AMD_SUBTYPE_SP5100=y
# CONFIG_SOUTHBRIDGE_AMD_SB700_SKIP_ISA_DMA_INIT is not set
CONFIG_SOUTHBRIDGE_AMD_SB700_DISABLE_ISA_DMA=y
CONFIG_SOUTHBRIDGE_AMD_SR5650=y
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
CONFIG_SUPERIO_WINBOND_COMMON_ROMSTAGE=y
CONFIG_SUPERIO_WINBOND_W83667HG_A=y
#
# Embedded Controllers
#
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
# CONFIG_UDK_2015_BINDING is not set
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
# CONFIG_EARLY_EBDA_INIT is not set
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
# CONFIG_POSTCAR_STAGE is not set
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
CONFIG_SMBUS_HAS_AUX_CHANNELS=y
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
# CONFIG_NO_UART_ON_SUPERIO is not set
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_AMD_PI is not set
CONFIG_DRIVERS_ASPEED_AST2050=y
CONFIG_DRIVERS_ASPEED_AST_COMMON=y
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_I2C_TPM is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
CONFIG_DRIVERS_I2C_W83795=y
# CONFIG_INTEL_DDI is not set
# CONFIG_INTEL_EDID is not set
# CONFIG_INTEL_INT15 is not set
# CONFIG_INTEL_GMA_ACPI is not set
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_MAINBOARD_HAS_LPC_TPM=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
# CONFIG_TPM_DEACTIVATE is not set
CONFIG_VGA=y
# CONFIG_DRIVERS_RICOH_RCE822 is not set
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_SPI_TPM is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
# CONFIG_RTC is not set
# CONFIG_TPM is not set
CONFIG_TPM2=y
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_SERIAL=y
#
# I/O mapped, 8250-compatible
#
#
# Serial port base address = 0x2f8
#
# CONFIG_CONSOLE_SERIAL_921600 is not set
# CONFIG_CONSOLE_SERIAL_460800 is not set
# CONFIG_CONSOLE_SERIAL_230400 is not set
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_CONSOLE_SPI_FLASH is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CMOS_POST is not set
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_DEVICE_NONE=y
# CONFIG_POST_DEVICE_LPC is not set
# CONFIG_POST_DEVICE_PCI_PCIE is not set
CONFIG_POST_IO_PORT=0x80
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
CONFIG_HWBASE_DEBUG_CB=y
CONFIG_HAVE_ACPI_RESUME=y
CONFIG_ACPI_HUGE_LOWMEM_BACKUP=y
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_HARD_RESET=y
CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK=y
CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK=y
CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK=y
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_GENERIC_UDELAY is not set
# CONFIG_TIMER_QUEUE is not set
CONFIG_HAVE_OPTION_TABLE=y
# CONFIG_PIRQ_ROUTE is not set
# CONFIG_HAVE_SMI_HANDLER is not set
CONFIG_PCI_IO_CFG_EXT=y
CONFIG_IOAPIC=y
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_HAVE_MP_TABLE=y
CONFIG_HAVE_PIRQ_TABLE=y
# CONFIG_COMMON_FADT is not set
# CONFIG_ACPI_NHLT is not set
#
# System tables
#
CONFIG_GENERATE_MP_TABLE=y
CONFIG_GENERATE_PIRQ_TABLE=y
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/kgpe-d16/bzImage" CONFIG_PAYLOAD_FILE="../../build/kgpe-d16/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE="nohz=on console=ttyS1,115200n8 earlyprintk=ttyS1,115200" CONFIG_LINUX_COMMAND_LINE="nohz=on console=ttyS1,115200n8 earlyprintk=ttyS1,115200"
CONFIG_LINUX_INITRD="../../build/kgpe-d16/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/kgpe-d16/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_GDB_STUB is not set
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_CAR=y
# CONFIG_DEBUG_CAR is not set
# CONFIG_DEBUG_PIRQ is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_ENABLE_APIC_EXT_ID=y
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_REG_SCRIPT is not set
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_BOOTBLOCK_CUSTOM=y

View File

@ -1,742 +1,32 @@
# CONFIG_LOCALVERSION="4.8.1-Purism-1-heads-beta"
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="4.7-Purism-4-heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_USE_BLOBS=y CONFIG_USE_BLOBS=y
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_RELOCATABLE_RAMSTAGE=y
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
CONFIG_MEASURED_BOOT=y CONFIG_MEASURED_BOOT=y
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
CONFIG_VENDOR_PURISM=y CONFIG_VENDOR_PURISM=y
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_MAINBOARD_DIR="purism/librem_skl"
CONFIG_MAINBOARD_PART_NUMBER="Librem 13 v2"
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_MAINBOARD_VENDOR="Purism"
CONFIG_MAX_CPUS=8
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0xe00000 CONFIG_CBFS_SIZE=0xe00000
CONFIG_UART_FOR_CONSOLE=0
CONFIG_VGA_BIOS_ID="8086,1916"
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_DIMM_SPD_SIZE=512
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number" CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number"
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x40000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Purism"
CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y CONFIG_HAVE_ME_BIN=y
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
# CONFIG_POST_IO is not set # CONFIG_POST_IO is not set
CONFIG_DEVICETREE="variants/librem13v2/devicetree.cb"
CONFIG_MAX_REBOOT_CNT=3
# CONFIG_HAVE_GBE_BIN is not set
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_POST_DEVICE is not set # CONFIG_POST_DEVICE is not set
CONFIG_VARIANT_DIR="librem13v2"
# CONFIG_VBOOT is not set
CONFIG_MAINBOARD_FAMILY="Librem 13"
CONFIG_TPM_PIRQ=0x0
CONFIG_DIMM_MAX=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
# CONFIG_DRIVERS_UART_8250IO is not set # CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_IFD_BIN_PATH="../../blobs/librem_skl/descriptor.bin" CONFIG_IFD_BIN_PATH="../../blobs/librem_skl/descriptor.bin"
CONFIG_ME_BIN_PATH="../../blobs/librem_skl/me.bin" CONFIG_ME_BIN_PATH="../../blobs/librem_skl/me.bin"
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Librem 13 v2"
CONFIG_ADD_FSP_BINARIES=y CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_M_FILE="../../blobs/librem_skl/fspm.bin" CONFIG_FSP_M_FILE="../../blobs/librem_skl/fspm.bin"
CONFIG_FSP_S_FILE="../../blobs/librem_skl/fsps.bin" CONFIG_FSP_S_FILE="../../blobs/librem_skl/fsps.bin"
CONFIG_FSP_S_CBFS="fsps.bin"
CONFIG_FSP_M_CBFS="fspm.bin"
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
CONFIG_MAINBOARD_VERSION="2.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
# CONFIG_BOARD_PURISM_LIBREM13_V1 is not set
CONFIG_BOARD_PURISM_LIBREM13_V2=y CONFIG_BOARD_PURISM_LIBREM13_V2=y
# CONFIG_BOARD_PURISM_LIBREM15_V3 is not set
CONFIG_PCIEXP_L1_SUB_STATE=y
# CONFIG_NO_POST is not set # CONFIG_NO_POST is not set
CONFIG_BOARD_PURISM_BASEBOARD_LIBREM_SKL=y
CONFIG_CPU_MICROCODE_CBFS_LEN=0x18000
CONFIG_CPU_MICROCODE_CBFS_LOC=0xFFE115A0
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x1000000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
CONFIG_SYSTEM_TYPE_LAPTOP=y
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_CPU_SPECIFIC_OPTIONS=y
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x80000
CONFIG_RAMBASE=0x100000
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
# CONFIG_SOC_BROADCOM_CYGNUS is not set
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_PCR_BASE_ADDRESS=0xfd000000
CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ=120
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
# CONFIG_NHLT_MAX98357 is not set
# CONFIG_NHLT_DA7219 is not set
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
CONFIG_CPU_BCLK_MHZ=100
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
CONFIG_CHIPSET_BOOTBLOCK_INCLUDE="soc/intel/skylake/bootblock/timestamp.inc"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_SERIAL_CPU_INIT is not set
# CONFIG_UART_DEBUG is not set
CONFIG_MAX_ROOT_PORTS=24
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0x0
CONFIG_SOC_INTEL_SKYLAKE=y
# CONFIG_SOC_INTEL_KABYLAKE is not set
CONFIG_MAINBOARD_USES_FSP2_0=y
CONFIG_USE_FSP2_0_DRIVER=y
CONFIG_BOOTBLOCK_RESETS="soc/intel/common/reset.c"
# CONFIG_EXCLUDE_NATIVE_SD_INTERFACE is not set
# CONFIG_SKYLAKE_SOC_PCH_H is not set
# CONFIG_NHLT_DMIC_2CH is not set
# CONFIG_NHLT_DMIC_4CH is not set
# CONFIG_NHLT_NAU88L25 is not set
# CONFIG_NHLT_SSM4567 is not set
# CONFIG_NHLT_RT5514 is not set
# CONFIG_NHLT_RT5663 is not set
# CONFIG_NHLT_MAX98927 is not set
CONFIG_CAR_NEM_ENHANCED=y
# CONFIG_USE_SKYLAKE_FSP_CAR is not set
CONFIG_SKIP_FSP_CAR=y
# CONFIG_NO_FADT_8042 is not set
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
#
# Intel SoC Common IP Code
#
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
# CONFIG_INTEL_CAR_NEM is not set
# CONFIG_INTEL_CAR_CQOS is not set
CONFIG_INTEL_CAR_NEM_ENHANCED=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_EBDA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
# CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_DEBUG is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_SA_PCIEX_LENGTH=0x4000000
CONFIG_PCIEX_LENGTH_64MB=y
# CONFIG_SA_ENABLE_IMR is not set
CONFIG_SA_ENABLE_DPR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
# CONFIG_DISPLAY_MTRRS is not set
# CONFIG_DISPLAY_SMM_MEMORY_MAP is not set
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
# CONFIG_ACPI_CONSOLE is not set
# CONFIG_MMA is not set
CONFIG_SOC_INTEL_COMMON_GFX_OPREGION=y
# CONFIG_SOC_INTEL_COMMON_SMI is not set
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
CONFIG_SOC_INTEL_COMMON_NHLT=y
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_SSE2=y
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
CONFIG_PARALLEL_MP=y
CONFIG_PARALLEL_MP_AP_WORK=y
# CONFIG_UDELAY_IO is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_CONSTANT_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_SYNC_LFENCE is not set
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
CONFIG_NO_CAR_GLOBAL_MIGRATION=y
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_skl/cpu_microcode_blob.bin" CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_skl/cpu_microcode_blob.bin"
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
#
# Embedded Controllers
#
CONFIG_HAVE_INTEL_FIRMWARE=y
#
# Intel Firmware
#
# CONFIG_EM100 is not set
# CONFIG_CHECK_ME is not set
# CONFIG_USE_ME_CLEANER is not set
# CONFIG_HAVE_EC_BIN is not set
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
CONFIG_UDK_2015_BINDING=y
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
CONFIG_EARLY_EBDA_INIT=y
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
CONFIG_POSTCAR_STAGE=y
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_HAVE_FSP_GOP=y
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
# CONFIG_RUN_FSP_GOP is not set
# CONFIG_VGA_ROM_RUN is not set
CONFIG_NO_GFX_INIT=y CONFIG_NO_GFX_INIT=y
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y
CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_skl/vbt.bin" CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_skl/vbt.bin"
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_ELOG is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_CACHE_BASE=0xfffe0000
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
# CONFIG_SPI_FLASH_SMM is not set
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
# CONFIG_DRIVERS_UART is not set
# CONFIG_NO_UART_ON_SUPERIO is not set
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
# CONFIG_HAVE_USBDEBUG is not set
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
# CONFIG_DRIVERS_AMD_PI is not set
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
CONFIG_DRIVERS_I2C_DESIGNWARE=y
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_I2C_TPM is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_DISPLAY_HOBS is not set
# CONFIG_DISPLAY_UPD_DATA is not set
CONFIG_CHECKLIST_DATA_FILE_LOCATION="src/vendorcode/intel/fsp/fsp2_0/checklist"
CONFIG_PLATFORM_USES_FSP2_0=y
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
# CONFIG_DISPLAY_FSP_HEADER is not set
# CONFIG_FSP_CAR is not set
CONFIG_FSP_M_XIP=y CONFIG_FSP_M_XIP=y
# CONFIG_VERIFY_HOBS is not set
# CONFIG_FSP2_0_USES_TPM_MRC_HASH is not set
# CONFIG_INTEL_DDI is not set
# CONFIG_INTEL_EDID is not set
# CONFIG_INTEL_INT15 is not set
# CONFIG_INTEL_GMA_ACPI is not set
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_MAINBOARD_HAS_LPC_TPM=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
# CONFIG_TPM_DEACTIVATE is not set
# CONFIG_DRIVERS_RICOH_RCE822 is not set
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
# CONFIG_ACPI_SATA_GENERATOR is not set
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
CONFIG_TPM=y
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CMOS_POST is not set
# CONFIG_CONSOLE_POST is not set
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
CONFIG_HWBASE_DEBUG_CB=y
CONFIG_HAVE_ACPI_RESUME=y
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_HARD_RESET=y
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_GENERIC_UDELAY is not set
# CONFIG_TIMER_QUEUE is not set
# CONFIG_HAVE_OPTION_TABLE is not set
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_COMMON_FADT=y
CONFIG_ACPI_NHLT=y
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/librem13v2/bzImage" CONFIG_PAYLOAD_FILE="../../build/librem13v2/bzImage"
CONFIG_PAYLOAD_OPTIONS="" CONFIG_LINUX_COMMAND_LINE="intel_iommu=on quiet loglevel=3"
# CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE="intel_iommu=on iommu=pt"
CONFIG_LINUX_INITRD="../../build/librem13v2/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/librem13v2/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
CONFIG_COREINFO_SECONDARY_PAYLOAD=y CONFIG_COREINFO_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_STABLE=y
# CONFIG_MEMTEST_MASTER is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
# CONFIG_HAVE_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_SMM_RELOCATION is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_NO_EDID_FILL_FB=y
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
CONFIG_REG_SCRIPT=y
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_SPD_READ_BY_WORD=y
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y

View File

@ -0,0 +1,32 @@
CONFIG_LOCALVERSION="4.8.1-Purism-1-heads-beta"
CONFIG_USE_BLOBS=y
CONFIG_MEASURED_BOOT=y
CONFIG_VENDOR_PURISM=y
CONFIG_CBFS_SIZE=0xe00000
CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number"
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
# CONFIG_POST_IO is not set
# CONFIG_POST_DEVICE is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_IFD_BIN_PATH="../../blobs/librem_kbl/descriptor.bin"
CONFIG_ME_BIN_PATH="../../blobs/librem_kbl/me.bin"
CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_M_FILE="../../blobs/librem_kbl/fspm.bin"
CONFIG_FSP_S_FILE="../../blobs/librem_kbl/fsps.bin"
CONFIG_BOARD_PURISM_LIBREM13_V4=y
# CONFIG_NO_POST is not set
CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_kbl/cpu_microcode_blob.bin"
CONFIG_NO_GFX_INIT=y
CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y
CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_kbl/vbt.bin"
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
CONFIG_FSP_M_XIP=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_PAYLOAD_LINUX=y
CONFIG_PAYLOAD_FILE="../../build/librem13v4/bzImage"
CONFIG_LINUX_COMMAND_LINE="intel_iommu=on quiet loglevel=3"
CONFIG_LINUX_INITRD="../../build/librem13v4/initrd.cpio.xz"
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y

View File

@ -1,742 +1,32 @@
# CONFIG_LOCALVERSION="4.8.1-Purism-1-heads-beta"
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="4.7-Purism-4-heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_COMPRESS_RAMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
CONFIG_USE_BLOBS=y CONFIG_USE_BLOBS=y
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_RELOCATABLE_RAMSTAGE=y
CONFIG_CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
CONFIG_MEASURED_BOOT=y CONFIG_MEASURED_BOOT=y
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
CONFIG_VENDOR_PURISM=y CONFIG_VENDOR_PURISM=y
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_MAINBOARD_DIR="purism/librem_skl"
CONFIG_MAINBOARD_PART_NUMBER="Librem 15 v3"
CONFIG_IRQ_SLOT_COUNT=18
CONFIG_MAINBOARD_VENDOR="Purism"
CONFIG_MAX_CPUS=8
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0xe00000 CONFIG_CBFS_SIZE=0xe00000
CONFIG_UART_FOR_CONSOLE=0
CONFIG_VGA_BIOS_ID="8086,1916"
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_DIMM_SPD_SIZE=512
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number" CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number"
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0x40000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Purism"
CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y CONFIG_HAVE_ME_BIN=y
CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
# CONFIG_POST_IO is not set # CONFIG_POST_IO is not set
CONFIG_DEVICETREE="variants/librem15v3/devicetree.cb"
CONFIG_MAX_REBOOT_CNT=3
# CONFIG_HAVE_GBE_BIN is not set
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_POST_DEVICE is not set # CONFIG_POST_DEVICE is not set
CONFIG_VARIANT_DIR="librem15v3"
# CONFIG_VBOOT is not set
CONFIG_MAINBOARD_FAMILY="Librem 15"
CONFIG_TPM_PIRQ=0x0
CONFIG_DIMM_MAX=1
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
# CONFIG_DRIVERS_UART_8250IO is not set # CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_IFD_BIN_PATH="../../blobs/librem_skl/descriptor.bin" CONFIG_IFD_BIN_PATH="../../blobs/librem_skl/descriptor.bin"
CONFIG_ME_BIN_PATH="../../blobs/librem_skl/me.bin" CONFIG_ME_BIN_PATH="../../blobs/librem_skl/me.bin"
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Librem 15 v3"
CONFIG_ADD_FSP_BINARIES=y CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_M_FILE="../../blobs/librem_skl/fspm.bin" CONFIG_FSP_M_FILE="../../blobs/librem_skl/fspm.bin"
CONFIG_FSP_S_FILE="../../blobs/librem_skl/fsps.bin" CONFIG_FSP_S_FILE="../../blobs/librem_skl/fsps.bin"
CONFIG_FSP_S_CBFS="fsps.bin"
CONFIG_FSP_M_CBFS="fspm.bin"
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
CONFIG_MAINBOARD_VERSION="3.0"
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
# CONFIG_BOARD_PURISM_LIBREM13_V1 is not set
# CONFIG_BOARD_PURISM_LIBREM13_V2 is not set
CONFIG_BOARD_PURISM_LIBREM15_V3=y CONFIG_BOARD_PURISM_LIBREM15_V3=y
CONFIG_PCIEXP_L1_SUB_STATE=y
# CONFIG_NO_POST is not set # CONFIG_NO_POST is not set
CONFIG_BOARD_PURISM_BASEBOARD_LIBREM_SKL=y
CONFIG_CPU_MICROCODE_CBFS_LEN=0x18000
CONFIG_CPU_MICROCODE_CBFS_LOC=0xFFE115A0
CONFIG_BOARD_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
CONFIG_COREBOOT_ROMSIZE_KB_16384=y
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=16384
CONFIG_ROM_SIZE=0x1000000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
CONFIG_SYSTEM_TYPE_LAPTOP=y
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_CPU_SPECIFIC_OPTIONS=y
CONFIG_DCACHE_BSP_STACK_SIZE=0x4000
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x80000
CONFIG_RAMBASE=0x100000
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=120
# CONFIG_SOC_BROADCOM_CYGNUS is not set
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_PCR_BASE_ADDRESS=0xfd000000
CONFIG_SOC_INTEL_COMMON_LPSS_CLOCK_MHZ=120
CONFIG_C_ENV_BOOTBLOCK_SIZE=0xC000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
# CONFIG_NHLT_MAX98357 is not set
# CONFIG_NHLT_DA7219 is not set
# CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS is not set
CONFIG_CPU_BCLK_MHZ=100
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x30
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0xc35
# CONFIG_RESET_ON_INVALID_RAMSTAGE_CACHE is not set
CONFIG_CHIPSET_BOOTBLOCK_INCLUDE="soc/intel/skylake/bootblock/timestamp.inc"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_SERIAL_CPU_INIT is not set
# CONFIG_UART_DEBUG is not set
CONFIG_MAX_ROOT_PORTS=24
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=2
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0x0
CONFIG_SOC_INTEL_SKYLAKE=y
# CONFIG_SOC_INTEL_KABYLAKE is not set
CONFIG_MAINBOARD_USES_FSP2_0=y
CONFIG_USE_FSP2_0_DRIVER=y
CONFIG_BOOTBLOCK_RESETS="soc/intel/common/reset.c"
# CONFIG_EXCLUDE_NATIVE_SD_INTERFACE is not set
# CONFIG_SKYLAKE_SOC_PCH_H is not set
# CONFIG_NHLT_DMIC_2CH is not set
# CONFIG_NHLT_DMIC_4CH is not set
# CONFIG_NHLT_NAU88L25 is not set
# CONFIG_NHLT_SSM4567 is not set
# CONFIG_NHLT_RT5514 is not set
# CONFIG_NHLT_RT5663 is not set
# CONFIG_NHLT_MAX98927 is not set
CONFIG_CAR_NEM_ENHANCED=y
# CONFIG_USE_SKYLAKE_FSP_CAR is not set
CONFIG_SKIP_FSP_CAR=y
# CONFIG_NO_FADT_8042 is not set
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
#
# Intel SoC Common IP Code
#
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
# CONFIG_INTEL_CAR_NEM is not set
# CONFIG_INTEL_CAR_CQOS is not set
CONFIG_INTEL_CAR_NEM_ENHANCED=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_EBDA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
# CONFIG_DEBUG_SOC_COMMON_BLOCK_GPIO is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PADCFG_PADTOL=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LEGACY_MACROS=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_MULTI_ACPI_DEVICES is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2 is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_I2C_DEBUG is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SCS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SGX=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_SA_PCIEX_LENGTH=0x4000000
CONFIG_PCIEX_LENGTH_64MB=y
# CONFIG_SA_ENABLE_IMR is not set
CONFIG_SA_ENABLE_DPR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
# CONFIG_DISPLAY_MTRRS is not set
# CONFIG_DISPLAY_SMM_MEMORY_MAP is not set
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
# CONFIG_ACPI_CONSOLE is not set
# CONFIG_MMA is not set
CONFIG_SOC_INTEL_COMMON_GFX_OPREGION=y
# CONFIG_SOC_INTEL_COMMON_SMI is not set
# CONFIG_SOC_INTEL_COMMON_ACPI is not set
CONFIG_SOC_INTEL_COMMON_NHLT=y
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_SSE2=y
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
CONFIG_PARALLEL_MP=y
CONFIG_PARALLEL_MP_AP_WORK=y
# CONFIG_UDELAY_IO is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_CONSTANT_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_SYNC_LFENCE is not set
CONFIG_TSC_SYNC_MFENCE=y
CONFIG_NO_FIXED_XIP_ROM_SIZE=y
CONFIG_LOGICAL_CPUS=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
CONFIG_NO_CAR_GLOBAL_MIGRATION=y
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_skl/cpu_microcode_blob.bin" CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_skl/cpu_microcode_blob.bin"
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
#
# Embedded Controllers
#
CONFIG_HAVE_INTEL_FIRMWARE=y
#
# Intel Firmware
#
# CONFIG_EM100 is not set
# CONFIG_CHECK_ME is not set
# CONFIG_USE_ME_CLEANER is not set
# CONFIG_HAVE_EC_BIN is not set
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
CONFIG_UDK_2015_BINDING=y
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
CONFIG_EARLY_EBDA_INIT=y
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
CONFIG_POSTCAR_STAGE=y
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_HAVE_FSP_GOP=y
# CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT is not set
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
# CONFIG_RUN_FSP_GOP is not set
# CONFIG_VGA_ROM_RUN is not set
CONFIG_NO_GFX_INIT=y CONFIG_NO_GFX_INIT=y
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y
CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_skl/vbt.bin" CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_skl/vbt.bin"
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_ELOG is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_CACHE_BASE=0xfffe0000
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_MRC_SETTINGS_PROTECT=y
# CONFIG_HAS_RECOVERY_MRC_CACHE is not set
# CONFIG_MRC_CLEAR_NORMAL_CACHE_ON_RECOVERY_RETRAIN is not set
# CONFIG_MRC_SETTINGS_VARIABLE_DATA is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
# CONFIG_SPI_FLASH_SMM is not set
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
# CONFIG_DRIVERS_UART is not set
# CONFIG_NO_UART_ON_SUPERIO is not set
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
# CONFIG_HAVE_USBDEBUG is not set
# CONFIG_HAVE_USBDEBUG_OPTIONS is not set
# CONFIG_DRIVERS_AMD_PI is not set
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
CONFIG_DRIVERS_I2C_DESIGNWARE=y
# CONFIG_DRIVERS_I2C_DESIGNWARE_DEBUG is not set
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_I2C_TPM is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_DISPLAY_HOBS is not set
# CONFIG_DISPLAY_UPD_DATA is not set
CONFIG_CHECKLIST_DATA_FILE_LOCATION="src/vendorcode/intel/fsp/fsp2_0/checklist"
CONFIG_PLATFORM_USES_FSP2_0=y
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
# CONFIG_DISPLAY_FSP_HEADER is not set
# CONFIG_FSP_CAR is not set
CONFIG_FSP_M_XIP=y CONFIG_FSP_M_XIP=y
# CONFIG_VERIFY_HOBS is not set
# CONFIG_FSP2_0_USES_TPM_MRC_HASH is not set
# CONFIG_INTEL_DDI is not set
# CONFIG_INTEL_EDID is not set
# CONFIG_INTEL_INT15 is not set
# CONFIG_INTEL_GMA_ACPI is not set
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
# CONFIG_DRIVERS_INTEL_WIFI is not set # CONFIG_DRIVERS_INTEL_WIFI is not set
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_MAINBOARD_HAS_LPC_TPM=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
# CONFIG_TPM_DEACTIVATE is not set
# CONFIG_DRIVERS_RICOH_RCE822 is not set
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
# CONFIG_ACPI_SATA_GENERATOR is not set
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
CONFIG_TPM=y
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CMOS_POST is not set
# CONFIG_CONSOLE_POST is not set
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
CONFIG_HWBASE_DEBUG_CB=y
CONFIG_HAVE_ACPI_RESUME=y
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_HARD_RESET=y
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_GENERIC_UDELAY is not set
# CONFIG_TIMER_QUEUE is not set
# CONFIG_HAVE_OPTION_TABLE is not set
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
# CONFIG_USE_WATCHDOG_ON_BOOT is not set
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_COMMON_FADT=y
CONFIG_ACPI_NHLT=y
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/librem15v3/bzImage" CONFIG_PAYLOAD_FILE="../../build/librem15v3/bzImage"
CONFIG_PAYLOAD_OPTIONS="" CONFIG_LINUX_COMMAND_LINE="intel_iommu=on quiet loglevel=3"
# CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE="intel_iommu=on iommu=pt"
CONFIG_LINUX_INITRD="../../build/librem15v3/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/librem15v3/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
CONFIG_COREINFO_SECONDARY_PAYLOAD=y CONFIG_COREINFO_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y CONFIG_MEMTEST_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_STABLE=y
# CONFIG_MEMTEST_MASTER is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
# CONFIG_HAVE_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_SMM_RELOCATION is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_NO_EDID_FILL_FB=y
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
CONFIG_REG_SCRIPT=y
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_SPD_READ_BY_WORD=y
CONFIG_C_ENVIRONMENT_BOOTBLOCK=y

View File

@ -0,0 +1,32 @@
CONFIG_LOCALVERSION="4.8.1-Purism-1-heads-beta"
CONFIG_USE_BLOBS=y
CONFIG_MEASURED_BOOT=y
CONFIG_VENDOR_PURISM=y
CONFIG_CBFS_SIZE=0xe00000
CONFIG_MAINBOARD_SERIAL_NUMBER="Unknown Serial Number"
CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y
# CONFIG_POST_IO is not set
# CONFIG_POST_DEVICE is not set
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_IFD_BIN_PATH="../../blobs/librem_kbl/descriptor.bin"
CONFIG_ME_BIN_PATH="../../blobs/librem_kbl/me.bin"
CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_M_FILE="../../blobs/librem_kbl/fspm.bin"
CONFIG_FSP_S_FILE="../../blobs/librem_kbl/fsps.bin"
CONFIG_BOARD_PURISM_LIBREM15_V4=y
# CONFIG_NO_POST is not set
CONFIG_CPU_UCODE_BINARIES="../../blobs/librem_kbl/cpu_microcode_blob.bin"
CONFIG_NO_GFX_INIT=y
CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE=y
CONFIG_INTEL_GMA_VBT_FILE="../../blobs/librem_kbl/vbt.bin"
CONFIG_DISPLAY_FSP_CALLS_AND_STATUS=y
CONFIG_FSP_M_XIP=y
# CONFIG_DRIVERS_INTEL_WIFI is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
CONFIG_PAYLOAD_LINUX=y
CONFIG_PAYLOAD_FILE="../../build/librem15v4/bzImage"
CONFIG_LINUX_COMMAND_LINE="intel_iommu=on quiet loglevel=3"
CONFIG_LINUX_INITRD="../../build/librem15v4/initrd.cpio.xz"
CONFIG_COREINFO_SECONDARY_PAYLOAD=y
CONFIG_MEMTEST_SECONDARY_PAYLOAD=y

View File

@ -1,576 +1,17 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="-heads" CONFIG_LOCALVERSION="-heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_COMPRESS_RAMSTAGE=y
# CONFIG_INCLUDE_CONFIG_FILE is not set # CONFIG_INCLUDE_CONFIG_FILE is not set
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_USE_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
# CONFIG_RELOCATABLE_RAMSTAGE is not set
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
CONFIG_VENDOR_EMULATION=y
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="emulation/qemu-q35"
CONFIG_MAINBOARD_PART_NUMBER="QEMU x86 q35/ich9"
CONFIG_MAINBOARD_VENDOR="Emulation"
CONFIG_MAX_CPUS=1
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0x700000 CONFIG_CBFS_SIZE=0x700000
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_DIMM_SPD_SIZE=256
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
CONFIG_DCACHE_RAM_BASE=0xd0000
CONFIG_DCACHE_RAM_SIZE=0x10000
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Emulation"
CONFIG_MMCONF_BASE_ADDRESS=0xb0000000
# CONFIG_POST_IO is not set # CONFIG_POST_IO is not set
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_BOOTBLOCK_MAINBOARD_INIT="mainboard/emulation/qemu-q35/bootblock.c"
CONFIG_MAX_REBOOT_CNT=3
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_BOARD_EMULATION_QEMU_ARMV7 is not set
# CONFIG_BOARD_EMULATION_QEMU_X86_I440FX is not set
# CONFIG_BOARD_EMULATION_QEMU_POWER8 is not set
CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y CONFIG_BOARD_EMULATION_QEMU_X86_Q35=y
# CONFIG_BOARD_EMULATION_QEMU_UCB_RISCV is not set
# CONFIG_BOARD_EMULATION_SPIKE_UCB_RISCV is not set
CONFIG_BOARD_EMULATION_QEMU_X86=y
# CONFIG_POST_DEVICE is not set # CONFIG_POST_DEVICE is not set
# CONFIG_VBOOT is not set
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_DRIVERS_UART_8250IO=y
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="QEMU x86 q35/ich9"
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=6
# CONFIG_USBDEBUG is not set
CONFIG_MAINBOARD_VERSION="1.0"
CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_DRIVERS_PS2_KEYBOARD=y
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_NO_POST is not set
CONFIG_BOARD_ROMSIZE_KB_2048=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB_8192=y CONFIG_COREBOOT_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=8192
CONFIG_ROM_SIZE=0x800000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
# CONFIG_SYSTEM_TYPE_LAPTOP is not set
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_RAMBASE=0x100000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
# CONFIG_SOC_BROADCOM_CYGNUS is not set
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_PCIEXP_ASPM=y CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y CONFIG_PCIEXP_COMMON_CLOCK=y
# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/i82801ix/bootblock.c"
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0 CONFIG_UART_PCI_ADDR=0
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_SOC_INTEL_KABYLAKE is not set
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_XIP_ROM_SIZE=0x10000
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
# CONFIG_SSE2 is not set
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
CONFIG_CPU_QEMU_X86=y
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
# CONFIG_PARALLEL_MP is not set
CONFIG_UDELAY_IO=y
# CONFIG_UDELAY_LAPIC is not set
# CONFIG_UDELAY_TSC is not set
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_SYNC_LFENCE is not set
# CONFIG_TSC_SYNC_MFENCE is not set
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
CONFIG_LOGICAL_CPUS=y
# CONFIG_SMM_TSEG is not set
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
# CONFIG_SUPPORT_CPU_UCODE_IN_CBFS is not set
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
CONFIG_CPU_UCODE_BINARIES=""
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
# CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE is not set
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN is not set
# CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ is not set
# CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN is not set
CONFIG_SOUTHBRIDGE_INTEL_I82801IX=y
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
#
# Embedded Controllers
#
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
# CONFIG_UDK_2015_BINDING is not set
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
# CONFIG_EARLY_EBDA_INIT is not set
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS=y
# CONFIG_POSTCAR_STAGE is not set
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_HAS_LIBGFXINIT is not set
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
# CONFIG_SPI_FLASH is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
# CONFIG_DRIVERS_UART is not set
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
# CONFIG_NO_UART_ON_SUPERIO is not set
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_AMD_PI is not set
CONFIG_DRIVERS_EMULATION_QEMU_BOCHS=y
# CONFIG_SMBIOS_PROVIDED_BY_MOBO is not set
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_INTEL_DDI is not set
# CONFIG_INTEL_EDID is not set
# CONFIG_INTEL_INT15 is not set
# CONFIG_INTEL_GMA_ACPI is not set
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
CONFIG_DRIVERS_INTEL_WIFI=y
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
# CONFIG_MAINBOARD_HAS_LPC_TPM is not set
CONFIG_VGA=y
# CONFIG_DRIVERS_RICOH_RCE822 is not set
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
# CONFIG_ACPI_SATA_GENERATOR is not set
# CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES is not set
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
# CONFIG_RTC is not set
# CONFIG_TPM is not set
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_CONSOLE_SERIAL is not set # CONFIG_CONSOLE_SERIAL is not set
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
CONFIG_CONSOLE_QEMU_DEBUGCON=y
CONFIG_CONSOLE_QEMU_DEBUGCON_PORT=0x402
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CMOS_POST is not set
# CONFIG_CONSOLE_POST is not set
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
# CONFIG_HWBASE_DEBUG_CB is not set
CONFIG_HWBASE_DEBUG_NULL=y
# CONFIG_HAVE_ACPI_RESUME is not set
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
CONFIG_HAVE_HARD_RESET=y
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
# CONFIG_HAVE_MONOTONIC_TIMER is not set
# CONFIG_HAVE_OPTION_TABLE is not set
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
# CONFIG_COMMON_FADT is not set
# CONFIG_ACPI_NHLT is not set
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/qemu-coreboot/bzImage" CONFIG_PAYLOAD_FILE="../../build/qemu-coreboot/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE=""
CONFIG_LINUX_INITRD="../../build/qemu-coreboot/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/qemu-coreboot/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
# CONFIG_HAVE_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
# CONFIG_DEBUG_SMM_RELOCATION is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_REG_SCRIPT is not set
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_BOOTBLOCK_CUSTOM=y

View File

@ -1,683 +1,25 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="heads" CONFIG_LOCALVERSION="heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
# CONFIG_INCLUDE_CONFIG_FILE is not set # CONFIG_INCLUDE_CONFIG_FILE is not set
# CONFIG_COLLECT_TIMESTAMPS is not set # CONFIG_COLLECT_TIMESTAMPS is not set
CONFIG_USE_BLOBS=y CONFIG_USE_BLOBS=y
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_RELOCATABLE_RAMSTAGE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
CONFIG_MEASURED_BOOT=y CONFIG_MEASURED_BOOT=y
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
CONFIG_VENDOR_LENOVO=y CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="lenovo/x220"
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X220"
CONFIG_MAINBOARD_VENDOR="LENOVO"
CONFIG_MAX_CPUS=8
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0x7e8000 CONFIG_CBFS_SIZE=0x7e8000
CONFIG_VGA_BIOS_ID="8086,0126"
CONFIG_ONBOARD_VGA_IS_PRIMARY=y CONFIG_ONBOARD_VGA_IS_PRIMARY=y
CONFIG_DIMM_SPD_SIZE=256
# CONFIG_VGA_BIOS is not set
CONFIG_DCACHE_RAM_BASE=0xfefe0000
CONFIG_DCACHE_RAM_SIZE=0x20000
CONFIG_VGA_BIOS_FILE="pci8086,0126.rom"
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21db
CONFIG_HAVE_IFD_BIN=y CONFIG_HAVE_IFD_BIN=y
CONFIG_HAVE_ME_BIN=y CONFIG_HAVE_ME_BIN=y
CONFIG_DRAM_RESET_GATE_GPIO=10
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_MAX_REBOOT_CNT=3
CONFIG_HAVE_GBE_BIN=y CONFIG_HAVE_GBE_BIN=y
CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_VBOOT is not set
CONFIG_TPM_PIRQ=0x0
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_IFD_BIN_PATH="../../blobs/x220/ifd.bin" CONFIG_IFD_BIN_PATH="../../blobs/x220/ifd.bin"
CONFIG_ME_BIN_PATH="../../blobs/x220/me.bin" CONFIG_ME_BIN_PATH="../../blobs/x220/me.bin"
# CONFIG_BOARD_LENOVO_G505S is not set
# CONFIG_BOARD_LENOVO_L520 is not set
# CONFIG_BOARD_LENOVO_R400 is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T420 is not set
# CONFIG_BOARD_LENOVO_T420S is not set
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
# CONFIG_BOARD_LENOVO_T430S is not set
# CONFIG_BOARD_LENOVO_T500 is not set
# CONFIG_BOARD_LENOVO_T520 is not set
# CONFIG_BOARD_LENOVO_T530 is not set
# CONFIG_BOARD_LENOVO_T60 is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
# CONFIG_BOARD_LENOVO_X201 is not set
CONFIG_BOARD_LENOVO_X220=y CONFIG_BOARD_LENOVO_X220=y
# CONFIG_BOARD_LENOVO_X220I is not set
# CONFIG_BOARD_LENOVO_X230 is not set
# CONFIG_BOARD_LENOVO_X60 is not set
# CONFIG_BOARD_LENOVO_Z61T is not set
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5
# CONFIG_USBDEBUG is not set
CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_DRIVERS_PS2_KEYBOARD=y
# CONFIG_PCIEXP_L1_SUB_STATE is not set
CONFIG_NO_POST=y CONFIG_NO_POST=y
CONFIG_BOARD_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
CONFIG_COREBOOT_ROMSIZE_KB_8192=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=8192
CONFIG_ROM_SIZE=0x800000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
CONFIG_SYSTEM_TYPE_LAPTOP=y
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_CPU_SPECIFIC_OPTIONS=y
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_RAMBASE=0x100000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
# CONFIG_SOC_BROADCOM_CYGNUS is not set
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
# CONFIG_BUILD_WITH_FAKE_IFD is not set
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
CONFIG_CACHE_MRC_SIZE_KB=512
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0x0
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_SOC_INTEL_KABYLAKE is not set
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_XIP_ROM_SIZE=0x20000
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_CPU_INTEL_MODEL_206AX=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_RPGA989=y
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_VMX_LOCK_BIT=y
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
# CONFIG_PARALLEL_MP is not set
# CONFIG_UDELAY_IO is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_CONSTANT_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_SYNC_LFENCE is not set
CONFIG_TSC_SYNC_MFENCE=y
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
CONFIG_LOGICAL_CPUS=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
CONFIG_CPU_UCODE_BINARIES=""
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
CONFIG_MRC_CACHE_SIZE=0x10000
CONFIG_NORTHBRIDGE_INTEL_SANDYBRIDGE=y
CONFIG_USE_NATIVE_RAMINIT=y
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
CONFIG_IF_NATIVE_VGA_INIT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_INTEL_C216=y
CONFIG_SOUTH_BRIDGE_OPTIONS=y
CONFIG_LOCK_SPI_FLASH_NONE=y
# CONFIG_LOCK_SPI_FLASH_RO is not set
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
#
# Embedded Controllers
#
CONFIG_EC_ACPI=y
CONFIG_EC_LENOVO_H8=y
CONFIG_H8_BEEP_ON_DEATH=y
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
CONFIG_EC_LENOVO_PMH7=y
CONFIG_HAVE_INTEL_FIRMWARE=y
#
# Intel Firmware
#
# CONFIG_EM100 is not set
CONFIG_CHECK_ME=y CONFIG_CHECK_ME=y
# CONFIG_USE_ME_CLEANER is not set
CONFIG_GBE_BIN_PATH="../../blobs/x220/gbe.bin" CONFIG_GBE_BIN_PATH="../../blobs/x220/gbe.bin"
# CONFIG_HAVE_EC_BIN is not set
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
# CONFIG_UDK_2015_BINDING is not set
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
# CONFIG_EARLY_EBDA_INIT is not set
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
# CONFIG_POSTCAR_STAGE is not set
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
# CONFIG_SPI_FLASH_SMM is not set
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
# CONFIG_DRIVERS_UART is not set
CONFIG_NO_UART_ON_SUPERIO=y
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_AMD_PI is not set
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_I2C_TPM is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_INTEL_DDI is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_CPU="Sandybridge"
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
CONFIG_DRIVERS_INTEL_WIFI=y
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_MAINBOARD_HAS_LPC_TPM=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
# CONFIG_TPM_DEACTIVATE is not set
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
CONFIG_ACPI_SATA_GENERATOR=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
CONFIG_RTC=y
CONFIG_TPM=y
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
# CONFIG_HWBASE_DEBUG_CB is not set
CONFIG_HWBASE_DEBUG_NULL=y
CONFIG_HAVE_ACPI_RESUME=y
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_HARD_RESET=y
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_GENERIC_UDELAY is not set
# CONFIG_TIMER_QUEUE is not set
CONFIG_HAVE_OPTION_TABLE=y
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_COMMON_FADT=y
# CONFIG_ACPI_NHLT is not set
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/x220/bzImage" CONFIG_PAYLOAD_FILE="../../build/x220/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE="quiet" CONFIG_LINUX_COMMAND_LINE="quiet"
CONFIG_LINUX_INITRD="../../build/x220/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/x220/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_DEBUG_SMM_RELOCATION=y CONFIG_DEBUG_SMM_RELOCATION=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_REG_SCRIPT is not set
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_BOOTBLOCK_CUSTOM=y

View File

@ -1,705 +1,18 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="heads" CONFIG_LOCALVERSION="heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
# CONFIG_INCLUDE_CONFIG_FILE is not set # CONFIG_INCLUDE_CONFIG_FILE is not set
# CONFIG_COLLECT_TIMESTAMPS is not set # CONFIG_COLLECT_TIMESTAMPS is not set
CONFIG_USE_BLOBS=y CONFIG_USE_BLOBS=y
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_RELOCATABLE_RAMSTAGE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
CONFIG_MEASURED_BOOT=y CONFIG_MEASURED_BOOT=y
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
CONFIG_VENDOR_LENOVO=y CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="lenovo/x230"
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
CONFIG_MAINBOARD_VENDOR="LENOVO"
CONFIG_MAX_CPUS=8
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0x400000 CONFIG_CBFS_SIZE=0x400000
CONFIG_UART_FOR_CONSOLE=0
CONFIG_VGA_BIOS_ID="8086,0166"
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_DIMM_SPD_SIZE=256
# CONFIG_VGA_BIOS is not set
CONFIG_DCACHE_RAM_BASE=0xfefe0000
CONFIG_DCACHE_RAM_SIZE=0x20000
CONFIG_VGA_BIOS_FILE="pci8086,0166.rom"
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
# CONFIG_HAVE_IFD_BIN is not set
# CONFIG_HAVE_ME_BIN is not set
CONFIG_DRAM_RESET_GATE_GPIO=10
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
CONFIG_POST_IO=y
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_MAX_REBOOT_CNT=3
CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_POST_DEVICE is not set # CONFIG_POST_DEVICE is not set
CONFIG_IFD_BIOS_SECTION=""
CONFIG_IFD_ME_SECTION=""
# CONFIG_VBOOT is not set
CONFIG_TPM_PIRQ=0x0
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_TTYS0_LCS=3
CONFIG_DRIVERS_UART_8250IO=y CONFIG_DRIVERS_UART_8250IO=y
CONFIG_IFD_GBE_SECTION=""
# CONFIG_BOARD_LENOVO_G505S is not set
# CONFIG_BOARD_LENOVO_L520 is not set
# CONFIG_BOARD_LENOVO_R400 is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T420 is not set
# CONFIG_BOARD_LENOVO_T420S is not set
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
# CONFIG_BOARD_LENOVO_T430S is not set
# CONFIG_BOARD_LENOVO_T500 is not set
# CONFIG_BOARD_LENOVO_T520 is not set
# CONFIG_BOARD_LENOVO_T530 is not set
# CONFIG_BOARD_LENOVO_T60 is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
# CONFIG_BOARD_LENOVO_X201 is not set
# CONFIG_BOARD_LENOVO_X220 is not set
# CONFIG_BOARD_LENOVO_X220I is not set
CONFIG_BOARD_LENOVO_X230=y CONFIG_BOARD_LENOVO_X230=y
# CONFIG_BOARD_LENOVO_X60 is not set
# CONFIG_BOARD_LENOVO_Z61T is not set
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=8
# CONFIG_USBDEBUG is not set
CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_DRIVERS_PS2_KEYBOARD=y
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_NO_POST is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=12288
CONFIG_ROM_SIZE=0xc00000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
CONFIG_SYSTEM_TYPE_LAPTOP=y
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_CPU_SPECIFIC_OPTIONS=y
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_RAMBASE=0x100000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
# CONFIG_SOC_BROADCOM_CYGNUS is not set
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_BUILD_WITH_FAKE_IFD=y
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
CONFIG_CACHE_MRC_SIZE_KB=512
CONFIG_TTYS0_BASE=0x3f8
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0 CONFIG_UART_PCI_ADDR=0
CONFIG_HPET_MIN_TICKS=0x80
# CONFIG_SOC_INTEL_KABYLAKE is not set
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
CONFIG_TTYS0_BAUD=115200
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_XIP_ROM_SIZE=0x20000
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_CPU_INTEL_MODEL_306AX=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_RPGA989=y
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_VMX_LOCK_BIT=y
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
# CONFIG_PARALLEL_MP is not set
# CONFIG_UDELAY_IO is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_CONSTANT_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_SYNC_LFENCE is not set
CONFIG_TSC_SYNC_MFENCE=y
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
CONFIG_LOGICAL_CPUS=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
CONFIG_CPU_UCODE_BINARIES=""
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
CONFIG_MRC_CACHE_SIZE=0x10000
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
CONFIG_USE_NATIVE_RAMINIT=y
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
CONFIG_IF_NATIVE_VGA_INIT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_INTEL_C216=y
CONFIG_SOUTH_BRIDGE_OPTIONS=y
CONFIG_LOCK_SPI_FLASH_NONE=y
# CONFIG_LOCK_SPI_FLASH_RO is not set
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
#
# Embedded Controllers
#
CONFIG_EC_ACPI=y
CONFIG_EC_LENOVO_H8=y
CONFIG_H8_BEEP_ON_DEATH=y
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
CONFIG_EC_LENOVO_PMH7=y
CONFIG_HAVE_INTEL_FIRMWARE=y
#
# Intel Firmware
#
CONFIG_IFD_PLATFORM_SECTION=""
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
# CONFIG_UDK_2015_BINDING is not set
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
# CONFIG_EARLY_EBDA_INIT is not set
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
# CONFIG_POSTCAR_STAGE is not set
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
# CONFIG_SPI_FLASH_SMM is not set
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
CONFIG_DRIVERS_UART=y
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
CONFIG_NO_UART_ON_SUPERIO=y
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_AMD_PI is not set
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_I2C_TPM is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_INTEL_DDI is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_CPU="Ivybridge"
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
CONFIG_DRIVERS_INTEL_WIFI=y
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_MAINBOARD_HAS_LPC_TPM=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
# CONFIG_TPM_DEACTIVATE is not set
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
CONFIG_ACPI_SATA_GENERATOR=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
CONFIG_RTC=y
CONFIG_TPM=y
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_CONSOLE_SERIAL=y
#
# I/O mapped, 8250-compatible
#
#
# Serial port base address = 0x3f8
#
# CONFIG_CONSOLE_SERIAL_921600 is not set
# CONFIG_CONSOLE_SERIAL_460800 is not set
# CONFIG_CONSOLE_SERIAL_230400 is not set
CONFIG_CONSOLE_SERIAL_115200=y
# CONFIG_CONSOLE_SERIAL_57600 is not set
# CONFIG_CONSOLE_SERIAL_38400 is not set
# CONFIG_CONSOLE_SERIAL_19200 is not set
# CONFIG_CONSOLE_SERIAL_9600 is not set
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
# CONFIG_CONSOLE_SPI_FLASH is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CMOS_POST is not set
# CONFIG_CONSOLE_POST is not set
CONFIG_POST_IO_PORT=0x80
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
CONFIG_HWBASE_DEBUG_CB=y
CONFIG_HAVE_ACPI_RESUME=y
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_HARD_RESET=y
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_GENERIC_UDELAY is not set
# CONFIG_TIMER_QUEUE is not set
CONFIG_HAVE_OPTION_TABLE=y
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_COMMON_FADT=y
# CONFIG_ACPI_NHLT is not set
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/x230-flash/bzImage" CONFIG_PAYLOAD_FILE="../../build/x230-flash/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE=""
CONFIG_LINUX_INITRD="../../build/x230-flash/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/x230-flash/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_GDB_STUB is not set
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_DEBUG_SMM_RELOCATION=y CONFIG_DEBUG_SMM_RELOCATION=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_REG_SCRIPT is not set
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_BOOTBLOCK_CUSTOM=y

View File

@ -1,685 +1,24 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="heads" CONFIG_LOCALVERSION="heads"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE=y
# CONFIG_INCLUDE_CONFIG_FILE is not set # CONFIG_INCLUDE_CONFIG_FILE is not set
# CONFIG_COLLECT_TIMESTAMPS is not set # CONFIG_COLLECT_TIMESTAMPS is not set
CONFIG_USE_BLOBS=y CONFIG_USE_BLOBS=y
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_RELOCATABLE_RAMSTAGE=y
# CONFIG_UPDATE_IMAGE is not set
# CONFIG_BOOTSPLASH_IMAGE is not set
CONFIG_MEASURED_BOOT=y CONFIG_MEASURED_BOOT=y
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_A_TREND is not set
# CONFIG_VENDOR_AAEON is not set
# CONFIG_VENDOR_ABIT is not set
# CONFIG_VENDOR_ADI is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_ADVANSUS is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ARTECGROUP is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_AVALUE is not set
# CONFIG_VENDOR_AZZA is not set
# CONFIG_VENDOR_BACHMANN is not set
# CONFIG_VENDOR_BAP is not set
# CONFIG_VENDOR_BCOM is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BROADCOM is not set
# CONFIG_VENDOR_COMPAQ is not set
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_CUBIETECH is not set
# CONFIG_VENDOR_DIGITALLOGIC is not set
# CONFIG_VENDOR_DMP is not set
# CONFIG_VENDOR_ECS is not set
# CONFIG_VENDOR_ELMEX is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_ESD is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GIZMOSPHERE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IEI is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_IWAVE is not set
# CONFIG_VENDOR_IWILL is not set
# CONFIG_VENDOR_JETWAY is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LANNER is not set
CONFIG_VENDOR_LENOVO=y CONFIG_VENDOR_LENOVO=y
# CONFIG_VENDOR_LINUTOP is not set
# CONFIG_VENDOR_LIPPERT is not set
# CONFIG_VENDOR_LOWRISC is not set
# CONFIG_VENDOR_MITAC is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NEC is not set
# CONFIG_VENDOR_NOKIA is not set
# CONFIG_VENDOR_NVIDIA is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RCA is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SOYO is not set
# CONFIG_VENDOR_SUNW is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_TECHNEXION is not set
# CONFIG_VENDOR_THOMSON is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_TRAVERSE is not set
# CONFIG_VENDOR_TYAN is not set
# CONFIG_VENDOR_VIA is not set
# CONFIG_VENDOR_WINENT is not set
# CONFIG_VENDOR_WINNET is not set
# CONFIG_VENDOR_WYSE is not set
CONFIG_BOARD_SPECIFIC_OPTIONS=y
CONFIG_MAINBOARD_DIR="lenovo/x230"
CONFIG_MAINBOARD_PART_NUMBER="ThinkPad X230"
CONFIG_MAINBOARD_VENDOR="LENOVO"
CONFIG_MAX_CPUS=8
CONFIG_CACHE_ROM_SIZE_OVERRIDE=0x0
CONFIG_CBFS_SIZE=0x700000 CONFIG_CBFS_SIZE=0x700000
CONFIG_VGA_BIOS_ID="8086,0166"
# CONFIG_ONBOARD_VGA_IS_PRIMARY is not set
CONFIG_DIMM_SPD_SIZE=256
# CONFIG_VGA_BIOS is not set
CONFIG_DCACHE_RAM_BASE=0xfefe0000
CONFIG_DCACHE_RAM_SIZE=0x20000
CONFIG_VGA_BIOS_FILE="pci8086,0166.rom"
CONFIG_MAINBOARD_PCI_SUBSYSTEM_VENDOR_ID=0x17aa
CONFIG_MAINBOARD_PCI_SUBSYSTEM_DEVICE_ID=0x21fa
# CONFIG_HAVE_IFD_BIN is not set
# CONFIG_HAVE_ME_BIN is not set
CONFIG_DRAM_RESET_GATE_GPIO=10
CONFIG_MMCONF_BASE_ADDRESS=0xf8000000
# CONFIG_POST_IO is not set # CONFIG_POST_IO is not set
CONFIG_DEVICETREE="devicetree.cb"
CONFIG_MAX_REBOOT_CNT=3
CONFIG_USBDEBUG_HCD_INDEX=2
CONFIG_ID_SECTION_OFFSET=0x80
# CONFIG_POST_DEVICE is not set # CONFIG_POST_DEVICE is not set
CONFIG_IFD_BIOS_SECTION=""
CONFIG_IFD_ME_SECTION=""
# CONFIG_VBOOT is not set
CONFIG_TPM_PIRQ=0x0
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
CONFIG_FMDFILE=""
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0xc00
CONFIG_DRIVERS_UART_8250IO=y CONFIG_DRIVERS_UART_8250IO=y
CONFIG_IFD_GBE_SECTION=""
# CONFIG_BOARD_LENOVO_G505S is not set
# CONFIG_BOARD_LENOVO_L520 is not set
# CONFIG_BOARD_LENOVO_R400 is not set
# CONFIG_BOARD_LENOVO_S230U is not set
# CONFIG_BOARD_LENOVO_T400 is not set
# CONFIG_BOARD_LENOVO_T420 is not set
# CONFIG_BOARD_LENOVO_T420S is not set
# CONFIG_BOARD_LENOVO_THINKPAD_T430 is not set
# CONFIG_BOARD_LENOVO_T430S is not set
# CONFIG_BOARD_LENOVO_T500 is not set
# CONFIG_BOARD_LENOVO_T520 is not set
# CONFIG_BOARD_LENOVO_T530 is not set
# CONFIG_BOARD_LENOVO_T60 is not set
# CONFIG_BOARD_LENOVO_X131E is not set
# CONFIG_BOARD_LENOVO_X1_CARBON_GEN1 is not set
# CONFIG_BOARD_LENOVO_X200 is not set
# CONFIG_BOARD_LENOVO_X201 is not set
# CONFIG_BOARD_LENOVO_X220 is not set
# CONFIG_BOARD_LENOVO_X220I is not set
CONFIG_BOARD_LENOVO_X230=y CONFIG_BOARD_LENOVO_X230=y
# CONFIG_BOARD_LENOVO_X60 is not set
# CONFIG_BOARD_LENOVO_Z61T is not set
CONFIG_CPU_ADDR_BITS=36
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=5
# CONFIG_USBDEBUG is not set
CONFIG_DRIVERS_PS2_KEYBOARD=y CONFIG_DRIVERS_PS2_KEYBOARD=y
# CONFIG_PCIEXP_L1_SUB_STATE is not set
# CONFIG_NO_POST is not set
CONFIG_BOARD_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_64 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_128 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
CONFIG_COREBOOT_ROMSIZE_KB_12288=y
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_32768 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=12288
CONFIG_ROM_SIZE=0xc00000
# CONFIG_MAINBOARD_HAS_TPM2 is not set
CONFIG_SYSTEM_TYPE_LAPTOP=y
# CONFIG_CBFS_AUTOGEN_ATTRIBUTES is not set
#
# Chipset
#
#
# SoC
#
CONFIG_CPU_SPECIFIC_OPTIONS=y
CONFIG_RAMTOP=0x200000
CONFIG_HEAP_SIZE=0x4000
CONFIG_RAMBASE=0x100000
CONFIG_EHCI_BAR=0xfef00000
CONFIG_SERIRQ_CONTINUOUS_MODE=y
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_ACPI_CPU_STRING="\\_PR.CP%02d"
# CONFIG_SOC_BROADCOM_CYGNUS is not set
CONFIG_BOOTBLOCK_CPU_INIT="cpu/intel/model_206ax/bootblock.c"
# CONFIG_SOC_INTEL_GLK is not set
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x10000
CONFIG_X86_TOP4G_BOOTMEDIA_MAP=y
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_SPI_FLASH_INCLUDE_ALL_DRIVERS=y
CONFIG_DCACHE_RAM_MRC_VAR_SIZE=0x0
CONFIG_BUILD_WITH_FAKE_IFD=y
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_COMMON_CLOCK=y
# CONFIG_PCIEXP_CLK_PM is not set
CONFIG_BOOTBLOCK_NORTHBRIDGE_INIT="northbridge/intel/sandybridge/bootblock.c"
CONFIG_BOOTBLOCK_SOUTHBRIDGE_INIT="southbridge/intel/bd82x6x/bootblock.c"
CONFIG_CACHE_MRC_SIZE_KB=512
CONFIG_STACK_SIZE=0x1000
CONFIG_CONSOLE_CBMEM=y
CONFIG_UART_PCI_ADDR=0 CONFIG_UART_PCI_ADDR=0
CONFIG_HPET_MIN_TICKS=0x80 CONFIG_NO_GFX_INIT=y
# CONFIG_SOC_INTEL_KABYLAKE is not set
# CONFIG_SOC_LOWRISC_LOWRISC is not set
# CONFIG_SOC_MARVELL_MVMAP2315 is not set
# CONFIG_SOC_MEDIATEK_MT8173 is not set
# CONFIG_SOC_NVIDIA_TEGRA124 is not set
# CONFIG_SOC_NVIDIA_TEGRA210 is not set
# CONFIG_SOC_QC_IPQ40XX is not set
# CONFIG_SOC_QC_IPQ806X is not set
# CONFIG_SOC_ROCKCHIP_RK3288 is not set
# CONFIG_SOC_ROCKCHIP_RK3399 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5250 is not set
# CONFIG_CPU_SAMSUNG_EXYNOS5420 is not set
# CONFIG_SOC_UCB_RISCV is not set
#
# CPU
#
# CONFIG_CPU_ALLWINNER_A10 is not set
CONFIG_SOCKET_SPECIFIC_OPTIONS=y
CONFIG_XIP_ROM_SIZE=0x20000
CONFIG_NUM_IPI_STARTS=2
# CONFIG_CPU_AMD_AGESA is not set
# CONFIG_CPU_AMD_PI is not set
# CONFIG_CPU_ARMLTD_CORTEX_A9 is not set
CONFIG_CPU_INTEL_MODEL_306AX=y
CONFIG_SSE2=y
CONFIG_CPU_INTEL_SOCKET_RPGA989=y
# CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE is not set
# CONFIG_CPU_INTEL_TURBO_NOT_PACKAGE_SCOPED is not set
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_VMX_LOCK_BIT=y
# CONFIG_CPU_TI_AM335X is not set
# CONFIG_PARALLEL_CPU_INIT is not set
# CONFIG_PARALLEL_MP is not set
# CONFIG_UDELAY_IO is not set
# CONFIG_UDELAY_LAPIC is not set
CONFIG_UDELAY_TSC=y
CONFIG_TSC_CONSTANT_RATE=y
CONFIG_TSC_MONOTONIC_TIMER=y
# CONFIG_UDELAY_TIMER2 is not set
# CONFIG_TSC_SYNC_LFENCE is not set
CONFIG_TSC_SYNC_MFENCE=y
# CONFIG_NO_FIXED_XIP_ROM_SIZE is not set
CONFIG_LOGICAL_CPUS=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_MODULE_HEAP_SIZE=0x4000
# CONFIG_SMM_LAPIC_REMAP_MITIGATION is not set
# CONFIG_SERIALIZED_SMM_INITIALIZATION is not set
# CONFIG_X86_AMD_FIXED_MTRRS is not set
# CONFIG_PLATFORM_USES_FSP1_0 is not set
# CONFIG_MIRROR_PAYLOAD_TO_RAM_BEFORE_LOADING is not set
# CONFIG_SOC_SETS_MSRS is not set
CONFIG_CACHE_AS_RAM=y
# CONFIG_NO_CAR_GLOBAL_MIGRATION is not set
CONFIG_SMP=y
CONFIG_AP_SIPI_VECTOR=0xfffff000
CONFIG_MMX=y
CONFIG_SSE=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
# CONFIG_USES_MICROCODE_HEADER_FILES is not set
CONFIG_CPU_MICROCODE_CBFS_GENERATE=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
# CONFIG_CPU_MICROCODE_MULTIPLE_FILES is not set
CONFIG_CPU_UCODE_BINARIES=""
#
# Northbridge
#
# CONFIG_NORTHBRIDGE_AMD_AGESA is not set
# CONFIG_NO_MMCONF_SUPPORT is not set
# CONFIG_AMD_NB_CIMX is not set
# CONFIG_NORTHBRIDGE_AMD_CIMX_RD890 is not set
# CONFIG_NORTHBRIDGE_AMD_PI is not set
CONFIG_NORTHBRIDGE_INTEL_COMMON_MRC_CACHE=y
CONFIG_MRC_CACHE_SIZE=0x10000
CONFIG_NORTHBRIDGE_INTEL_IVYBRIDGE=y
CONFIG_USE_NATIVE_RAMINIT=y
# CONFIG_NATIVE_RAMINIT_IGNORE_MAX_MEM_FUSES is not set
# CONFIG_NATIVE_RAMINIT_IGNORE_XMP_MAX_DIMMS is not set
CONFIG_SANDYBRIDGE_IVYBRIDGE_LVDS=y
CONFIG_IF_NATIVE_VGA_INIT=y
CONFIG_HPET_ADDRESS=0xfed00000
CONFIG_MAX_PIRQ_LINKS=4
#
# Southbridge
#
# CONFIG_AMD_SB_CIMX is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB800 is not set
# CONFIG_SOUTHBRIDGE_AMD_CIMX_SB900 is not set
CONFIG_SOUTHBRIDGE_INTEL_C216=y
CONFIG_SOUTH_BRIDGE_OPTIONS=y
CONFIG_LOCK_SPI_FLASH_NONE=y
# CONFIG_LOCK_SPI_FLASH_RO is not set
# CONFIG_LOCK_SPI_FLASH_NO_ACCESS is not set
CONFIG_SOUTHBRIDGE_INTEL_COMMON=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_GPIO=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SPI=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_INTEL_CHIPSET_LOCKDOWN=y
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
#
# Super I/O
#
# CONFIG_SUPERIO_NUVOTON_NCT6776_COM_A is not set
#
# Embedded Controllers
#
CONFIG_EC_ACPI=y
CONFIG_EC_LENOVO_H8=y
CONFIG_H8_BEEP_ON_DEATH=y
CONFIG_H8_FLASH_LEDS_ON_DEATH=y
# CONFIG_H8_SUPPORT_BT_ON_WIFI is not set
CONFIG_EC_LENOVO_PMH7=y
CONFIG_HAVE_INTEL_FIRMWARE=y
#
# Intel Firmware
#
CONFIG_IFD_PLATFORM_SECTION=""
# CONFIG_MAINBOARD_HAS_CHROMEOS is not set
# CONFIG_GOOGLE_SMBIOS_MAINBOARD_VERSION is not set
# CONFIG_UEFI_2_4_BINDING is not set
# CONFIG_UDK_2015_BINDING is not set
# CONFIG_USE_SIEMENS_HWILIB is not set
# CONFIG_ARCH_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARM is not set
# CONFIG_ARCH_VERSTAGE_ARM is not set
# CONFIG_ARCH_ROMSTAGE_ARM is not set
# CONFIG_ARCH_RAMSTAGE_ARM is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV4 is not set
# CONFIG_ARCH_VERSTAGE_ARMV4 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV4 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV4 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7 is not set
# CONFIG_ARCH_VERSTAGE_ARMV7 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_M is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_M is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV7_R is not set
# CONFIG_ARCH_VERSTAGE_ARMV7_R is not set
# CONFIG_ARCH_ROMSTAGE_ARMV7_R is not set
# CONFIG_ARCH_RAMSTAGE_ARMV7_R is not set
# CONFIG_ARM_LPAE is not set
# CONFIG_ARCH_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARM64 is not set
# CONFIG_ARCH_VERSTAGE_ARM64 is not set
# CONFIG_ARCH_ROMSTAGE_ARM64 is not set
# CONFIG_ARCH_RAMSTAGE_ARM64 is not set
# CONFIG_ARCH_BOOTBLOCK_ARMV8_64 is not set
# CONFIG_ARCH_VERSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_ROMSTAGE_ARMV8_64 is not set
# CONFIG_ARCH_RAMSTAGE_ARMV8_64 is not set
# CONFIG_ARM64_A53_ERRATUM_843419 is not set
# CONFIG_ARCH_MIPS is not set
# CONFIG_ARCH_BOOTBLOCK_MIPS is not set
# CONFIG_ARCH_VERSTAGE_MIPS is not set
# CONFIG_ARCH_ROMSTAGE_MIPS is not set
# CONFIG_ARCH_RAMSTAGE_MIPS is not set
# CONFIG_ARCH_POWER8 is not set
# CONFIG_ARCH_BOOTBLOCK_POWER8 is not set
# CONFIG_ARCH_VERSTAGE_POWER8 is not set
# CONFIG_ARCH_ROMSTAGE_POWER8 is not set
# CONFIG_ARCH_RAMSTAGE_POWER8 is not set
# CONFIG_ARCH_RISCV is not set
# CONFIG_ARCH_BOOTBLOCK_RISCV is not set
# CONFIG_ARCH_VERSTAGE_RISCV is not set
# CONFIG_ARCH_ROMSTAGE_RISCV is not set
# CONFIG_ARCH_RAMSTAGE_RISCV is not set
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
# CONFIG_ARCH_BOOTBLOCK_X86_64 is not set
# CONFIG_ARCH_VERSTAGE_X86_64 is not set
# CONFIG_ARCH_ROMSTAGE_X86_64 is not set
# CONFIG_ARCH_RAMSTAGE_X86_64 is not set
# CONFIG_USE_MARCH_586 is not set
# CONFIG_AP_IN_SIPI_WAIT is not set
# CONFIG_SIPI_VECTOR_IN_ROM is not set
# CONFIG_ROMCC is not set
# CONFIG_CBMEM_TOP_BACKUP is not set
# CONFIG_LATE_CBMEM_INIT is not set
# CONFIG_EARLY_EBDA_INIT is not set
CONFIG_PC80_SYSTEM=y
# CONFIG_BOOTBLOCK_DEBUG_SPINLOOP is not set
# CONFIG_BOOTBLOCK_SAVE_BIST_AND_TIMESTAMP is not set
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_IOAPIC_INTERRUPTS_ON_FSB=y
# CONFIG_IOAPIC_INTERRUPTS_ON_APIC_SERIAL_BUS is not set
# CONFIG_POSTCAR_STAGE is not set
# CONFIG_VERSTAGE_DEBUG_SPINLOOP is not set
# CONFIG_ROMSTAGE_DEBUG_SPINLOOP is not set
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_BOOTBLOCK_SOURCE="bootblock_simple.c"
#
# Devices
#
CONFIG_HAVE_VGA_TEXT_FRAMEBUFFER=y
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_MAINBOARD_HAS_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_FORCE_NATIVE_VGA_INIT is not set
CONFIG_MAINBOARD_HAS_LIBGFXINIT=y
CONFIG_MAINBOARD_DO_NATIVE_VGA_INIT=y
# CONFIG_MAINBOARD_USE_LIBGFXINIT is not set
# CONFIG_VGA_ROM_RUN is not set
# CONFIG_NO_GFX_INIT is not set
# CONFIG_MULTIPLE_VGA_ADAPTERS is not set
#
# Display
#
CONFIG_VGA_TEXT_FRAMEBUFFER=y
# CONFIG_GENERIC_LINEAR_FRAMEBUFFER is not set
# CONFIG_SMBUS_HAS_AUX_CHANNELS is not set
CONFIG_PCI=y
CONFIG_MMCONF_SUPPORT=y
# CONFIG_HYPERTRANSPORT_PLUGIN_SUPPORT is not set
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
# CONFIG_AZALIA_PLUGIN_SUPPORT is not set
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
# CONFIG_INTEL_GMA_ADD_VBT_DATA_FILE is not set
# CONFIG_SOFTWARE_I2C is not set
#
# Generic Drivers
#
# CONFIG_DRIVERS_AS3722_RTC is not set
# CONFIG_GIC is not set
# CONFIG_IPMI_KCS is not set
# CONFIG_DRIVERS_LENOVO_WACOM is not set
# CONFIG_RT8168_GET_MAC_FROM_VPD is not set
# CONFIG_RT8168_SET_LED_MODE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
# CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY is not set
# CONFIG_SPI_FLASH_SMM is not set
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_SPI_FLASH_ADESTO=y
CONFIG_SPI_FLASH_AMIC=y
CONFIG_SPI_FLASH_ATMEL=y
CONFIG_SPI_FLASH_EON=y
CONFIG_SPI_FLASH_GIGADEVICE=y
CONFIG_SPI_FLASH_MACRONIX=y
CONFIG_SPI_FLASH_SPANSION=y
CONFIG_SPI_FLASH_SST=y
CONFIG_SPI_FLASH_STMICRO=y
CONFIG_SPI_FLASH_WINBOND=y
# CONFIG_SPI_FLASH_FAST_READ_DUAL_OUTPUT_3B is not set
# CONFIG_SPI_FLASH_HAS_VOLATILE_GROUP is not set
# CONFIG_HAVE_SPI_CONSOLE_SUPPORT is not set
# CONFIG_DRIVERS_UART is not set
# CONFIG_DRIVERS_UART_8250IO_SKIP_INIT is not set
CONFIG_NO_UART_ON_SUPERIO=y
# CONFIG_UART_OVERRIDE_INPUT_CLOCK_DIVIDER is not set
# CONFIG_UART_OVERRIDE_REFCLK is not set
# CONFIG_DRIVERS_UART_8250MEM is not set
# CONFIG_DRIVERS_UART_8250MEM_32 is not set
# CONFIG_HAVE_UART_SPECIAL is not set
# CONFIG_DRIVERS_UART_OXPCIE is not set
# CONFIG_DRIVERS_UART_PL011 is not set
# CONFIG_UART_USE_REFCLK_AS_INPUT_CLOCK is not set
CONFIG_HAVE_USBDEBUG=y
CONFIG_HAVE_USBDEBUG_OPTIONS=y
# CONFIG_DRIVERS_AMD_PI is not set
CONFIG_SMBIOS_PROVIDED_BY_MOBO=y
# CONFIG_DRIVERS_I2C_MAX98927 is not set
# CONFIG_DRIVERS_I2C_PCF8523 is not set
# CONFIG_DRIVERS_I2C_RT5663 is not set
# CONFIG_DRIVERS_I2C_RTD2132 is not set
# CONFIG_DRIVERS_I2C_RX6110SA is not set
# CONFIG_I2C_TPM is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_ATMEL is not set
# CONFIG_MAINBOARD_HAS_I2C_TPM_CR50 is not set
# CONFIG_INTEL_DDI is not set
CONFIG_INTEL_EDID=y
CONFIG_INTEL_INT15=y
CONFIG_INTEL_GMA_ACPI=y
# CONFIG_INTEL_GMA_SSC_ALTERNATE_REF is not set
CONFIG_GFX_GMA=y
CONFIG_GFX_GMA_CPU="Ivybridge"
CONFIG_GFX_GMA_CPU_VARIANT="Normal"
# CONFIG_GFX_GMA_INTERNAL_IS_EDP is not set
CONFIG_GFX_GMA_INTERNAL_IS_LVDS=y
CONFIG_GFX_GMA_INTERNAL_PORT="LVDS"
CONFIG_GFX_GMA_ANALOG_I2C_PORT="PCH_DAC"
# CONFIG_DRIVER_INTEL_I210 is not set
# CONFIG_DRIVERS_INTEL_MIPI_CAMERA is not set
CONFIG_DRIVERS_INTEL_WIFI=y
# CONFIG_USE_SAR is not set
# CONFIG_DRIVERS_LENOVO_HYBRID_GRAPHICS is not set
# CONFIG_DRIVER_MAXIM_MAX77686 is not set
# CONFIG_DRIVER_PARADE_PS8625 is not set
# CONFIG_DRIVER_PARADE_PS8640 is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_MAINBOARD_HAS_LPC_TPM=y
CONFIG_LPC_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_TPM_INIT_FAILURE_IS_FATAL is not set
# CONFIG_SKIP_TPM_STARTUP_ON_NORMAL_BOOT is not set
# CONFIG_TPM_DEACTIVATE is not set
CONFIG_VGA=y
CONFIG_DRIVERS_RICOH_RCE822=y
# CONFIG_DRIVER_SIEMENS_NC_FPGA is not set
# CONFIG_NC_FPGA_NOTIFY_CB_READY is not set
# CONFIG_DRIVERS_SIL_3114 is not set
# CONFIG_MAINBOARD_HAS_SPI_TPM_CR50 is not set
# CONFIG_DRIVER_TI_TPS65090 is not set
# CONFIG_DRIVERS_TI_TPS65913 is not set
# CONFIG_DRIVERS_TI_TPS65913_RTC is not set
# CONFIG_DRIVER_XPOWERS_AXP209 is not set
# CONFIG_COMMONLIB_STORAGE is not set
#
# Security
#
#
# Verified Boot (vboot)
#
CONFIG_ACPI_SATA_GENERATOR=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
# CONFIG_ACPI_AMD_HARDWARE_SLEEP_VALUES is not set
# CONFIG_BOOT_DEVICE_NOT_SPI_FLASH is not set
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
# CONFIG_BOOT_DEVICE_SUPPORTS_WRITES is not set
CONFIG_RTC=y
CONFIG_TPM=y
# CONFIG_MAINBOARD_HAS_TPM_CR50 is not set
#
# Console
#
CONFIG_SQUELCH_EARLY_SMP=y
# CONFIG_CONSOLE_SERIAL is not set # CONFIG_CONSOLE_SERIAL is not set
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000 CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x80000
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
# CONFIG_CMOS_POST is not set
# CONFIG_CONSOLE_POST is not set
# CONFIG_NO_EARLY_BOOTBLOCK_POSTCODES is not set
# CONFIG_HWBASE_DEBUG_CB is not set
CONFIG_HWBASE_DEBUG_NULL=y
CONFIG_HAVE_ACPI_RESUME=y
# CONFIG_ACPI_HUGE_LOWMEM_BACKUP is not set
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_HARD_RESET=y
# CONFIG_HAVE_ROMSTAGE_CONSOLE_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_NVRAM_CBFS_SPINLOCK is not set
# CONFIG_HAVE_ROMSTAGE_MICROCODE_CBFS_SPINLOCK is not set
CONFIG_HAVE_MONOTONIC_TIMER=y
# CONFIG_GENERIC_UDELAY is not set
# CONFIG_TIMER_QUEUE is not set
CONFIG_HAVE_OPTION_TABLE=y
# CONFIG_PIRQ_ROUTE is not set
CONFIG_HAVE_SMI_HANDLER=y
# CONFIG_PCI_IO_CFG_EXT is not set
CONFIG_IOAPIC=y
CONFIG_USE_WATCHDOG_ON_BOOT=y
# CONFIG_GFXUMA is not set
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_COMMON_FADT=y
# CONFIG_ACPI_NHLT is not set
#
# System tables
#
# CONFIG_GENERATE_MP_TABLE is not set
# CONFIG_GENERATE_PIRQ_TABLE is not set
CONFIG_GENERATE_SMBIOS_TABLES=y
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BAYOU is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
CONFIG_PAYLOAD_LINUX=y CONFIG_PAYLOAD_LINUX=y
# CONFIG_PAYLOAD_TIANOCORE is not set
CONFIG_PAYLOAD_FILE="../../build/x230/bzImage" CONFIG_PAYLOAD_FILE="../../build/x230/bzImage"
CONFIG_PAYLOAD_OPTIONS="" CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set # CONFIG_PXE is not set
CONFIG_LINUX_COMMAND_LINE="quiet" CONFIG_LINUX_COMMAND_LINE="intel_iommu=igfx_off quiet"
CONFIG_LINUX_INITRD="../../build/x230/initrd.cpio.xz" CONFIG_LINUX_INITRD="../../build/x230/initrd.cpio.xz"
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
#
# Debugging
#
# CONFIG_FATAL_ASSERTS is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
# CONFIG_HAVE_DEBUG_CAR is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_DEBUG_SMM_RELOCATION=y CONFIG_DEBUG_SMM_RELOCATION=y
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_ACPI is not set
# CONFIG_DEBUG_TPM is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_TRACE is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
# CONFIG_ENABLE_APIC_EXT_ID is not set
CONFIG_WARNINGS_ARE_ERRORS=y
# CONFIG_POWER_BUTTON_DEFAULT_ENABLE is not set
# CONFIG_POWER_BUTTON_DEFAULT_DISABLE is not set
# CONFIG_POWER_BUTTON_FORCE_ENABLE is not set
# CONFIG_POWER_BUTTON_FORCE_DISABLE is not set
# CONFIG_POWER_BUTTON_IS_OPTIONAL is not set
# CONFIG_REG_SCRIPT is not set
# CONFIG_CREATE_BOARD_CHECKLIST is not set
# CONFIG_MAKE_CHECKLIST_PUBLIC is not set
# CONFIG_NO_XIP_EARLY_STAGES is not set
CONFIG_EARLY_CBMEM_INIT=y
# CONFIG_EARLY_CBMEM_LIST is not set
CONFIG_RELOCATABLE_MODULES=y
CONFIG_BOOTBLOCK_CUSTOM=y

View File

@ -64,6 +64,7 @@ CONFIG_PCI_PRI=y
# CONFIG_COREDUMP is not set # CONFIG_COREDUMP is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y CONFIG_INET=y
CONFIG_SYN_COOKIES=y CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
@ -203,7 +204,9 @@ CONFIG_GENERIC_PHY=y
# CONFIG_BTT is not set # CONFIG_BTT is not set
# CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_FIRMWARE_MEMMAP is not set
# CONFIG_DMIID is not set # CONFIG_DMIID is not set
# CONFIG_EXT2_FS is not set
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
# CONFIG_DNOTIFY is not set # CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set # CONFIG_INOTIFY_USER is not set
CONFIG_ISO9660_FS=y CONFIG_ISO9660_FS=y

View File

@ -63,6 +63,7 @@ CONFIG_PCI_PRI=y
# CONFIG_COREDUMP is not set # CONFIG_COREDUMP is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y CONFIG_INET=y
CONFIG_SYN_COOKIES=y CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
@ -202,7 +203,9 @@ CONFIG_GENERIC_PHY=y
# CONFIG_BTT is not set # CONFIG_BTT is not set
# CONFIG_FIRMWARE_MEMMAP is not set # CONFIG_FIRMWARE_MEMMAP is not set
# CONFIG_DMIID is not set # CONFIG_DMIID is not set
# CONFIG_EXT2_FS is not set
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
# CONFIG_DNOTIFY is not set # CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set # CONFIG_INOTIFY_USER is not set
CONFIG_ISO9660_FS=y CONFIG_ISO9660_FS=y

View File

@ -84,6 +84,7 @@ CONFIG_PCI_PRI=y
CONFIG_IA32_EMULATION=y CONFIG_IA32_EMULATION=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y CONFIG_INET=y
CONFIG_SYN_COOKIES=y CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
@ -252,7 +253,9 @@ CONFIG_GENERIC_PHY=y
# CONFIG_ND_BLK is not set # CONFIG_ND_BLK is not set
# CONFIG_BTT is not set # CONFIG_BTT is not set
CONFIG_DMI_SYSFS=y CONFIG_DMI_SYSFS=y
# CONFIG_EXT2_FS is not set
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
CONFIG_XFS_FS=y CONFIG_XFS_FS=y
# CONFIG_DNOTIFY is not set # CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set # CONFIG_INOTIFY_USER is not set

View File

@ -6,6 +6,18 @@ CONFIG_KERNEL_XZ=y
# CONFIG_USELIB is not set # CONFIG_USELIB is not set
CONFIG_NO_HZ_IDLE=y CONFIG_NO_HZ_IDLE=y
CONFIG_LOG_BUF_SHIFT=18 CONFIG_LOG_BUF_SHIFT=18
CONFIG_CGROUPS=y
CONFIG_MEMCG=y
CONFIG_BLK_CGROUP=y
CONFIG_CGROUP_SCHED=y
CONFIG_CGROUP_PIDS=y
CONFIG_CGROUP_RDMA=y
CONFIG_CGROUP_FREEZER=y
CONFIG_CPUSETS=y
CONFIG_CGROUP_DEVICE=y
CONFIG_CGROUP_CPUACCT=y
CONFIG_CGROUP_PERF=y
CONFIG_CGROUP_DEBUG=y
CONFIG_BLK_DEV_INITRD=y CONFIG_BLK_DEV_INITRD=y
CONFIG_INITRAMFS_SOURCE="../../../blobs/dev.cpio" CONFIG_INITRAMFS_SOURCE="../../../blobs/dev.cpio"
# CONFIG_RD_GZIP is not set # CONFIG_RD_GZIP is not set
@ -19,7 +31,6 @@ CONFIG_CC_OPTIMIZE_FOR_SIZE=y
# CONFIG_BASE_FULL is not set # CONFIG_BASE_FULL is not set
# CONFIG_SIGNALFD is not set # CONFIG_SIGNALFD is not set
# CONFIG_TIMERFD is not set # CONFIG_TIMERFD is not set
# CONFIG_EVENTFD is not set
# CONFIG_AIO is not set # CONFIG_AIO is not set
# CONFIG_MEMBARRIER is not set # CONFIG_MEMBARRIER is not set
CONFIG_EMBEDDED=y CONFIG_EMBEDDED=y
@ -69,6 +80,7 @@ CONFIG_PCI_PRI=y
CONFIG_IA32_EMULATION=y CONFIG_IA32_EMULATION=y
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y CONFIG_INET=y
CONFIG_SYN_COOKIES=y CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
@ -199,14 +211,12 @@ CONFIG_TCG_ATMEL=y
CONFIG_TCG_INFINEON=y CONFIG_TCG_INFINEON=y
CONFIG_TCG_CRB=y CONFIG_TCG_CRB=y
CONFIG_TCG_TIS_ST33ZP24_I2C=y CONFIG_TCG_TIS_ST33ZP24_I2C=y
CONFIG_I2C=y
# CONFIG_I2C_COMPAT is not set # CONFIG_I2C_COMPAT is not set
CONFIG_I2C_CHARDEV=y CONFIG_I2C_CHARDEV=y
CONFIG_I2C_MUX=m CONFIG_I2C_MUX=m
CONFIG_I2C_MUX_PCA9541=m CONFIG_I2C_MUX_PCA9541=m
CONFIG_I2C_MUX_REG=m CONFIG_I2C_MUX_REG=m
# CONFIG_I2C_HELPER_AUTO is not set # CONFIG_I2C_HELPER_AUTO is not set
CONFIG_I2C_ALGOBIT=y
CONFIG_I2C_I801=y CONFIG_I2C_I801=y
CONFIG_I2C_SCMI=y CONFIG_I2C_SCMI=y
CONFIG_I2C_SLAVE=y CONFIG_I2C_SLAVE=y
@ -217,6 +227,9 @@ CONFIG_INT340X_THERMAL=y
CONFIG_INTEL_PCH_THERMAL=y CONFIG_INTEL_PCH_THERMAL=y
CONFIG_MFD_SYSCON=y CONFIG_MFD_SYSCON=y
# CONFIG_VGA_ARB is not set # CONFIG_VGA_ARB is not set
CONFIG_DRM=y
CONFIG_DRM_BOCHS=y
CONFIG_FRAMEBUFFER_CONSOLE=y
CONFIG_USB=y CONFIG_USB=y
CONFIG_USB_XHCI_HCD=m CONFIG_USB_XHCI_HCD=m
CONFIG_USB_XHCI_PLATFORM=m CONFIG_USB_XHCI_PLATFORM=m
@ -235,7 +248,9 @@ CONFIG_GENERIC_PHY=y
CONFIG_DMI_SYSFS=y CONFIG_DMI_SYSFS=y
CONFIG_GOOGLE_FIRMWARE=y CONFIG_GOOGLE_FIRMWARE=y
CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY=y CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY=y
# CONFIG_EXT2_FS is not set
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
CONFIG_XFS_FS=y CONFIG_XFS_FS=y
# CONFIG_DNOTIFY is not set # CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set # CONFIG_INOTIFY_USER is not set

View File

@ -64,6 +64,7 @@ CONFIG_PCI_PRI=y
# CONFIG_COREDUMP is not set # CONFIG_COREDUMP is not set
CONFIG_NET=y CONFIG_NET=y
CONFIG_PACKET=y CONFIG_PACKET=y
CONFIG_UNIX=y
CONFIG_INET=y CONFIG_INET=y
CONFIG_SYN_COOKIES=y CONFIG_SYN_COOKIES=y
# CONFIG_INET_XFRM_MODE_TRANSPORT is not set # CONFIG_INET_XFRM_MODE_TRANSPORT is not set
@ -181,6 +182,7 @@ CONFIG_PTP_1588_CLOCK=y
# CONFIG_X86_PKG_TEMP_THERMAL is not set # CONFIG_X86_PKG_TEMP_THERMAL is not set
CONFIG_MFD_SYSCON=y CONFIG_MFD_SYSCON=y
CONFIG_DRM=y CONFIG_DRM=y
CONFIG_DRM_I915=y
CONFIG_FB_VESA=y CONFIG_FB_VESA=y
CONFIG_BACKLIGHT_LCD_SUPPORT=y CONFIG_BACKLIGHT_LCD_SUPPORT=y
# CONFIG_LCD_CLASS_DEVICE is not set # CONFIG_LCD_CLASS_DEVICE is not set
@ -205,7 +207,9 @@ CONFIG_GENERIC_PHY=y
# CONFIG_DMIID is not set # CONFIG_DMIID is not set
CONFIG_GOOGLE_FIRMWARE=y CONFIG_GOOGLE_FIRMWARE=y
CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY=y CONFIG_GOOGLE_MEMCONSOLE_X86_LEGACY=y
# CONFIG_EXT2_FS is not set
CONFIG_EXT4_FS=y CONFIG_EXT4_FS=y
CONFIG_EXT4_USE_FOR_EXT2=y
# CONFIG_DNOTIFY is not set # CONFIG_DNOTIFY is not set
# CONFIG_INOTIFY_USER is not set # CONFIG_INOTIFY_USER is not set
CONFIG_ISO9660_FS=y CONFIG_ISO9660_FS=y

View File

@ -1,15 +1,17 @@
mount /dev/sda1 /boot #remove invalid kexec_* signed files
mount -o remount,rw /boot mount /dev/sda1 /boot && mount -o remount,rw /boot && rm /boot/kexec* && mount -o remount,ro /boot
rm /boot/kexec_* #Generate keys from GPG smartcard:
usb-scan mount-usb && gpg --home=/.gnupg/ --card-edit
mount -o rw $CONFIG_USB_BOOT_DEV /media #Copy generated public key, private_subkey, trustdb and artifacts to external media for backup:
mkdir /media/gpg_keys mount -o remount,rw /media && mkdir -p /media/gpg_keys; gpg --export-secret-keys --armor email@address.com > /media/gpg_keys/private.key && gpg --export --armor email@address.com > /media/gpg_keys/public.key && gpg --export-ownertrust > /media/gpg_keys/otrust.txt && cp -r ./.gnupg/* /media/gpg_keys/ 2> /dev/null
gpg --home=/media/gpg_keys --edit-card #Insert public key and trustdb export into reproducible rom:
gpg --home=/media/gpg_keys --export --armor e@mail.address > /media/gpg_keys/public.key cbfs -o /media/coreboot.rom -a "heads/initrd/.gnupg/keys/public.key" -f /media/gpg_keys/public.key && cbfs -o /media/coreboot.rom -a "heads/initrd/.gnupg/keys/otrust.txt" -f /media/gpg_keys/otrust.txt
gpg --home=/media/gpg_keys --export-secret-keys --armor e@mail.address > /media/gpg_keys/private.key #Flush changes to external media:
cbfs -o /media/coreboot.rom -a "heads/initrd/.gnupg/keys/public.key" -f /media/gpg_keys/public.key mount -o,remount ro /media
cbfs -o /media/coreboot.rom -a "heads/initrd/.gnupg/keys/private.key" -f /media/gpg_keys/private.key #Flash modified reproducible rom with inserted public key and trustdb export from precedent step. Flushes actual rom's keys (-c: clean):
mount -o remount,ro /media flash.sh -c /media/coreboot.rom
flash.sh /media/coreboot.com #Attest integrity of firmware as it is
seal-totp
#Verify Intel ME state:
cbmem --console | grep '^ME' cbmem --console | grep '^ME'
cbmem --console | less cbmem --console | less

View File

@ -0,0 +1,3 @@
scdaemon-program /bin/scdaemon
pinentry-program /bin/pinentry-tty
daemon

1
initrd/.gnupg/gpg.conf Normal file
View File

@ -0,0 +1 @@
use-agent

138
initrd/bin/config-gui.sh Executable file
View File

@ -0,0 +1,138 @@
#!/bin/sh
#
set -e -o pipefail
. /etc/functions
. /tmp/config
file_selector() {
FILE=""
FILE_LIST=$1
MENU_MSG=${2:-"Choose the file"}
# create file menu options
if [ `cat "$FILE_LIST" | wc -l` -gt 0 ]; then
option=""
while [ -z "$option" ]
do
MENU_OPTIONS=""
n=0
while read option
do
n=`expr $n + 1`
option=$(echo $option | tr " " "_")
MENU_OPTIONS="$MENU_OPTIONS $n ${option}"
done < $FILE_LIST
MENU_OPTIONS="$MENU_OPTIONS a Abort"
whiptail --clear --title "Select your File" \
--menu "${MENU_MSG} [1-$n, a to abort]:" 20 120 8 \
-- $MENU_OPTIONS \
2>/tmp/whiptail || die "Aborting"
option_index=$(cat /tmp/whiptail)
if [ "$option_index" = "a" ]; then
option="a"
return
fi
option=`head -n $option_index $FILE_LIST | tail -1`
if [ "$option" == "a" ]; then
return
fi
done
if [ -n "$option" ]; then
FILE=$option
fi
else
whiptail $CONFIG_ERROR_BG_COLOR --title 'ERROR: No Files Found' \
--msgbox "No Files found matching the pattern. Aborting." 16 60
exit 1
fi
}
while true; do
unset menu_choice
whiptail --clear --title "Config Management Menu" \
--menu "This menu lets you change settings for the current BIOS session.\n\nAll changes will revert after a reboot,\n\nunless you also save them to the running BIOS." 20 90 10 \
'b' ' Change the /boot device' \
'u' ' Change the USB boot device' \
's' ' Save the current configuration to the running BIOS' \
'x' ' Exit' \
2>/tmp/whiptail || recovery "GUI menu failed"
menu_choice=$(cat /tmp/whiptail)
case "$menu_choice" in
"x" )
exit 0
;;
"b" )
CURRENT_OPTION=`grep 'CONFIG_BOOT_DEV=' /tmp/config | tail -n1 | cut -f2 -d '=' | tr -d '"'`
find /dev -name 'sd*' -o -name 'nvme*' > /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose the default /boot device.\n\nCurrently set to $CURRENT_OPTION."
if [ "$FILE" == "" ]; then
return
else
SELECTED_FILE=$FILE
fi
replace_config /etc/config.user "CONFIG_BOOT_DEV" "$SELECTED_FILE"
combine_configs
whiptail --title 'Config change successful' \
--msgbox "The /boot device was successfully changed to $SELECTED_FILE" 16 60
;;
"u" )
whiptail --title 'Insert a USB thumb drive' \
--msgbox "Insert a USB thumb drive so we can detect the device" 16 60
enable_usb
if ! lsmod | grep -q usb_storage; then
insmod /lib/modules/usb-storage.ko \
|| die "usb_storage: module load failed"
sleep 5
fi
CURRENT_OPTION=`grep 'CONFIG_USB_BOOT_DEV=' /tmp/config | tail -n1 | cut -f2 -d '=' | tr -d '"'`
find /dev -name 'sd*' -o -name 'nvme*' > /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose the default USB boot device.\n\nCurrently set to $CURRENT_OPTION."
if [ "$FILE" == "" ]; then
return
else
SELECTED_FILE=$FILE
fi
replace_config /etc/config.user "CONFIG_USB_BOOT_DEV" "$SELECTED_FILE"
combine_configs
whiptail --title 'Config change successful' \
--msgbox "The USB boot device was successfully changed to $SELECTED_FILE" 16 60
;;
"s" )
/bin/flash.sh -r /tmp/config-gui.rom
if [ ! -s /tmp/config-gui.rom ]; then
whiptail $CONFIG_ERROR_BG_COLOR --title 'ERROR: BIOS Read Failed!' \
--msgbox "Unable to read BIOS" 16 60
exit 1
fi
if (cbfs -o /tmp/config-gui.rom -l | grep -q "heads/initrd/etc/config.user") then
cbfs -o /tmp/config-gui.rom -d "heads/initrd/etc/config.user"
fi
cbfs -o /tmp/config-gui.rom -a "heads/initrd/etc/config.user" -f /etc/config.user
if (whiptail --title 'Update ROM?' \
--yesno "This will reflash your BIOS with the updated version\n\nDo you want to proceed?" 16 90) then
/bin/flash.sh /tmp/config-gui.rom
whiptail --title 'BIOS Updated Successfully' \
--msgbox "BIOS updated successfully.\n\nIf your keys have changed, be sure to re-sign all files in /boot\nafter you reboot.\n\nPress Enter to reboot" 16 60
/bin/reboot
else
exit 0
fi
;;
esac
done
exit 0

View File

@ -2,7 +2,7 @@
# #
set -e -o pipefail set -e -o pipefail
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
mount_usb(){ mount_usb(){
# Mount the USB boot device # Mount the USB boot device
@ -70,12 +70,10 @@ file_selector() {
while true; do while true; do
unset menu_choice unset menu_choice
whiptail --clear --title "BIOS Management Menu" \ whiptail --clear --title "Firmware Management Menu" \
--menu 'Select the BIOS function to perform' 20 90 10 \ --menu "Select the firmware function to perform\n\nRetaining settings copies existing settings to the new firmware:\n* Keeps your GPG keyring\n* Keeps changes to the default /boot device\n\nErasing settings uses the new firmware as-is:\n* Erases any existing GPG keyring\n* Restores firmware to default factory settings\n\nIf you are just updating your firmware, you probably want to retain\nyour settings." 20 90 10 \
'f' ' Flash the BIOS with a new ROM' \ 'f' ' Flash the firmware with a new ROM, retain settings' \
'c' ' Flash the BIOS with a new cleaned ROM' \ 'c' ' Flash the firmware with a new ROM, erase settings' \
'a' ' Add GPG key to BIOS image' \
'r' ' Add GPG key to running BIOS' \
'x' ' Exit' \ 'x' ' Exit' \
2>/tmp/whiptail || recovery "GUI menu failed" 2>/tmp/whiptail || recovery "GUI menu failed"
@ -101,12 +99,12 @@ while true; do
if (whiptail --title 'Flash ROM?' \ if (whiptail --title 'Flash ROM?' \
--yesno "This will replace your old ROM with $ROM\n\nDo you want to proceed?" 16 90) then --yesno "This will replace your old ROM with $ROM\n\nDo you want to proceed?" 16 90) then
if [ "$menu_choice" == "c" ]; then if [ "$menu_choice" == "c" ]; then
/bin/flash.sh -c $ROM /bin/flash.sh -c "$ROM"
else else
/bin/flash.sh $ROM /bin/flash.sh "$ROM"
fi fi
whiptail --title 'ROM Flashed Successfully' \ whiptail --title 'ROM Flashed Successfully' \
--msgbox "$ROM flashed successfully. Press Enter to reboot" 16 60 --msgbox "$ROM flashed successfully.\nPress Enter to reboot" 16 60
umount /media umount /media
/bin/reboot /bin/reboot
else else
@ -115,104 +113,6 @@ while true; do
fi fi
fi fi
;; ;;
"a" )
if (whiptail --title 'ROM and GPG public key required' \
--yesno "This requires you insert a USB drive containing:\n* Your GPG public key (*.key or *.asc)\n* Your BIOS image (*.rom)\n\nAfter you select these files, this program will reflash your BIOS\n\nDo you want to proceed?" 16 90) then
mount_usb
if grep -q /media /proc/mounts ; then
find /media -name '*.key' > /tmp/filelist.txt
find /media -name '*.asc' >> /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose your GPG public key"
if [ "$FILE" == "" ]; then
return
else
PUBKEY=$FILE
fi
find /media -name '*.rom' > /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose the ROM to load your key onto"
if [ "$FILE" == "" ]; then
return
else
ROM=$FILE
fi
cat $PUBKEY | gpg --import
cp $ROM /tmp/gpg-gui.rom
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/pubring.gpg") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/pubring.gpg"
fi
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/pubring.gpg" -f /.gnupg/pubring.gpg
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/trustdb.gpg") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/trustdb.gpg"
fi
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/trustdb.gpg" -f /.gnupg/trustdb.gpg
if (whiptail --title 'Flash ROM?' \
--yesno "This will replace your old ROM with $ROM\n\nDo you want to proceed?" 16 90) then
/bin/flash.sh /tmp/gpg-gui.rom
whiptail --title 'ROM Flashed Successfully' \
--msgbox "$ROM flashed successfully.\n\nIf your keys have changed, be sure to re-sign all files in /boot\nafter you reboot.\n\nPress Enter to reboot" 16 60
umount /media
/bin/reboot
else
exit 0
fi
fi
fi
;;
"r" )
if (whiptail --title 'GPG public key required' \
--yesno "Flashing the running BIOS requires you insert a USB drive containing:\n* Your GPG public key (*.key or *.asc)\n\nAfter you select this file, this program will copy and reflash your BIOS\n\nDo you want to proceed?" 16 90) then
mount_usb
if grep -q /media /proc/mounts ; then
find /media -name '*.key' > /tmp/filelist.txt
find /media -name '*.asc' >> /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose your GPG public key"
PUBKEY=$FILE
/bin/flash.sh -r /tmp/gpg-gui.rom
if [ ! -s /tmp/gpg-gui.rom ]; then
whiptail $CONFIG_ERROR_BG_COLOR --title 'ERROR: BIOS Read Failed!' \
--msgbox "Unable to read BIOS" 16 60
exit 1
fi
cat $PUBKEY | gpg --import
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/pubring.gpg") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/pubring.gpg"
fi
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/pubring.gpg" -f /.gnupg/pubring.gpg
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/trustdb.gpg") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/trustdb.gpg"
fi
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/trustdb.gpg" -f /.gnupg/trustdb.gpg
if (whiptail --title 'Update ROM?' \
--yesno "This will reflash your BIOS with the updated version\n\nDo you want to proceed?" 16 90) then
/bin/flash.sh /tmp/gpg-gui.rom
whiptail --title 'BIOS Updated Successfully' \
--msgbox "BIOS updated successfully.\n\nIf your keys have changed, be sure to re-sign all files in /boot\nafter you reboot.\n\nPress Enter to reboot" 16 60
umount /media
/bin/reboot
else
exit 0
fi
fi
fi
;;
"g" )
confirm_gpg_card
echo "********************************************************************************"
echo "*"
echo "* INSTRUCTIONS:"
echo "* Type 'admin' and then 'generate' and follow the prompts to generate a GPG key."
echo "*"
echo "********************************************************************************"
gpg --card-edit
;;
esac esac
done done

View File

@ -4,7 +4,7 @@
# #
set -e -o pipefail set -e -o pipefail
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
case "$CONFIG_BOARD" in case "$CONFIG_BOARD" in
librem* ) librem* )

View File

@ -2,7 +2,7 @@
# Boot from a local disk installation # Boot from a local disk installation
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
mount_boot() mount_boot()
{ {

244
initrd/bin/gpg-gui.sh Executable file
View File

@ -0,0 +1,244 @@
#!/bin/sh
#
set -e -o pipefail
. /etc/functions
. /tmp/config
mount_usb(){
# Mount the USB boot device
if ! grep -q /media /proc/mounts ; then
mount-usb "$CONFIG_USB_BOOT_DEV" || USB_FAILED=1
if [ $USB_FAILED -ne 0 ]; then
if [ ! -e "$CONFIG_USB_BOOT_DEV" ]; then
whiptail --title 'USB Drive Missing' \
--msgbox "Insert your USB drive and press Enter to continue." 16 60 USB_FAILED=0
mount-usb "$CONFIG_USB_BOOT_DEV" || USB_FAILED=1
fi
if [ $USB_FAILED -ne 0 ]; then
whiptail $CONFIG_ERROR_BG_COLOR --title 'ERROR: Mounting /media Failed' \
--msgbox "Unable to mount $CONFIG_USB_BOOT_DEV" 16 60
fi
fi
fi
}
file_selector() {
FILE=""
FILE_LIST=$1
MENU_MSG=${2:-"Choose the file"}
# create file menu options
if [ `cat "$FILE_LIST" | wc -l` -gt 0 ]; then
option=""
while [ -z "$option" ]
do
MENU_OPTIONS=""
n=0
while read option
do
n=`expr $n + 1`
option=$(echo $option | tr " " "_")
MENU_OPTIONS="$MENU_OPTIONS $n ${option}"
done < $FILE_LIST
MENU_OPTIONS="$MENU_OPTIONS a Abort"
whiptail --clear --title "Select your File" \
--menu "${MENU_MSG} [1-$n, a to abort]:" 20 120 8 \
-- $MENU_OPTIONS \
2>/tmp/whiptail || die "Aborting"
option_index=$(cat /tmp/whiptail)
if [ "$option_index" = "a" ]; then
option="a"
return
fi
option=`head -n $option_index $FILE_LIST | tail -1`
if [ "$option" == "a" ]; then
return
fi
done
if [ -n "$option" ]; then
FILE=$option
fi
else
whiptail $CONFIG_ERROR_BG_COLOR --title 'ERROR: No Files Found' \
--msgbox "No Files found matching the pattern. Aborting." 16 60
exit 1
fi
}
while true; do
unset menu_choice
whiptail --clear --title "GPG Management Menu" \
--menu 'Select the GPG function to perform' 20 90 10 \
'r' ' Add GPG key to running BIOS + reflash' \
'a' ' Add GPG key to standalone BIOS image + flash' \
'l' ' List GPG keys in your keyring' \
'g' ' Generate GPG keys on a USB security token' \
'x' ' Exit' \
2>/tmp/whiptail || recovery "GUI menu failed"
menu_choice=$(cat /tmp/whiptail)
case "$menu_choice" in
"x" )
exit 0
;;
"a" )
if (whiptail --title 'ROM and GPG public key required' \
--yesno "This requires you insert a USB drive containing:\n* Your GPG public key (*.key or *.asc)\n* Your BIOS image (*.rom)\n\nAfter you select these files, this program will reflash your BIOS\n\nDo you want to proceed?" 16 90) then
mount_usb
if grep -q /media /proc/mounts ; then
find /media -name '*.key' > /tmp/filelist.txt
find /media -name '*.asc' >> /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose your GPG public key"
if [ "$FILE" == "" ]; then
return
else
PUBKEY=$FILE
fi
find /media -name '*.rom' > /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose the ROM to load your key onto"
if [ "$FILE" == "" ]; then
return
else
ROM=$FILE
fi
cat "$PUBKEY" | gpg --import
#update /.gnupg/trustdb.gpg to ultimately trust all user provided public keys
gpg --list-keys --fingerprint --with-colons |sed -E -n -e 's/^fpr:::::::::([0-9A-F]+):$/\1:6:/p' |gpg --import-ownertrust
gpg --update-trust
cp "$ROM" /tmp/gpg-gui.rom
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/pubring.kbx"); then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/pubring.kbx"
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/pubring.gpg"); then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/pubring.gpg"
if [ -e /.gnupg/pubring.gpg ];then
rm /.gnupg/pubring.gpg
fi
fi
fi
#to be compatible with gpgv1
if [ -e /.gnupg/pubring.kbx ];then
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/pubring.kbx" -f /.gnupg/pubring.kbx
if [ -e /.gnupg/pubring.gpg ];then
rm /.gnupg/pubring.gpg
fi
fi
if [ -e /.gnupg/pubring.gpg ];then
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/pubring.gpg" -f /.gnupg/pubring.gpg
fi
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/trustdb.gpg") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/trustdb.gpg"
fi
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/trustdb.gpg" -f /.gnupg/trustdb.gpg
#Remove old method owner trust exported file
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/otrust.txt") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/otrust.txt"
fi
if (whiptail --title 'Flash ROM?' \
--yesno "This will replace your old ROM with $ROM\n\nDo you want to proceed?" 16 90) then
/bin/flash.sh /tmp/gpg-gui.rom
whiptail --title 'ROM Flashed Successfully' \
--msgbox "$ROM flashed successfully.\n\nIf your keys have changed, be sure to re-sign all files in /boot\nafter you reboot.\n\nPress Enter to reboot" 16 60
umount /media
/bin/reboot
else
exit 0
fi
fi
fi
;;
"r" )
if (whiptail --title 'GPG public key required' \
--yesno "This requires you insert a USB drive containing:\n* Your GPG public key (*.key or *.asc)\n\nAfter you select this file, this program will copy and reflash your BIOS\n\nDo you want to proceed?" 16 90) then
mount_usb
if grep -q /media /proc/mounts ; then
find /media -name '*.key' > /tmp/filelist.txt
find /media -name '*.asc' >> /tmp/filelist.txt
file_selector "/tmp/filelist.txt" "Choose your GPG public key"
PUBKEY=$FILE
/bin/flash.sh -r /tmp/gpg-gui.rom
if [ ! -s /tmp/gpg-gui.rom ]; then
whiptail $CONFIG_ERROR_BG_COLOR --title 'ERROR: BIOS Read Failed!' \
--msgbox "Unable to read BIOS" 16 60
exit 1
fi
cat "$PUBKEY" | gpg --import
#update /.gnupg/trustdb.gpg to ultimately trust all user provided public keys
gpg --list-keys --fingerprint --with-colons |sed -E -n -e 's/^fpr:::::::::([0-9A-F]+):$/\1:6:/p' |gpg --import-ownertrust
gpg --update-trust
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/pubring.kbx"); then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/pubring.kbx"
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/pubring.gpg"); then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/pubring.gpg"
if [ -e /.gnupg/pubring.gpg ];then
rm /.gnupg/pubring.gpg
fi
fi
fi
#to be compatible with gpgv1
if [ -e /.gnupg/pubring.kbx ];then
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/pubring.kbx" -f /.gnupg/pubring.kbx
if [ -e /.gnupg/pubring.gpg ];then
rm /.gnupg/pubring.gpg
fi
fi
if [ -e /.gnupg/pubring.gpg ];then
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/pubring.gpg" -f /.gnupg/pubring.gpg
fi
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/trustdb.gpg") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/trustdb.gpg"
fi
cbfs -o /tmp/gpg-gui.rom -a "heads/initrd/.gnupg/trustdb.gpg" -f /.gnupg/trustdb.gpg
#Remove old method owner trust exported file
if (cbfs -o /tmp/gpg-gui.rom -l | grep -q "heads/initrd/.gnupg/otrust.txt") then
cbfs -o /tmp/gpg-gui.rom -d "heads/initrd/.gnupg/otrust.txt"
fi
if (whiptail --title 'Update ROM?' \
--yesno "This will reflash your BIOS with the updated version\n\nDo you want to proceed?" 16 90) then
/bin/flash.sh /tmp/gpg-gui.rom
whiptail --title 'BIOS Updated Successfully' \
--msgbox "BIOS updated successfully.\n\nIf your keys have changed, be sure to re-sign all files in /boot\nafter you reboot.\n\nPress Enter to reboot" 16 60
umount /media
/bin/reboot
else
exit 0
fi
fi
fi
;;
"l" )
GPG_KEYRING=`gpg -k`
whiptail --title 'GPG Keyring' \
--msgbox "${GPG_KEYRING}" 16 60
;;
"g" )
confirm_gpg_card
echo "********************************************************************************"
echo "*"
echo "* INSTRUCTIONS:"
echo "* Type 'admin' and then 'generate' and follow the prompts to generate a GPG key."
echo "*"
echo "********************************************************************************"
gpg --card-edit
;;
esac
done
exit 0

View File

@ -4,7 +4,7 @@
CONFIG_BOOT_GUI_MENU_NAME='Heads Boot Menu' CONFIG_BOOT_GUI_MENU_NAME='Heads Boot Menu'
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
mount_boot() mount_boot()
{ {
@ -89,11 +89,39 @@ update_checksums()
echo "Returning to the main menu" echo "Returning to the main menu"
fi fi
} }
update_totp()
{
echo "Scan the QR code to add the new TOTP secret"
/bin/seal-totp
if [ -x /bin/libremkey_hotp_verification ]; then
echo "Once you have scanned the QR code, hit Enter to configure your Librem Key"
read
/bin/seal-libremkey
else
echo "Once you have scanned the QR code, hit Enter to reboot"
read
fi
/bin/reboot
}
last_half=X last_half=X
while true; do while true; do
MAIN_MENU_OPTIONS="" MAIN_MENU_OPTIONS=""
MAIN_MENU_BG_COLOR=""
unset totp_confirm unset totp_confirm
# detect whether any GPG keys exist in the keyring, if not, initialize that first
GPG_KEY_COUNT=`gpg -k 2>/dev/null | wc -l`
if [ $GPG_KEY_COUNT -eq 0 ]; then
whiptail $CONFIG_ERROR_BG_COLOR --clear --title "ERROR: GPG keyring empty!" \
--menu "ERROR: Heads couldn't find any GPG keys in your keyring.\n\nIf this is the first time the system has booted,\nyou should add a public GPG key to the BIOS now.\n\nIf you just reflashed a new BIOS, you'll need to add at least one\npublic key to the keyring.\n\nIf you have not just reflashed your BIOS, THIS COULD INDICATE TAMPERING!\n\nHow would you like to proceed?" 30 90 4 \
'G' ' Add a GPG key to the running BIOS' \
'i' ' Ignore error and continue to default boot menu' \
'x' ' Exit to recovery shell' \
2>/tmp/whiptail || recovery "GUI menu failed"
totp_confirm=$(cat /tmp/whiptail)
fi
if [ "$totp_confirm" = "i" -o -z "$totp_confirm" ]; then
# update the TOTP code every thirty seconds # update the TOTP code every thirty seconds
date=`date "+%Y-%m-%d %H:%M:%S"` date=`date "+%Y-%m-%d %H:%M:%S"`
seconds=`date "+%s"` seconds=`date "+%s"`
@ -105,8 +133,8 @@ while true; do
TOTP=`unseal-totp` TOTP=`unseal-totp`
if [ $? -ne 0 ]; then if [ $? -ne 0 ]; then
whiptail $CONFIG_ERROR_BG_COLOR --clear --title "ERROR: TOTP Generation Failed!" \ whiptail $CONFIG_ERROR_BG_COLOR --clear --title "ERROR: TOTP Generation Failed!" \
--menu "ERROR: Heads couldn't generate the TOTP code.\n\nIf you just reflashed your BIOS, you'll need to generate a new TOTP secret.\n\nIf you have not just reflashed your BIOS, THIS COULD INDICATE TAMPERING!\n\nIf this is the first time the system has booted, you should reset the TPM\nand set your own password\n\nHow would you like to proceed?" 30 90 4 \ --menu "ERROR: Heads couldn't generate the TOTP code.\n\nIf this is the first time the system has booted, you should reset the TPM\nand set your own password\n\nIf you just reflashed your BIOS, you'll need to generate a new TOTP secret.\n\nIf you have not just reflashed your BIOS, THIS COULD INDICATE TAMPERING!\n\nHow would you like to proceed?" 30 90 4 \
'g' ' Generate new TOTP secret' \ 'g' ' Generate new TOTP/HOTP secret' \
'i' ' Ignore error and continue to default boot menu' \ 'i' ' Ignore error and continue to default boot menu' \
'p' ' Reset the TPM' \ 'p' ' Reset the TPM' \
'x' ' Exit to recovery shell' \ 'x' ' Exit to recovery shell' \
@ -115,14 +143,37 @@ while true; do
totp_confirm=$(cat /tmp/whiptail) totp_confirm=$(cat /tmp/whiptail)
fi fi
fi fi
fi
if [ "$totp_confirm" = "i" -o -z "$totp_confirm" ]; then if [ "$totp_confirm" = "i" -o -z "$totp_confirm" ]; then
whiptail --clear --title "$CONFIG_BOOT_GUI_MENU_NAME" \ if [ -x /bin/libremkey_hotp_verification ]; then
--menu "$date\nTOTP code: $TOTP" 20 90 10 \ HOTP=`unseal-hotp`
enable_usb
if ! libremkey_hotp_verification info ; then
whiptail $CONFIG_WARNING_BG_COLOR --clear --title 'WARNING: Please Insert Your Librem Key' --msgbox "Your Librem Key was not detected.\n\nPlease insert your Librem Key" 30 90
fi
# Don't output HOTP codes to screen, so as to make replay attacks harder
libremkey_hotp_verification check $HOTP
case "$?" in
0 )
HOTP="Success"
;;
4 )
HOTP="Invalid code"
MAIN_MENU_BG_COLOR=$CONFIG_ERROR_BG_COLOR
;;
* )
HOTP="Error checking code, Insert Librem Key and retry"
MAIN_MENU_BG_COLOR=$CONFIG_WARNING_BG_COLOR
;;
esac
else
HOTP='N/A'
fi
whiptail $MAIN_MENU_BG_COLOR --clear --title "$CONFIG_BOOT_GUI_MENU_NAME" \
--menu "$date\nTOTP: $TOTP | HOTP: $HOTP" 20 90 10 \
'y' ' Default boot' \ 'y' ' Default boot' \
'r' ' TOTP does not match, refresh code' \
'n' ' TOTP does not match after refresh, troubleshoot' \
'o' ' Other Boot Options -->' \
'a' ' Advanced Settings -->' \ 'a' ' Advanced Settings -->' \
'x' ' Exit to recovery shell' \ 'x' ' Exit to recovery shell' \
2>/tmp/whiptail || recovery "GUI menu failed" 2>/tmp/whiptail || recovery "GUI menu failed"
@ -130,6 +181,21 @@ while true; do
totp_confirm=$(cat /tmp/whiptail) totp_confirm=$(cat /tmp/whiptail)
fi fi
if [ "$totp_confirm" = "a" ]; then
whiptail --clear --title "Advanced Settings" \
--menu "Configure Advanced Settings" 20 90 10 \
'o' ' Other Boot Options -->' \
't' ' TPM/TOTP/HOTP Options -->' \
's' ' Update checksums and sign all files in /boot' \
'c' ' Change configuration settings -->' \
'f' ' Flash/Update the BIOS -->' \
'G' ' GPG Options -->' \
'r' ' <-- Return to main menu' \
2>/tmp/whiptail || recovery "GUI menu failed"
totp_confirm=$(cat /tmp/whiptail)
fi
if [ "$totp_confirm" = "o" ]; then if [ "$totp_confirm" = "o" ]; then
whiptail --clear --title "Other Boot Options" \ whiptail --clear --title "Other Boot Options" \
--menu "Select A Boot Option" 20 90 10 \ --menu "Select A Boot Option" 20 90 10 \
@ -142,13 +208,13 @@ while true; do
totp_confirm=$(cat /tmp/whiptail) totp_confirm=$(cat /tmp/whiptail)
fi fi
if [ "$totp_confirm" = "a" ]; then if [ "$totp_confirm" = "t" ]; then
whiptail --clear --title "Advanced Settings" \ whiptail --clear --title "TPM/TOTP/HOTP Options" \
--menu "Configure Advanced Settings" 20 90 10 \ --menu "Select An Option" 20 90 10 \
'g' ' Generate new TOTP secret' \ 'g' ' Generate new TOTP/HOTP secret' \
'p' ' Reset the TPM' \ 'p' ' Reset the TPM' \
's' ' Update checksums and sign all files in /boot' \ 'r' ' TOTP/HOTP does not match, refresh code' \
'f' ' Flash/Update the BIOS -->' \ 'n' ' TOTP/HOTP does not match after refresh, troubleshoot' \
'r' ' <-- Return to main menu' \ 'r' ' <-- Return to main menu' \
2>/tmp/whiptail || recovery "GUI menu failed" 2>/tmp/whiptail || recovery "GUI menu failed"
@ -164,14 +230,14 @@ while true; do
fi fi
if [ "$totp_confirm" = "n" ]; then if [ "$totp_confirm" = "n" ]; then
if (whiptail $CONFIG_WARNING_BG_COLOR --title "TOTP code mismatched" \ if (whiptail $CONFIG_WARNING_BG_COLOR --title "TOTP/HOTP code mismatched" \
--yesno "TOTP code mismatches could indicate either TPM tampering or clock drift:\n\nTo correct clock drift: 'date -s HH:MM:SS'\nand save it to the RTC: 'hwclock -w'\nthen reboot and try again.\n\nWould you like to exit to a recovery console?" 30 90) then --yesno "TOTP/HOTP code mismatches could indicate either TPM tampering or clock drift:\n\nTo correct clock drift: 'date -s HH:MM:SS'\nand save it to the RTC: 'hwclock -w'\nthen reboot and try again.\n\nWould you like to exit to a recovery console?" 30 90) then
echo "" echo ""
echo "To correct clock drift: 'date -s HH:MM:SS'" echo "To correct clock drift: 'date -s HH:MM:SS'"
echo "and save it to the RTC: 'hwclock -w'" echo "and save it to the RTC: 'hwclock -w'"
echo "then reboot and try again" echo "then reboot and try again"
echo "" echo ""
recovery "TOTP mismatch" recovery "TOTP/HOTP mismatch"
else else
continue continue
fi fi
@ -183,13 +249,9 @@ while true; do
fi fi
if [ "$totp_confirm" = "g" ]; then if [ "$totp_confirm" = "g" ]; then
if (whiptail --title 'Generate new TOTP secret' \ if (whiptail --title 'Generate new TOTP/HOTP secret' \
--yesno "This will erase your old secret and replace it with a new one!\n\nDo you want to proceed?" 16 90) then --yesno "This will erase your old secret and replace it with a new one!\n\nDo you want to proceed?" 16 90) then
echo "Scan the QR code to add the new TOTP secret" update_totp
/bin/seal-totp
echo "Once you have scanned the QR code, hit Enter to reboot"
read
/bin/reboot
else else
echo "Returning to the main menu" echo "Returning to the main menu"
fi fi
@ -198,20 +260,27 @@ while true; do
if [ "$totp_confirm" = "p" ]; then if [ "$totp_confirm" = "p" ]; then
if (whiptail --title 'Reset the TPM' \ if (whiptail --title 'Reset the TPM' \
--yesno "This will clear the TPM, erase the old TPM password and replace it with a new one!\n\nDo you want to proceed?" 16 90) then --yesno "This will clear the TPM and TPM password, replace them with new ones!\n\nDo you want to proceed?" 16 90) then
/bin/tpm-reset /bin/tpm-reset
# now that the TPM is reset, remove invalid kexec_rollback.txt file # now that the TPM is reset, remove invalid TPM counter files
mount_boot mount_boot
mount -o rw,remount /boot mount -o rw,remount /boot
rm -f /boot/kexec_rollback.txt rm -f /boot/kexec_rollback.txt
# create Heads TPM counter before any others
check_tpm_counter /boot/kexec_rollback.txt \
|| die "Unable to find/create tpm counter"
counter="$TPM_COUNTER"
increment_tpm_counter $counter \
|| die "Unable to increment tpm counter"
sha256sum /tmp/counter-$counter > /boot/kexec_rollback.txt \
|| die "Unable to create rollback file"
mount -o ro,remount /boot mount -o ro,remount /boot
echo "Scan the QR code to add the new TOTP secret" update_totp
/bin/seal-totp
echo "Once you have scanned the QR code, hit Enter to reboot"
read
/bin/reboot
else else
echo "Returning to the main menu" echo "Returning to the main menu"
fi fi
@ -246,11 +315,21 @@ while true; do
continue continue
fi fi
if [ "$totp_confirm" = "c" ]; then
config-gui.sh
continue
fi
if [ "$totp_confirm" = "f" ]; then if [ "$totp_confirm" = "f" ]; then
flash-gui.sh flash-gui.sh
continue continue
fi fi
if [ "$totp_confirm" = "G" ]; then
gpg-gui.sh
continue
fi
if [ "$totp_confirm" = "y" -o -n "$totp_confirm" ]; then if [ "$totp_confirm" = "y" -o -n "$totp_confirm" ]; then
# Try to boot the default # Try to boot the default
mount_boot mount_boot

View File

@ -1,7 +1,7 @@
#!/bin/sh #!/bin/sh
# Launches kexec from saved configuration entries # Launches kexec from saved configuration entries
set -e -o pipefail set -e -o pipefail
. /etc/config . /tmp/config
. /etc/functions . /etc/functions
dryrun="n" dryrun="n"
@ -70,7 +70,7 @@ do
if [ "$kexectype" = "xen" ]; then if [ "$kexectype" = "xen" ]; then
# always use xen with custom arguments # always use xen with custom arguments
kexeccmd="$kexeccmd -l $filepath" kexeccmd="$kexeccmd -l $filepath"
kexeccmd="$kexeccmd --command-line \"no-real-mode reboot=no vga=current\"" kexeccmd="$kexeccmd --command-line \"$restval no-real-mode reboot=no vga=current\""
elif [ "$kexectype" = "multiboot" ]; then elif [ "$kexectype" = "multiboot" ]; then
kexeccmd="$kexeccmd -l $filepath" kexeccmd="$kexeccmd -l $filepath"
kexeccmd="$kexeccmd --command-line \"$restval\"" kexeccmd="$kexeccmd --command-line \"$restval\""

View File

@ -2,7 +2,7 @@
# Boot from signed ISO # Boot from signed ISO
set -e -o pipefail set -e -o pipefail
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
MOUNTED_ISO_PATH="$1" MOUNTED_ISO_PATH="$1"
ISO_PATH="$2" ISO_PATH="$2"

View File

@ -1,7 +1,7 @@
#!/bin/sh #!/bin/sh
# Save these options to be the persistent default # Save these options to be the persistent default
set -e -o pipefail set -e -o pipefail
. /etc/config . /tmp/config
. /etc/functions . /etc/functions
while getopts "b:d:p:i:" arg; do while getopts "b:d:p:i:" arg; do

View File

@ -11,7 +11,7 @@ TPM_SEALED="/tmp/secret/secret.sealed"
RECOVERY_KEY="/tmp/secret/recovery.key" RECOVERY_KEY="/tmp/secret/recovery.key"
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
paramsdir=$1 paramsdir=$1
if [ -z "$paramsdir" ]; then if [ -z "$paramsdir" ]; then
@ -84,6 +84,14 @@ cat "$KEY_DEVICES" | cut -d\ -f1 | xargs /bin/qubes-measure-luks \
|| die "Unable to measure the LUKS headers" || die "Unable to measure the LUKS headers"
luks_pcr=`tpm calcfuturepcr -ix 16 -if /tmp/luksDump.txt` luks_pcr=`tpm calcfuturepcr -ix 16 -if /tmp/luksDump.txt`
# Librem Key loads USB modules which changes PCR5.
# In the event Librem Key is enabled, skip verification of PCR5
if [ -x /bin/libremkey_hotp_verification ]; then
pcr_5="X"
else
pcr_5="0000000000000000000000000000000000000000"
fi
# Note that PCR 4 needs to be set with the "normal-boot" # Note that PCR 4 needs to be set with the "normal-boot"
# path value, which we do not have right now since we are # path value, which we do not have right now since we are
# in a recovery shell. # in a recovery shell.
@ -104,12 +112,12 @@ tpm sealfile2 \
-ix 2 X \ -ix 2 X \
-ix 3 X \ -ix 3 X \
-ix 4 0000000000000000000000000000000000000000 \ -ix 4 0000000000000000000000000000000000000000 \
-ix 5 0000000000000000000000000000000000000000 \ -ix 5 $pcr_5 \
-ix 6 $luks_pcr \ -ix 6 $luks_pcr \
-ix 7 X \ -ix 7 X \
|| die "Unable to seal secret" || die "Unable to seal secret"
rm -f "$KEY_FILE" \ shred -n 10 -z -u "$KEY_FILE" 2> /dev/null \
|| die "Failed to delete key file" || die "Failed to delete key file"
# try it without the owner password first # try it without the owner password first
@ -142,5 +150,5 @@ if ! tpm nv_writevalue \
|| die "Unable to write sealed secret to NVRAM" || die "Unable to write sealed secret to NVRAM"
fi fi
rm "$TPM_SEALED" \ shred -n 10 -z -u "$TPM_SEALED" 2> /dev/null \
|| warn "Failed to delete the sealed secret - continuing" || warn "Failed to delete the sealed secret - continuing"

View File

@ -1,7 +1,7 @@
#!/bin/sh #!/bin/sh
# Generic configurable boot script via kexec # Generic configurable boot script via kexec
set -e -o pipefail set -e -o pipefail
. /etc/config . /tmp/config
. /etc/functions . /etc/functions
add="" add=""

View File

@ -1,7 +1,7 @@
#!/bin/sh #!/bin/sh
# Sign a valid directory of kexec params # Sign a valid directory of kexec params
set -e -o pipefail set -e -o pipefail
. /etc/config . /tmp/config
. /etc/functions . /etc/functions
rollback="n" rollback="n"

View File

@ -38,7 +38,7 @@ for tries in 1 2 3; do
-hk 40000000 \ -hk 40000000 \
; then ; then
# should be okay if this fails # should be okay if this fails
rm -f /tmp/secret/sealed || true shred -n 10 -z -u /tmp/secret/sealed 2> /dev/null || true
exit 0 exit 0
fi fi

View File

@ -5,9 +5,13 @@ set -e -o pipefail
# Post processing of keys # Post processing of keys
# Import user's keys # Import user's keys
gpg --import /.gnupg/keys/* 2>/dev/null || true gpg --import /.gnupg/keys/*.key /.gnupg/keys/*.asc 2>/dev/null || true
# Import trusted distro keys allowed for ISO signing # Import trusted distro keys allowed for ISO signing
gpg --homedir=/etc/distro/ --import /etc/distro/keys/* 2>/dev/null || true gpg --homedir=/etc/distro/ --import /etc/distro/keys/* 2>/dev/null || true
#Set distro keys trust level to ultimate (trust anything that was signed with these keys)
gpg --homedir=/etc/distro/ --list-keys --fingerprint --with-colons|sed -E -n -e 's/^fpr:::::::::([0-9A-F]+):$/\1:6:/p' |gpg --homedir=/etc/distro/ --import-ownertrust 2>/dev/null || true
gpg --homedir=/etc/distro/ --update-trust 2>/dev/null || true
# Add user's keys to the list of trusted keys for ISO signing # Add user's keys to the list of trusted keys for ISO signing
gpg --export | gpg --homedir=/etc/distro/ --import 2>/dev/null || true gpg --export | gpg --homedir=/etc/distro/ --import 2>/dev/null || true

92
initrd/bin/seal-libremkey Executable file
View File

@ -0,0 +1,92 @@
#!/bin/sh
# Retrieve the sealed TOTP secret and initialize a Librem Key with it
. /etc/functions
HOTP_SEALED="/tmp/secret/hotp.sealed"
HOTP_SECRET="/tmp/secret/hotp.key"
HOTP_COUNTER="/boot/kexec_hotp_counter"
mount_boot()
{
# Mount local disk if it is not already mounted
if ! grep -q /boot /proc/mounts ; then
mount -o ro /boot \
|| recovery "Unable to mount /boot"
fi
}
tpm nv_readvalue \
-in 4d47 \
-sz 312 \
-of "$HOTP_SEALED" \
|| die "Unable to retrieve sealed file from TPM NV"
tpm unsealfile \
-hk 40000000 \
-if "$HOTP_SEALED" \
-of "$HOTP_SECRET" \
|| die "Unable to unseal HOTP secret"
shred -n 10 -z -u "$HOTP_SEALED" 2> /dev/null
secret="`cat $HOTP_SECRET`"
shred -n 10 -z -u "$HOTP_SECRET" 2> /dev/null
# Store counter in file instead of TPM for now, as it conflicts with Heads
# config TPM counter as TPM 1.2 can only increment one counter between reboots
# get current value of HOTP counter in TPM, create if absent
mount_boot
#check_tpm_counter $HOTP_COUNTER hotp \
#|| die "Unable to find/create TPM counter"
#counter="$TPM_COUNTER"
#
#counter_value=$(read_tpm_counter $counter | cut -f2 -d ' ' | awk 'gsub("^000e","")')
#if [ "$counter_value" == "" ]; then
# die "Unable to read HOTP counter"
#fi
#counter_value=$(printf "%d" 0x${counter_value})
counter_value=1
enable_usb
if ! libremkey_hotp_verification info ; then
echo "Insert your Librem Key and press Enter to configure it"
read
libremkey_hotp_verification info \
|| die "Unable to find Librem Key"
fi
read -s -p "Enter your Librem Key Admin PIN" admin_pin
echo
libremkey_hotp_initialize $admin_pin $secret $counter_value
if [ $? -ne 0 ]; then
read -s -p "Error setting HOTP secret, re-enter Admin PIN and try again:" admin_pin
libremkey_hotp_initialize $admin_pin $secret $counter_value \
|| die "Setting HOTP secret failed"
fi
secret=""
# Make sure our counter is incremented ahead of the next check
#increment_tpm_counter $counter > /dev/null \
#|| die "Unable to increment tpm counter"
#increment_tpm_counter $counter > /dev/null \
#|| die "Unable to increment tpm counter"
mount -o remount,rw /boot
counter_value=`expr $counter_value + 1`
echo $counter_value > $HOTP_COUNTER \
|| die "Unable to create hotp counter file"
#sha256sum /tmp/counter-$counter > $HOTP_COUNTER \
#|| die "Unable to create hotp counter file"
mount -o remount,ro /boot
echo "Librem Key initialized successfully. Press Enter to continue."
read
exit 0

View File

@ -43,10 +43,12 @@ if ! tpm sealfile2 \
-ix 4 0000000000000000000000000000000000000000 \ -ix 4 0000000000000000000000000000000000000000 \
-ix 7 X \ -ix 7 X \
; then ; then
rm -f "$TOTP_SECRET" shred -n 10 -z -u "$TOTP_SECRET" 2> /dev/null
die "Unable to seal secret" die "Unable to seal secret"
fi fi
shred -n 10 -z -u "$TOTP_SECRET" 2> /dev/null
# to create an nvram space we need the TPM owner password # to create an nvram space we need the TPM owner password
# and the TPM physical presence must be asserted. # and the TPM physical presence must be asserted.
@ -79,7 +81,7 @@ if ! tpm nv_writevalue \
|| die "Unable to write sealed secret to NVRAM" || die "Unable to write sealed secret to NVRAM"
fi fi
rm -f "$TOTP_SEALED" shred -n 10 -z -u "$TOTP_SEALED" 2> /dev/null
url="otpauth://totp/$HOST?secret=$secret" url="otpauth://totp/$HOST?secret=$secret"
secret="" secret=""

73
initrd/bin/unseal-hotp Executable file
View File

@ -0,0 +1,73 @@
#!/bin/sh
# Retrieve the sealed file and counter from the NVRAM, unseal it and compute the hotp
. /etc/functions
HOTP_SEALED="/tmp/secret/hotp.sealed"
HOTP_SECRET="/tmp/secret/hotp.key"
HOTP_COUNTER="/boot/kexec_hotp_counter"
mount_boot()
{
# Mount local disk if it is not already mounted
if ! grep -q /boot /proc/mounts ; then
mount -o ro /boot \
|| recovery "Unable to mount /boot"
fi
}
tpm nv_readvalue \
-in 4d47 \
-sz 312 \
-of "$HOTP_SEALED" \
|| die "Unable to retrieve sealed file from TPM NV"
tpm unsealfile \
-hk 40000000 \
-if "$HOTP_SEALED" \
-of "$HOTP_SECRET" \
|| die "Unable to unseal HOTP secret"
shred -n 10 -z -u "$HOTP_SEALED" 2> /dev/null
# Store counter in file instead of TPM for now, as it conflicts with Heads
# config TPM counter as TPM 1.2 can only increment one counter between reboots
# get current value of HOTP counter in TPM, create if absent
mount_boot
#check_tpm_counter $HOTP_COUNTER hotp \
#|| die "Unable to find/create TPM counter"
#counter="$TPM_COUNTER"
#
#counter_value=$(read_tpm_counter $counter | cut -f2 -d ' ' | awk 'gsub("^000e","")')
#
counter_value=$(cat $HOTP_COUNTER)
if [ "$counter_value" == "" ]; then
die "Unable to read HOTP counter"
fi
#counter_value=$(printf "%d" 0x${counter_value})
if ! hotp $counter_value < "$HOTP_SECRET"; then
shred -n 10 -z -u "$HOTP_SECRET" 2> /dev/null
die 'Unable to compute HOTP hash?'
fi
shred -n 10 -z -u "$HOTP_SECRET" 2> /dev/null
#increment_tpm_counter $counter > /dev/null \
#|| die "Unable to increment tpm counter"
mount -o remount,rw /boot
counter_value=`expr $counter_value + 1`
echo $counter_value > $HOTP_COUNTER \
|| die "Unable to create hotp counter file"
#sha256sum /tmp/counter-$counter > $HOTP_COUNTER \
#|| die "Unable to create hotp counter file"
mount -o remount,ro /boot
exit 0

View File

@ -18,12 +18,12 @@ tpm unsealfile \
-of "$TOTP_SECRET" \ -of "$TOTP_SECRET" \
|| die "Unable to unseal totp secret" || die "Unable to unseal totp secret"
rm -f "$TOTP_SEALED" shred -n 10 -z -u "$TOTP_SEALED" 2> /dev/null
if ! totp -q < "$TOTP_SECRET"; then if ! totp -q < "$TOTP_SECRET"; then
rm -f "$TOTP_SECRET" shred -n 10 -z -u "$TOTP_SECRET" 2> /dev/null
die 'Unable to compute TOTP hash?' die 'Unable to compute TOTP hash?'
fi fi
rm -f "$TOTP_SECRET" shred -n 10 -z -u "$TOTP_SECRET" 2> /dev/null
exit 0 exit 0

View File

@ -2,7 +2,7 @@
# Boot a USB installation # Boot a USB installation
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
if [ "$CONFIG_TPM" = "y" ]; then if [ "$CONFIG_TPM" = "y" ]; then
# Extend PCR4 as soon as possible # Extend PCR4 as soon as possible

View File

@ -2,7 +2,7 @@
# Scan for USB installation options # Scan for USB installation options
set -e -o pipefail set -e -o pipefail
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
# Unmount any previous boot device # Unmount any previous boot device
if grep -q /boot /proc/mounts ; then if grep -q /boot /proc/mounts ; then
@ -26,7 +26,7 @@ get_menu_option() {
n=`expr $n + 1` n=`expr $n + 1`
option=$(echo $option | tr " " "_") option=$(echo $option | tr " " "_")
MENU_OPTIONS="$MENU_OPTIONS $n ${option}" MENU_OPTIONS="$MENU_OPTIONS $n ${option}"
done < $TMP_MENU_FILE done < /tmp/iso_menu.txt
whiptail --clear --title "Select your ISO boot option" \ whiptail --clear --title "Select your ISO boot option" \
--menu "Choose the ISO boot option [1-$n, s for standard boot, a to abort]:" 20 120 8 \ --menu "Choose the ISO boot option [1-$n, s for standard boot, a to abort]:" 20 120 8 \

View File

@ -3,7 +3,7 @@
# invoke a recovery shell and prompt the user for how to proceed # invoke a recovery shell and prompt the user for how to proceed
. /etc/functions . /etc/functions
. /etc/config . /tmp/config
insmod /lib/modules/ehci-hcd.ko insmod /lib/modules/ehci-hcd.ko
insmod /lib/modules/ehci-pci.ko insmod /lib/modules/ehci-pci.ko

View File

@ -14,32 +14,32 @@ NMWZ5vBShQ+bpBXh55fu3F7axequpWzocRfH+mfvBh5yvZnjDRGC3UZ06CFWN6JP
8wDFR+o8ZHSsq0Gx/2mIXVsJT6h0mF92Q1iqH2SQhFeRL3M+RcED6Bx33QARAQAB 8wDFR+o8ZHSsq0Gx/2mIXVsJT6h0mF92Q1iqH2SQhFeRL3M+RcED6Bx33QARAQAB
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=B0uR
-----END PGP PUBLIC KEY BLOCK----- -----END PGP PUBLIC KEY BLOCK-----

View File

@ -15,8 +15,13 @@ recovery() {
# Remove any temporary secret files that might be hanging around # Remove any temporary secret files that might be hanging around
# but recreate the directory so that new tools can use it. # but recreate the directory so that new tools can use it.
shred -n 10 -z -u /tmp/secret/* 2> /dev/null
rm -rf /tmp/secret rm -rf /tmp/secret
mkdir -p /tmp/secret mkdir -p /tmp/secret
# ensure /tmp/config exists for recovery scripts that depend on it
touch /tmp/config
if [ "$CONFIG_TPM" = y ]; then if [ "$CONFIG_TPM" = y ]; then
tpm extend -ix 4 -ic recovery tpm extend -ix 4 -ic recovery
fi fi
@ -138,18 +143,13 @@ confirm_gpg_card()
check_tpm_counter() check_tpm_counter()
{ {
LABEL=${2:-3135106223}
# if the /boot.hashes file already exists, read the TPM counter ID # if the /boot.hashes file already exists, read the TPM counter ID
# from it. # from it.
if [ -r "$1" ]; then if [ -r "$1" ]; then
TPM_COUNTER=`grep counter- "$1" | cut -d- -f2` TPM_COUNTER=`grep counter- "$1" | cut -d- -f2`
else else
# Initialize label to default if not set warn "$1 does not exist; creating new TPM counter"
if [ "$2" != "" ]; then
LABEL=$2
else
LABEL=3135106223
fi
warn "$BOOT_HASHES does not exist; creating new TPM counter"
read -s -p "TPM Owner password: " tpm_password read -s -p "TPM Owner password: " tpm_password
echo echo
tpm counter_create \ tpm counter_create \
@ -222,3 +222,21 @@ preserve_rom() {
fi fi
done done
} }
replace_config() {
CONFIG_FILE=$1
CONFIG_OPTION=$2
NEW_SETTING=$3
touch $CONFIG_FILE
# first pull out the existing option from the global config and place in a tmp file
awk "gsub(\"^export ${CONFIG_OPTION}=.*\",\"export ${CONFIG_OPTION}=\\\"${NEW_SETTING}\\\"\")" /tmp/config > ${CONFIG_FILE}.tmp
awk "gsub(\"^${CONFIG_OPTION}=.*\",\"${CONFIG_OPTION}=\\\"${NEW_SETTING}\\\"\")" /tmp/config >> ${CONFIG_FILE}.tmp
# then copy any remaining settings from the existing config file, minus the option you changed
grep -v "^export ${CONFIG_OPTION}=" ${CONFIG_FILE} | grep -v "^${CONFIG_OPTION}=" >> ${CONFIG_FILE}.tmp || true
sort ${CONFIG_FILE}.tmp | uniq > ${CONFIG_FILE}
rm -f ${CONFIG_FILE}.tmp
}
combine_configs() {
cat /etc/config* > /tmp/config
}

View File

@ -42,21 +42,16 @@ hwclock -l -s
. /etc/functions . /etc/functions
. /etc/config . /etc/config
# Add our boot devices into the /etc/fstab, if they are defined
# in the configuration file.
if [ ! -z "$CONFIG_BOOT_DEV" ]; then
echo >> /etc/fstab "$CONFIG_BOOT_DEV /boot auto defaults,ro 0 0"
fi
if [ ! -z "$CONFIG_USB_BOOT_DEV" ]; then
echo >> /etc/fstab "$CONFIG_USB_BOOT_DEV /media auto defaults,ro 0 0"
fi
if [ "$CONFIG_COREBOOT" = "y" ]; then if [ "$CONFIG_COREBOOT" = "y" ]; then
/bin/cbfs-init /bin/cbfs-init
fi fi
if [ "$CONFIG_LINUXBOOT" = "y" ]; then if [ "$CONFIG_LINUXBOOT" = "y" ]; then
/bin/uefi-init /bin/uefi-init
fi fi
# Set GPG_TTY before calling gpg in key-init
export GPG_TTY=$(tty)
/bin/key-init /bin/key-init
# Setup recovery serial shell # Setup recovery serial shell
@ -87,6 +82,18 @@ if [ "$boot_option" = "r" ]; then
exit exit
fi fi
combine_configs
. /tmp/config
# Add our boot devices into the /etc/fstab, if they are defined
# in the configuration file.
if [ ! -z "$CONFIG_BOOT_DEV" ]; then
echo >> /etc/fstab "$CONFIG_BOOT_DEV /boot auto defaults,ro 0 0"
fi
if [ ! -z "$CONFIG_USB_BOOT_DEV" ]; then
echo >> /etc/fstab "$CONFIG_USB_BOOT_DEV /media auto defaults,ro 0 0"
fi
if [ ! -x "$CONFIG_BOOTSCRIPT" -a ! -x "$CONFIG_BOOTSCRIPT_NETWORK" ]; then if [ ! -x "$CONFIG_BOOTSCRIPT" -a ! -x "$CONFIG_BOOTSCRIPT_NETWORK" ]; then
recovery 'Boot script missing? Entering recovery shell' recovery 'Boot script missing? Entering recovery shell'
else else

View File

@ -15,7 +15,13 @@ cairo_configure := \
--disable-xlib --disable-xcb --disable-pdf \ --disable-xlib --disable-xcb --disable-pdf \
--disable-ps --disable-svg --disable-script \ --disable-ps --disable-svg --disable-script \
--disable-ft --disable-fc --disable-pthread \ --disable-ft --disable-fc --disable-pthread \
--disable-glib --disable-gobject --disable-gobject \
&& sed \
-e 's/^hardcode_libdir_flag_spec.*/hardcode_libdir_flag_spec=" -D__LIBTOOL_RPATH_DISABLE__ "/' \
< libtool \
> libtool-2 \
&& mv libtool-2 libtool \
&& chmod 755 libtool
cairo_target := \ cairo_target := \
$(MAKE_JOBS) \ $(MAKE_JOBS) \

View File

@ -2,12 +2,12 @@ modules-$(CONFIG_COREBOOT) += coreboot
#coreboot_version := git #coreboot_version := git
#coreboot_repo := https://github.com/osresearch/coreboot #coreboot_repo := https://github.com/osresearch/coreboot
coreboot_version := 4.7 coreboot_version := 4.8.1
coreboot_base_dir := coreboot-$(coreboot_version) coreboot_base_dir := coreboot-$(coreboot_version)
coreboot_dir := $(coreboot_base_dir)/$(BOARD) coreboot_dir := $(coreboot_base_dir)/$(BOARD)
coreboot_tar := coreboot-$(coreboot_version).tar.xz coreboot_tar := coreboot-$(coreboot_version).tar.xz
coreboot_url := https://www.coreboot.org/releases/$(coreboot_tar) coreboot_url := https://www.coreboot.org/releases/$(coreboot_tar)
coreboot_hash := d68a83f8f687e8ea212b8c5bb501e24444b57c3f73896042d09628188c851368 coreboot_hash := f0ddf4db0628c1fe1e8348c40084d9cbeb5771400c963fd419cda3995b69ad23
# Coreboot builds are specialized on a per-target basis. # Coreboot builds are specialized on a per-target basis.
# The builds are done in a per-target subdirectory # The builds are done in a per-target subdirectory
@ -19,18 +19,20 @@ $(build)/$(coreboot_dir)/.configured: $(CONFIG_COREBOOT_CONFIG)
EXTRA_FLAGS := -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches EXTRA_FLAGS := -fdebug-prefix-map=$(pwd)=heads -gno-record-gcc-switches
coreboot_configure := \ coreboot_configure := \
$(MAKE) -C $(build)/$(coreboot_base_dir) \ mkdir -p "$(build)/$(coreboot_dir)" \
oldconfig \ && cp "$(pwd)/$(CONFIG_COREBOOT_CONFIG)" "$(build)/$(coreboot_dir)/.config" \
obj=$(build)/$(coreboot_dir) \ && $(MAKE) olddefconfig \
DOTCONFIG=../../$(CONFIG_COREBOOT_CONFIG) \ -C "$(build)/$(coreboot_base_dir)" \
obj="$(build)/$(coreboot_dir)" \
DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
BUILD_TIMELESS=1 \ BUILD_TIMELESS=1 \
CFLAGS_x86_32="$(EXTRA_FLAGS)" \ CFLAGS_x86_32="$(EXTRA_FLAGS)" \
CFLAGS_x86_64="$(EXTRA_FLAGS)" \ CFLAGS_x86_64="$(EXTRA_FLAGS)" \
coreboot_target := \ coreboot_target := \
-C $(build)/$(coreboot_base_dir) \ -C "$(build)/$(coreboot_base_dir)" \
obj=$(build)/$(coreboot_dir) \ obj="$(build)/$(coreboot_dir)" \
DOTCONFIG=../../$(CONFIG_COREBOOT_CONFIG) \ DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
BUILD_TIMELESS=1 \ BUILD_TIMELESS=1 \
CFLAGS_x86_32="$(EXTRA_FLAGS)" \ CFLAGS_x86_32="$(EXTRA_FLAGS)" \
CFLAGS_x86_64="$(EXTRA_FLAGS)" \ CFLAGS_x86_64="$(EXTRA_FLAGS)" \
@ -84,9 +86,18 @@ $(build)/$(BOARD)/coreboot.rom: $(build)/$(coreboot_dir)/.build
coreboot.menuconfig: coreboot.menuconfig:
$(MAKE) \ $(MAKE) \
-C "$(build)/$(coreboot_base_dir)" \ -C "$(build)/$(coreboot_base_dir)" \
DOTCONFIG="../../$(CONFIG_COREBOOT_CONFIG)" \ DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
menuconfig menuconfig
# The config file in the repo is stored as a "defconfig" format
# which only includes the options that have changed from the defaults.
coreboot.saveconfig:
$(MAKE) \
-C "$(build)/$(coreboot_base_dir)" \
DOTCONFIG="$(build)/$(coreboot_dir)/.config" \
DEFCONFIG="$(pwd)/$(CONFIG_COREBOOT_CONFIG)" \
savedefconfig
# if we are not building from a git checkout, # if we are not building from a git checkout,
# we must also download the coreboot-blobs tree # we must also download the coreboot-blobs tree
@ -99,7 +110,7 @@ coreboot-blobs_version := $(coreboot_version)
coreboot-blobs_tar := coreboot-blobs-$(coreboot-blobs_version).tar.xz coreboot-blobs_tar := coreboot-blobs-$(coreboot-blobs_version).tar.xz
coreboot-blobs_dir := coreboot-$(coreboot-blobs_version)/3rdparty/blobs coreboot-blobs_dir := coreboot-$(coreboot-blobs_version)/3rdparty/blobs
coreboot-blobs_url := https://www.coreboot.org/releases/$(coreboot-blobs_tar) coreboot-blobs_url := https://www.coreboot.org/releases/$(coreboot-blobs_tar)
coreboot-blobs_hash := 443379a2207e350747cbbfe7968ceafddc7dd8563b067476f755ff11791bb5f5 coreboot-blobs_hash := 18aa509ae3af005a05d7b1e0b0246dc640249c14fc828f5144b6fd20bb10e295
## there is nothing to build for the blobs, this should be ## there is nothing to build for the blobs, this should be
## made easier to make happen ## made easier to make happen

View File

@ -15,6 +15,7 @@ cryptsetup_configure := ./configure \
--host i386-elf-linux \ --host i386-elf-linux \
--prefix "/" \ --prefix "/" \
--disable-gcrypt-pbkdf2 \ --disable-gcrypt-pbkdf2 \
--enable-cryptsetup-reencrypt \
--with-crypto_backend=kernel \ --with-crypto_backend=kernel \
# but after building, replace prefix so that they will be installed # but after building, replace prefix so that they will be installed
@ -28,6 +29,7 @@ cryptsetup_target := \
cryptsetup_output := \ cryptsetup_output := \
src/.libs/cryptsetup \ src/.libs/cryptsetup \
src/.libs/cryptsetup-reencrypt \
src/.libs/veritysetup \ src/.libs/veritysetup \
cryptsetup_libraries := \ cryptsetup_libraries := \

View File

@ -4,7 +4,7 @@ modules-$(CONFIG_DROPBEAR) += dropbear
dropbear_version := 2016.74 dropbear_version := 2016.74
dropbear_dir := dropbear-$(dropbear_version) dropbear_dir := dropbear-$(dropbear_version)
dropbear_tar := dropbear-$(dropbear_version).tar.bz2 dropbear_tar := dropbear-$(dropbear_version).tar.bz2
dropbear_url := http://matt.ucc.asn.au/dropbear/releases/$(dropbear_tar) dropbear_url := https://matt.ucc.asn.au/dropbear/releases/$(dropbear_tar)
dropbear_hash := 2720ea54ed009af812701bcc290a2a601d5c107d12993e5d92c0f5f81f718891 dropbear_hash := 2720ea54ed009af812701bcc290a2a601d5c107d12993e5d92c0f5f81f718891
dropbear_configure := ./configure \ dropbear_configure := ./configure \

View File

@ -4,7 +4,7 @@ fbwhiptail_depends := cairo $(musl_dep)
fbwhiptail_version := git fbwhiptail_version := git
fbwhiptail_dir := fbwhiptail fbwhiptail_dir := fbwhiptail
fbwhiptail_repo := https://code.puri.sm/kakaroto/fbwhiptail.git fbwhiptail_repo := https://source.puri.sm/coreboot/fbwhiptail.git
fbwhiptail_target := \ fbwhiptail_target := \
$(MAKE_JOBS) \ $(MAKE_JOBS) \

60
modules/gpg2 Normal file
View File

@ -0,0 +1,60 @@
modules-$(CONFIG_GPG2) += gpg2
gpg2_version := 2.2.10
gpg2_dir := gnupg-$(gpg2_version)
gpg2_tar := gnupg-$(gpg2_version).tar.bz2
gpg2_url := https://www.gnupg.org/ftp/gcrypt/gnupg/$(gpg2_tar)
gpg2_hash := 799dd37a86a1448732e339bd20440f4f5ee6e69755f6fd7a73ee8af30840c915
# For reproducibility reasons we have to override the exec_prefix
# and datarootdir on the configure line so that the Makefiles will
# be generated with the correct paths, but then re-write them when
# we use the install target so that they will be copied to the correct
# location.
gpg2_configure := ./configure \
$(CROSS_TOOLS) \
CPPFLAGS="-I$(INSTALL)/include/libusb-1.0" \
--host x86_64-linux-musl \
--with-libusb="$(INSTALL)" \
--with-libgpg-error-prefix="$(INSTALL)" \
--with-libgcrypt-prefix="$(INSTALL)" \
--with-libassuan-prefix="$(INSTALL)" \
--with-ksba-prefix="$(INSTALL)" \
--with-npth-prefix="$(INSTALL)" \
--prefix "/" \
--libexecdir "/bin" \
--enable-scdaemon \
--enable-ccid-driver \
--disable-tofu \
--disable-rpath \
--disable-regex \
--disable-doc \
--disable-bzip2 \
--disable-asm \
--disable-exec \
--disable-photo-viewers \
--disable-keyserver-helpers \
--disable-ldap \
--disable-hkp \
--disable-finger \
--disable-dns-srv \
--disable-dns-cert \
--disable-regex \
--disable-nls \
--disable-all-tests \
--disable-wks-server \
--disable-wks-tools \
--disable-gnutls \
--disable-dirmngr \
# Run one build to generate the executables with the pre-defined
# exec_prefix and datarootdir, then a second make to install the binaries
# into our actual target location
gpg2_target := $(MAKE_JOBS) \
&& $(MAKE) -C $(build)/$(gpg2_dir) \
DESTDIR="$(INSTALL)" \
install
gpg2_output := g10/gpg agent/gpg-agent scd/scdaemon
gpg2_depends := libgpg-error libgcrypt libksba libassuan npth libusb-compat $(musl_dep)

24
modules/libassuan Normal file
View File

@ -0,0 +1,24 @@
modules-$(CONFIG_GPG2) += libassuan
libassuan_version := 2.5.1
libassuan_dir := libassuan-$(libassuan_version)
libassuan_tar := libassuan-$(libassuan_version).tar.bz2
libassuan_url := https://gnupg.org/ftp/gcrypt/libassuan/$(libassuan_tar)
libassuan_hash := 47f96c37b4f2aac289f0bc1bacfa8bd8b4b209a488d3d15e2229cb6cc9b26449
libassuan_configure := ./configure \
$(CROSS_TOOLS) \
--host x86_64-linux-musl \
--prefix "/" \
--disable-static \
--disable-nls \
--with-libgpg-error-prefix="$(INSTALL)" \
--disable-asm \
libassuan_target := $(MAKE_JOBS) \
DESTDIR="$(INSTALL)" \
$(CROSS_TOOLS) \
install \
libassuan_libraries := src/.libs/libassuan.so.0
libassuan_depends := libgpg-error $(musl_dep)

24
modules/libgcrypt Normal file
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@ -0,0 +1,24 @@
modules-$(CONFIG_GPG2) += libgcrypt
libgcrypt_version := 1.8.3
libgcrypt_dir := libgcrypt-$(libgcrypt_version)
libgcrypt_tar := libgcrypt-$(libgcrypt_version).tar.bz2
libgcrypt_url := https://gnupg.org/ftp/gcrypt/libgcrypt/$(libgcrypt_tar)
libgcrypt_hash := 66ec90be036747602f2b48f98312361a9180c97c68a690a5f376fa0f67d0af7c
libgcrypt_configure := ./configure \
$(CROSS_TOOLS) \
--host=x86_64-linux-musl \
--prefix "/" \
--disable-static \
--with-libgpg-error-prefix="$(INSTALL)" \
--disable-asm \
--disable-nls \
libgcrypt_target := $(MAKE_JOBS) \
DESTDIR="$(INSTALL)" \
$(CROSS_TOOLS) \
install \
libgcrypt_libraries := src/.libs/libgcrypt.so.20
libgcrypt_depends := libgpg-error $(musl_dep)

26
modules/libgpg-error Normal file
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@ -0,0 +1,26 @@
modules-$(CONFIG_GPG2) += libgpg-error
libgpg-error_version := 1.32
libgpg-error_dir := libgpg-error-$(libgpg-error_version)
libgpg-error_tar := libgpg-error-$(libgpg-error_version).tar.bz2
libgpg-error_url := https://gnupg.org/ftp/gcrypt/libgpg-error/$(libgpg-error_tar)
libgpg-error_hash := c345c5e73cc2332f8d50db84a2280abfb1d8f6d4f1858b9daa30404db44540ca
libgpg-error_configure := ./configure \
$(CROSS_TOOLS) \
--prefix "/" \
--host=x86_64-linux-musl \
--disable-static \
--disable-nls \
--disable-languages \
--disable-doc \
--disable-tests \
--disable-asm \
libgpg-error_target := $(MAKE_JOBS) \
DESTDIR="$(INSTALL)" \
$(CROSS_TOOLS) \
install \
libgpg-error_libraries := src/.libs/libgpg-error.so.0
libgpg-error_depends := $(musl_dep)

24
modules/libksba Normal file
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@ -0,0 +1,24 @@
modules-$(CONFIG_GPG2) += libksba
libksba_version := 1.3.5
libksba_dir := libksba-$(libksba_version)
libksba_tar := libksba-$(libksba_version).tar.bz2
libksba_url := https://gnupg.org/ftp/gcrypt/libksba/$(libksba_tar)
libksba_hash := 41444fd7a6ff73a79ad9728f985e71c9ba8cd3e5e53358e70d5f066d35c1a340
libksba_configure := ./configure \
$(CROSS_TOOLS) \
--host x86_64-linux-musl \
--prefix "/" \
--disable-static \
--disable-nls \
--with-libgpg-error-prefix="$(INSTALL)" \
--disable-asm \
libksba_target := $(MAKE_JOBS) \
DESTDIR="$(INSTALL)" \
$(CROSS_TOOLS) \
install \
libksba_libraries := src/.libs/libksba.so.8
libksba_depends := libgpg-error $(musl_dep)

View File

@ -0,0 +1,19 @@
modules-$(CONFIG_LIBREMKEY) += libremkey-hotp-verification
libremkey-hotp-verification_depends := libusb $(musl_dep)
libremkey-hotp-verification_version := git
libremkey-hotp-verification_dir := libremkey-hotp-verification
libremkey-hotp-verification_repo := --recursive https://github.com/Nitrokey/nitrokey-hotp-verification
libremkey-hotp-verification_target := \
$(MAKE_JOBS) \
$(CROSS_TOOLS) \
libremkey-hotp-verification_output := \
libremkey_hotp_verification \
libremkey_hotp_initialize
libremkey-hotp-verification_configure := \
INSTALL="$(INSTALL)" \
cmake -DCMAKE_TOOLCHAIN_FILE=./Toolchain-heads.cmake -DCMAKE_AR="$(CROSS)ar" .

View File

@ -1,5 +1,6 @@
# GPG with Yubikey support requires libusb # GPG with Yubikey support requires libusb
modules-$(CONFIG_GPG) += libusb modules-$(CONFIG_GPG) += libusb
modules-$(CONFIG_GPG2) += libusb
libusb_version := 1.0.21 libusb_version := 1.0.21
libusb_dir := libusb-$(libusb_version) libusb_dir := libusb-$(libusb_version)
@ -7,15 +8,17 @@ libusb_tar := libusb-$(libusb_version).tar.bz2
libusb_url := https://downloads.sourceforge.net/project/libusb/libusb-1.0/libusb-$(libusb_version)/$(libusb_tar) libusb_url := https://downloads.sourceforge.net/project/libusb/libusb-1.0/libusb-$(libusb_version)/$(libusb_tar)
libusb_hash := 7dce9cce9a81194b7065ee912bcd55eeffebab694ea403ffb91b67db66b1824b libusb_hash := 7dce9cce9a81194b7065ee912bcd55eeffebab694ea403ffb91b67db66b1824b
libusb_configure := ./configure \ libusb_configure := ./configure\
$(CROSS_TOOLS) \ $(CROSS_TOOLS)\
--host i386-elf-linux \ --host i386-elf-linux\
--prefix "/" \ --prefix "/"\
--disable-udev \ --disable-udev\
--disable-tests\
# Run one build to generate the executables with the pre-defined # Run one build to generate the executables with the pre-defined
# exec_prefix and datarootdir, then a second make to install the binaries # exec_prefix and datarootdir, then a second make to install the binaries
# into our actual target location # into our actual target location
libusb_target := $(MAKE_JOBS) \ libusb_target := $(MAKE_JOBS) \
DESTDIR="$(INSTALL)" \ DESTDIR="$(INSTALL)" \
$(CROSS_TOOLS) \ $(CROSS_TOOLS) \

View File

@ -1,7 +1,9 @@
# GPG 1.4.21 uses an old version of libusb, which # GPG 1.4.21 uses an old version of libusb, which
# is emulated with the compatibility library. # is emulated with the compatibility library.
# This is a bit of a hack to set it up. # This is a bit of a hack to set it up.
modules-$(CONFIG_GPG) += libusb-compat modules-$(CONFIG_GPG) += libusb-compat
modules-$(CONFIG_GPG2) += libusb-compat
libusb-compat_version := 0.1.5 libusb-compat_version := 0.1.5
libusb-compat_dir := libusb-compat-$(libusb-compat_version) libusb-compat_dir := libusb-compat-$(libusb-compat_version)

View File

@ -29,6 +29,8 @@ lvm2_configure := \
--disable-use-lvmpolld \ --disable-use-lvmpolld \
--disable-blkid_wiping \ --disable-blkid_wiping \
--disable-cmirrord \ --disable-cmirrord \
--disable-cache_check_needs_check \
--disable-thin_check_needs_check \
--with-cluster=none \ --with-cluster=none \
# not sure why LIB_SUFFIX is not defined in the cross build # not sure why LIB_SUFFIX is not defined in the cross build

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@ -6,6 +6,7 @@
make_version := 4.2.1 make_version := 4.2.1
make_dir := make-$(make_version) make_dir := make-$(make_version)
make_tar := make-$(make_version).tar.bz2 make_tar := make-$(make_version).tar.bz2
make_url := http://gnu.mirror.constant.com/make/$(make_tar) make_url := http://gnu.mirror.constant.com/make/$(make_tar)
make_hash := d6e262bf3601b42d2b1e4ef8310029e1dcf20083c5446b4b7aa67081fdffc589 make_hash := d6e262bf3601b42d2b1e4ef8310029e1dcf20083c5446b4b7aa67081fdffc589

24
modules/npth Normal file
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@ -0,0 +1,24 @@
modules-$(CONFIG_GPG2) += npth
npth_version := 1.6
npth_dir := npth-$(npth_version)
npth_tar := npth-$(npth_version).tar.bz2
npth_url := https://gnupg.org/ftp/gcrypt/npth/$(npth_tar)
npth_hash := 1393abd9adcf0762d34798dc34fdcf4d0d22a8410721e76f1e3afcd1daa4e2d1
npth_configure := ./configure \
$(CROSS_TOOLS) \
--host x86_64-linux-musl \
--prefix "/" \
--disable-static \
--disable-nls \
--with-libgpg-error-prefix="$(INSTALL)" \
--disable-asm \
npth_target := $(MAKE_JOBS) \
DESTDIR="$(INSTALL)" \
$(CROSS_TOOLS) \
install \
npth_libraries := src/.libs/libnpth.so.0
npth_depends := libgpg-error $(musl_dep)

42
modules/pinentry Normal file
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@ -0,0 +1,42 @@
# pinentry is required for gpg2 to be able to read user passwords
CONFIG_PINENTRY ?= $(CONFIG_GPG2)
modules-$(CONFIG_PINENTRY) += pinentry
pinentry_version := 1.1.0
pinentry_dir := pinentry-$(pinentry_version)
pinentry_tar := pinentry-$(pinentry_version).tar.bz2
pinentry_url := https://www.gnupg.org/ftp/gcrypt/pinentry/$(pinentry_tar)
pinentry_hash := 68076686fa724a290ea49cdf0d1c0c1500907d1b759a3bcbfbec0293e8f56570
# For reproducibility reasons we have to override the exec_prefix
# and datarootdir on the configure line so that the Makefiles will
# be generated with the correct paths, but then re-write them when
# we use the install target so that they will be copied to the correct
# location.
pinentry_configure := ./configure \
$(CROSS_TOOLS) \
--host x86_64-linux-musl \
--prefix "/" \
--enable-pinentry-tty \
--disable-libsecret \
--disable-fallback-curses \
--disable-pinentry-curses \
--disable-pinentry-qt \
--disable-pinentry-fltk \
--disable-pinentry-emacs \
--disable-fallback-curses \
--with-libgpg-error-prefix="$(INSTALL)" \
--with-libassuan-prefix="$(INSTALL)" \
# Run one build to generate the executables with the pre-defined
# exec_prefix and datarootdir, then a second make to install the binaries
# into our actual target location
pinentry_target := $(MAKE_JOBS) \
&& $(MAKE) -C $(build)/$(pinentry_dir) \
DESTDIR="$(INSTALL)" \
install \
&& cp $(build)/$(pinentry_dir)/tty/pinentry-tty $(build)/$(pinentry_dir)/tty/pinentry
pinentry_output := tty/pinentry-tty
pinentry_depends := libgpg-error libassuan $(musl_dep)

View File

@ -3,7 +3,7 @@ modules-$(CONFIG_POPT) += popt
popt_version := 1.16 popt_version := 1.16
popt_dir := popt-$(popt_version) popt_dir := popt-$(popt_version)
popt_tar := popt-$(popt_version).tar.gz popt_tar := popt-$(popt_version).tar.gz
popt_url := http://anduin.linuxfromscratch.org/BLFS/popt/$(popt_tar) popt_url := https://launchpad.net/popt/head/$(popt_version)/+download/$(popt_tar)
popt_hash := e728ed296fe9f069a0e005003c3d6b2dde3d9cad453422a10d6558616d304cc8 popt_hash := e728ed296fe9f069a0e005003c3d6b2dde3d9cad453422a10d6558616d304cc8
popt_configure := ./configure \ popt_configure := ./configure \

View File

@ -8,8 +8,10 @@ slang_hash := 54f0c3007fde918039c058965dffdfd6c5aec0bad0f4227192cc486021f08c36
slang_configure := ./configure \ slang_configure := ./configure \
$(CROSS_TOOLS) \ $(CROSS_TOOLS) \
ac_cv_path_nc5config=no \
--prefix "/" \ --prefix "/" \
--host i386-elf-linux \ --host i386-elf-linux \
--with-z=no \
--with-png=no \ --with-png=no \
--with-pcre=no \ --with-pcre=no \
--with-onig=no \ --with-onig=no \

View File

@ -4,7 +4,7 @@ modules-$(CONFIG_ZLIB) += zlib
zlib_version := 1.2.11 zlib_version := 1.2.11
zlib_dir := zlib-$(zlib_version) zlib_dir := zlib-$(zlib_version)
zlib_tar := zlib-$(zlib_version).tar.gz zlib_tar := zlib-$(zlib_version).tar.gz
zlib_url := http://www.zlib.net/$(zlib_tar) zlib_url := https://www.zlib.net/$(zlib_tar)
zlib_hash := c3e5e9fdd5004dcb542feda5ee4f0ff0744628baf8ed2dd5d66f8ca1197cb1a1 zlib_hash := c3e5e9fdd5004dcb542feda5ee4f0ff0744628baf8ed2dd5d66f8ca1197cb1a1
zlib_configure := \ zlib_configure := \

View File

@ -1,72 +0,0 @@
From feb246c6e8a87c1223c84b4b74f976d23506bb96 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Wed, 7 Feb 2018 11:49:35 -0500
Subject: [PATCH 1/9] intel/fsp: Fix TPM initialization when vboot is disabled
A change introduced by commit fe4983e5 [1] in order to prevent
re-initialization of the TPM if already setup in verstage
had the wrong logic in the if statement, causing the TPM
to never be initialized if vboot is disabled.
The RESUME_PATH_SAME_AS_BOOT config is enabled by default for
ARCH_X86 and therefore the if statement would be false. The
behavior that was intended was probably meant to use an OR
instead of an AND.
This patch also enabled TPM initialization for FSP 2.0.
[1] https://review.coreboot.org/#/c/coreboot/+/14106/
Change-Id: Ic43d1aa31a296386c7eab6d997f9b701e9ea0fe5
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/drivers/intel/fsp1_1/romstage.c | 4 ++--
src/drivers/intel/fsp2_0/memory_init.c | 10 ++++++++++
2 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 81939c4c33..76b4ad7c4d 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -172,8 +172,8 @@ void romstage_common(struct romstage_params *params)
* in verstage and used to verify romstage.
*/
if (IS_ENABLED(CONFIG_LPC_TPM) &&
- !IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) &&
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
+ (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)))
init_tpm(params->power_state->prev_sleep_state ==
ACPI_S3);
}
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 368fafa5d7..575f277466 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -28,6 +28,7 @@
#include <program_loading.h>
#include <reset.h>
#include <romstage_handoff.h>
+#include <tpm.h>
#include <string.h>
#include <symbols.h>
#include <timestamp.h>
@@ -146,6 +147,15 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
/* Create romstage handof information */
romstage_handoff_init(s3wake);
+
+ /*
+ * Initialize the TPM, unless the TPM was already initialized
+ * in verstage and used to verify romstage.
+ */
+ if (IS_ENABLED(CONFIG_LPC_TPM) &&
+ (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)))
+ init_tpm(s3wake);
}
static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size)
--
2.14.3

View File

@ -1,173 +0,0 @@
From 403242fbaf2c3b8c12f4b1d55a581513aabf02a3 Mon Sep 17 00:00:00 2001
From: Nico Huber <nico.h@gmx.de>
Date: Tue, 19 Sep 2017 09:36:03 +0200
Subject: [PATCH 3/9] soc/intel/skylake: Enable VT-d and X2APIC
We use the usual static addresses 0xfed90000/0xfed91000 for the GFX
IOMMU and the general IOMMU respectively. These addresses have to be
configured in MCHBAR registers (maybe, who knows, the blob is undocu-
mented), advertised to FSP and reserved from the OS.
Change-Id: I77f87c385736615c127143760bbd144f97986b37
Signed-off-by: Nico Huber <nico.h@gmx.de>
---
src/soc/intel/skylake/chip_fsp20.c | 10 ++++++++++
src/soc/intel/skylake/include/soc/iomap.h | 6 ++++++
src/soc/intel/skylake/include/soc/systemagent.h | 11 +++++++++++
src/soc/intel/skylake/romstage/systemagent.c | 8 ++++++++
src/soc/intel/skylake/systemagent.c | 13 +++++++++++++
5 files changed, 48 insertions(+)
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index ccda3032c5..875542c9c6 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -30,9 +30,11 @@
#include <soc/acpi.h>
#include <soc/intel/common/vbt.h>
#include <soc/interrupt.h>
+#include <soc/iomap.h>
#include <soc/irq.h>
#include <soc/pci_devs.h>
#include <soc/ramstage.h>
+#include <soc/systemagent.h>
#include <string.h>
void soc_init_pre_device(void *chip_info)
@@ -313,6 +315,14 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd)
/* Set TccActivationOffset */
tconfig->TccActivationOffset = config->tcc_offset;
+ /* Enable VT-d and X2APIC */
+ if (soc_is_vtd_capable()) {
+ params->VtdBaseAddress[0] = GFXVT_BASE_ADDRESS;
+ params->VtdBaseAddress[1] = VTVC0_BASE_ADDRESS;
+ params->X2ApicOptOut = 0;
+ tconfig->VtdDisable = 0;
+ }
+
soc_irq_settings(params);
}
diff --git a/src/soc/intel/skylake/include/soc/iomap.h b/src/soc/intel/skylake/include/soc/iomap.h
index 0a573acb38..5f868061ec 100644
--- a/src/soc/intel/skylake/include/soc/iomap.h
+++ b/src/soc/intel/skylake/include/soc/iomap.h
@@ -52,6 +52,12 @@
#define GDXC_BASE_ADDRESS 0xfed84000
#define GDXC_BASE_SIZE 0x1000
+#define GFXVT_BASE_ADDRESS 0xfed90000
+#define GFXVT_BASE_SIZE 0x1000
+
+#define VTVC0_BASE_ADDRESS 0xfed91000
+#define VTVC0_BASE_SIZE 0x1000
+
#define HPET_BASE_ADDRESS 0xfed00000
#define PCH_PWRM_BASE_ADDRESS 0xfe000000
diff --git a/src/soc/intel/skylake/include/soc/systemagent.h b/src/soc/intel/skylake/include/soc/systemagent.h
index d8192a3e75..8e53f54b75 100644
--- a/src/soc/intel/skylake/include/soc/systemagent.h
+++ b/src/soc/intel/skylake/include/soc/systemagent.h
@@ -32,9 +32,13 @@
#define D_LCK (1 << 4)
#define G_SMRAME (1 << 3)
#define C_BASE_SEG ((0 << 2) | (1 << 1) | (0 << 0))
+#define CAPID0_A 0xe4
+#define VTD_DISABLE (1 << 23)
#define BIOS_RESET_CPL 0x5da8
+#define GFXVTBAR 0x5400
#define EDRAMBAR 0x5408
+#define VTVC0BAR 0x5410
#define GDXCBAR 0x5420
#define MCH_PKG_POWER_LIMIT_LO 0x59a0
@@ -42,4 +46,11 @@
#define MCH_DDR_POWER_LIMIT_LO 0x58e0
#define MCH_DDR_POWER_LIMIT_HI 0x58e4
+bool soc_is_vtd_capable(void);
+
+static const struct sa_mmio_descriptor soc_vtd_resources[] = {
+ { GFXVTBAR, GFXVT_BASE_ADDRESS, GFXVT_BASE_SIZE, "GFXVTBAR" },
+ { VTVC0BAR, VTVC0_BASE_ADDRESS, VTVC0_BASE_SIZE, "VTVC0BAR" },
+};
+
#endif
diff --git a/src/soc/intel/skylake/romstage/systemagent.c b/src/soc/intel/skylake/romstage/systemagent.c
index 8f2fb337ed..66676c1fbf 100644
--- a/src/soc/intel/skylake/romstage/systemagent.c
+++ b/src/soc/intel/skylake/romstage/systemagent.c
@@ -18,6 +18,7 @@
#include <device/device.h>
#include <intelblocks/systemagent.h>
#include <soc/iomap.h>
+#include <soc/pci_devs.h>
#include <soc/romstage.h>
#include <soc/systemagent.h>
@@ -34,12 +35,19 @@ void systemagent_early_init(void)
{ EDRAMBAR, EDRAM_BASE_ADDRESS, EDRAM_BASE_SIZE, "EDRAMBAR" },
};
+ const bool vtd_capable =
+ !(pci_read_config32(SA_DEV_ROOT, CAPID0_A) & VTD_DISABLE);
+
/* Set Fixed MMIO addresss into PCI configuration space */
sa_set_pci_bar(soc_fixed_pci_resources,
ARRAY_SIZE(soc_fixed_pci_resources));
/* Set Fixed MMIO addresss into MCH base address */
sa_set_mch_bar(soc_fixed_mch_resources,
ARRAY_SIZE(soc_fixed_mch_resources));
+ if (vtd_capable)
+ sa_set_mch_bar(soc_vtd_resources,
+ ARRAY_SIZE(soc_vtd_resources));
+
/* Enable PAM regisers */
enable_pam_region();
}
diff --git a/src/soc/intel/skylake/systemagent.c b/src/soc/intel/skylake/systemagent.c
index 8af995d133..796e7ae131 100644
--- a/src/soc/intel/skylake/systemagent.c
+++ b/src/soc/intel/skylake/systemagent.c
@@ -15,6 +15,7 @@
* GNU General Public License for more details.
*/
+#include <arch/io.h>
#include <cpu/x86/msr.h>
#include <console/console.h>
#include <delay.h>
@@ -23,8 +24,16 @@
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/msr.h>
+#include <soc/pci_devs.h>
#include <soc/systemagent.h>
+bool soc_is_vtd_capable(void)
+{
+ struct device *const root_dev = SA_DEV_ROOT;
+ return root_dev &&
+ !(pci_read_config32(root_dev, CAPID0_A) & VTD_DISABLE);
+}
+
/*
* SoC implementation
*
@@ -45,6 +54,10 @@ void soc_add_fixed_mmio_resources(struct device *dev, int *index)
sa_add_fixed_mmio_resources(dev, index, soc_fixed_resources,
ARRAY_SIZE(soc_fixed_resources));
+
+ if (soc_is_vtd_capable())
+ sa_add_fixed_mmio_resources(dev, index, soc_vtd_resources,
+ ARRAY_SIZE(soc_vtd_resources));
}
/*
--
2.14.3

View File

@ -1,154 +0,0 @@
From 65b3bf5a7d211f7e1e37d73d0b59ed053dff85a8 Mon Sep 17 00:00:00 2001
From: Nico Huber <nico.h@gmx.de>
Date: Mon, 18 Sep 2017 20:03:46 +0200
Subject: [PATCH 4/9] soc/intel/skylake: Generate ACPI DMAR table
If the SoC is VT-d capable, write an ACPI DMAR table. The entry for the
GFXVTBAR is only generated if the IGD is enabled.
Change-Id: I8176401dd19aee7ad09a8a145b7a3801fe5b2ae1
Signed-off-by: Nico Huber <nico.h@gmx.de>
---
src/soc/intel/skylake/acpi.c | 68 ++++++++++++++++++++++++++++++++
src/soc/intel/skylake/chip_fsp20.c | 3 +-
src/soc/intel/skylake/include/soc/acpi.h | 2 +
src/soc/intel/skylake/include/soc/p2sb.h | 3 ++
4 files changed, 75 insertions(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 61360dafae..45061aba6f 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -34,14 +34,17 @@
#include <intelblocks/lpc_lib.h>
#include <intelblocks/sgx.h>
#include <intelblocks/uart.h>
+#include <intelblocks/systemagent.h>
#include <soc/intel/common/acpi.h>
#include <soc/acpi.h>
#include <soc/cpu.h>
#include <soc/iomap.h>
#include <soc/msr.h>
+#include <soc/p2sb.h>
#include <soc/pci_devs.h>
#include <soc/pm.h>
#include <soc/ramstage.h>
+#include <soc/systemagent.h>
#include <string.h>
#include <types.h>
#include <vendorcode/google/chromeos/gnvs.h>
@@ -539,6 +542,71 @@ void generate_cpu_entries(device_t device)
}
}
+static unsigned long acpi_fill_dmar(unsigned long current)
+{
+ struct device *const igfx_dev = dev_find_slot(0, SA_DEVFN_IGD);
+ const u32 gfx_vtbar = MCHBAR32(GFXVTBAR) & ~0xfff;
+
+ /* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */
+ if (igfx_dev && igfx_dev->enabled &&
+ gfx_vtbar && !MCHBAR32(GFXVTBAR + 4)) {
+ const unsigned long tmp = current;
+
+ current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
+ current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
+
+ acpi_dmar_drhd_fixup(tmp, current);
+ }
+
+ struct device *const p2sb_dev = dev_find_slot(0, PCH_DEVFN_P2SB);
+ const u32 vtvc0bar = MCHBAR32(VTVC0BAR) & ~0xfff;
+
+ /* General VTBAR has to be set and in 32-bit space. */
+ if (p2sb_dev && vtvc0bar && !MCHBAR32(VTVC0BAR + 4)) {
+ const unsigned long tmp = current;
+
+ /* P2SB may already be hidden. There's no clear rule, when. */
+ const u8 p2sb_hidden =
+ pci_read_config8(p2sb_dev, PCH_P2SB_E0 + 1);
+ pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, 0);
+
+ const u16 ibdf = pci_read_config16(p2sb_dev, PCH_P2SB_IBDF);
+ const u16 hbdf = pci_read_config16(p2sb_dev, PCH_P2SB_HBDF);
+
+ pci_write_config8(p2sb_dev, PCH_P2SB_E0 + 1, p2sb_hidden);
+
+ current += acpi_create_dmar_drhd(current,
+ DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
+ current += acpi_create_dmar_drhd_ds_ioapic(current,
+ 2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf));
+ current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ 0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf));
+
+ acpi_dmar_drhd_fixup(tmp, current);
+ }
+
+ return current;
+}
+
+unsigned long northbridge_write_acpi_tables(struct device *const dev,
+ unsigned long current,
+ struct acpi_rsdp *const rsdp)
+{
+ acpi_dmar_t *const dmar = (acpi_dmar_t *)current;
+
+ /* Create DMAR table only if we have VT-d capability. */
+ if (!soc_is_vtd_capable())
+ return current;
+
+ printk(BIOS_DEBUG, "ACPI: * DMAR\n");
+ acpi_create_dmar(dmar, DMAR_INTR_REMAP, acpi_fill_dmar);
+ current += dmar->header.length;
+ current = acpi_align_current(current);
+ acpi_add_table(rsdp, dmar);
+
+ return current;
+}
+
unsigned long acpi_madt_irq_overrides(unsigned long current)
{
int sci = acpi_sci_irq();
diff --git a/src/soc/intel/skylake/chip_fsp20.c b/src/soc/intel/skylake/chip_fsp20.c
index 875542c9c6..9fbc3da8dc 100644
--- a/src/soc/intel/skylake/chip_fsp20.c
+++ b/src/soc/intel/skylake/chip_fsp20.c
@@ -59,7 +59,8 @@ static struct device_operations pci_domain_ops = {
.scan_bus = &pci_domain_scan_bus,
.ops_pci_bus = &pci_bus_default_ops,
#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES)
- .acpi_name = &soc_acpi_name,
+ .write_acpi_tables = &northbridge_write_acpi_tables,
+ .acpi_name = &soc_acpi_name,
#endif
};
diff --git a/src/soc/intel/skylake/include/soc/acpi.h b/src/soc/intel/skylake/include/soc/acpi.h
index b0d2194612..6d492acd67 100644
--- a/src/soc/intel/skylake/include/soc/acpi.h
+++ b/src/soc/intel/skylake/include/soc/acpi.h
@@ -32,5 +32,7 @@ void acpi_mainboard_gnvs(global_nvs_t *gnvs);
void southbridge_inject_dsdt(device_t device);
unsigned long southbridge_write_acpi_tables(device_t device,
unsigned long current, struct acpi_rsdp *rsdp);
+unsigned long northbridge_write_acpi_tables(struct device *,
+ unsigned long current, struct acpi_rsdp *);
#endif /* _SOC_ACPI_H_ */
diff --git a/src/soc/intel/skylake/include/soc/p2sb.h b/src/soc/intel/skylake/include/soc/p2sb.h
index d846dfc8f5..09e73fc254 100644
--- a/src/soc/intel/skylake/include/soc/p2sb.h
+++ b/src/soc/intel/skylake/include/soc/p2sb.h
@@ -19,6 +19,9 @@
#define HPTC_OFFSET 0x60
#define HPTC_ADDR_ENABLE_BIT (1 << 7)
+#define PCH_P2SB_IBDF 0x6c
+#define PCH_P2SB_HBDF 0x70
+
#define PCH_P2SB_EPMASK0 0xB0
#define PCH_P2SB_EPMASK(mask_number) (PCH_P2SB_EPMASK0 + ((mask_number) * 4))
--
2.14.3

View File

@ -1,341 +0,0 @@
From c142a773852b8bbfddc3791248b8365242df4f4c Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 9 Feb 2018 18:42:49 -0500
Subject: [PATCH 5/9] purism/librem_skl: Enable TPM support
Change the GPIO to match the TPM-enabled motherboards, and add TPM
support in devicetree and enable the config.
After changing the GPIO table, the librem 13v2 and librem 15v3 now
have the same GPIOs, so use a single gpio.h file instead of one
file per variant.
Change-Id: I425654c1c972118aa81c27961246238c2eef782d
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/mainboard/purism/librem_skl/Kconfig | 1 +
src/mainboard/purism/librem_skl/Makefile.inc | 1 -
.../librem13v2/include/variant => }/gpio.h | 16 +-
src/mainboard/purism/librem_skl/ramstage.c | 2 +-
.../librem_skl/variants/librem13v2/devicetree.cb | 3 +
.../librem_skl/variants/librem15v3/devicetree.cb | 3 +
.../variants/librem15v3/include/variant/gpio.h | 201 ---------------------
7 files changed, 16 insertions(+), 211 deletions(-)
rename src/mainboard/purism/librem_skl/{variants/librem13v2/include/variant => }/gpio.h (94%)
delete mode 100644 src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h
diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig
index f68fd239f9..be4b7a37c7 100644
--- a/src/mainboard/purism/librem_skl/Kconfig
+++ b/src/mainboard/purism/librem_skl/Kconfig
@@ -9,6 +9,7 @@ config BOARD_PURISM_BASEBOARD_LIBREM_SKL
select SERIRQ_CONTINUOUS_MODE
select MAINBOARD_USES_FSP2_0
select SPD_READ_BY_WORD
+ select MAINBOARD_HAS_LPC_TPM
if BOARD_PURISM_BASEBOARD_LIBREM_SKL
diff --git a/src/mainboard/purism/librem_skl/Makefile.inc b/src/mainboard/purism/librem_skl/Makefile.inc
index 18c9ad6520..eb01360863 100644
--- a/src/mainboard/purism/librem_skl/Makefile.inc
+++ b/src/mainboard/purism/librem_skl/Makefile.inc
@@ -19,4 +19,3 @@ ramstage-y += pei_data.c
ramstage-y += ramstage.c
ramstage-y += hda_verb.c
-CPPFLAGS_common += -I$(src)/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/include
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/include/variant/gpio.h b/src/mainboard/purism/librem_skl/gpio.h
similarity index 94%
rename from src/mainboard/purism/librem_skl/variants/librem13v2/include/variant/gpio.h
rename to src/mainboard/purism/librem_skl/gpio.h
index 148e40b279..e3328a3336 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/include/variant/gpio.h
+++ b/src/mainboard/purism/librem_skl/gpio.h
@@ -41,9 +41,9 @@ static const struct pad_config gpio_table[] = {
/* SUSACK# */ PAD_CFG_NF(GPP_A15, DN_20K, DEEP, NF1),
/* SD_1P8_SEL */ PAD_CFG_NC(GPP_A16),
/* SD_PWR_EN# */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1),
-/* ISH_GP0 */ PAD_CFG_NC(GPP_A18),
-/* ISH_GP1 */ PAD_CFG_NC(GPP_A19),
-/* ISH_GP2 */ PAD_CFG_NC(GPP_A20),
+/* ISH_GP0 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A18, NONE, DEEP),
+/* ISH_GP1 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A19, NONE, DEEP),
+/* ISH_GP2 */ PAD_CFG_GPI_GPIO_DRIVER(GPP_A20, NONE, DEEP),
/* ISH_GP3 */ PAD_CFG_NC(GPP_A21),
/* ISH_GP4 */ PAD_CFG_NC(GPP_A22),
/* ISH_GP5 */ PAD_CFG_NC(GPP_A23),
@@ -108,18 +108,18 @@ static const struct pad_config gpio_table[] = {
/* ISH_I2C0_SCL */ PAD_CFG_NC(GPP_D6),
/* ISH_I2C1_SDA */ PAD_CFG_NC(GPP_D7),
/* ISH_I2C1_SCL */ PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */ PAD_CFG_NC(GPP_D9),
-/* ISH_SPI_CLK */ PAD_CFG_NC(GPP_D10),
-/* ISH_SPI_MISO */ PAD_CFG_NC(GPP_D11),
+/* ISH_SPI_CS# */ PAD_CFG_TERM_GPO(GPP_D9, 0, NONE, DEEP),
+/* ISH_SPI_CLK */ PAD_CFG_GPI_GPIO_DRIVER(GPP_D10, NONE, DEEP),
+/* ISH_SPI_MISO */ PAD_CFG_TERM_GPO(GPP_D11, 1, NONE, DEEP),
/* ISH_SPI_MOSI */ PAD_CFG_NC(GPP_D12),
/* ISH_UART0_RXD */ PAD_CFG_NC(GPP_D13),
/* ISH_UART0_TXD */ PAD_CFG_NC(GPP_D14),
/* ISH_UART0_RTS# */ PAD_CFG_NC(GPP_D15),
/* ISH_UART0_CTS# */ PAD_CFG_NC(GPP_D16),
/* DMIC_CLK1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
-/* DMIC_DATA1 */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
+/* DMIC_DATA1 */ PAD_CFG_NF(GPP_D18, DN_20K, DEEP, NF1),
/* DMIC_CLK0 */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
-/* DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
+/* DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, DN_20K, DEEP, NF1),
/* SPI1_IO2 */ PAD_CFG_NC(GPP_D21),
/* SPI1_IO3 */ PAD_CFG_NC(GPP_D22),
/* I2S_MCLK */ PAD_CFG_NC(GPP_D23),
diff --git a/src/mainboard/purism/librem_skl/ramstage.c b/src/mainboard/purism/librem_skl/ramstage.c
index 15912cf862..94f8071340 100644
--- a/src/mainboard/purism/librem_skl/ramstage.c
+++ b/src/mainboard/purism/librem_skl/ramstage.c
@@ -15,7 +15,7 @@
*/
#include <soc/ramstage.h>
-#include <variant/gpio.h>
+#include "gpio.h"
void mainboard_silicon_init_params(FSP_SIL_UPD *params)
{
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index 1fc19a5675..e2e2ac03da 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -195,6 +195,9 @@ chip soc/intel/skylake
chip ec/purism/librem
device pnp 0c09.0 on end
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index 647f054f74..6cf183a61f 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -202,6 +202,9 @@ chip soc/intel/skylake
chip ec/purism/librem
device pnp 0c09.0 on end
end
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
end # LPC Interface
device pci 1f.1 on end # P2SB
device pci 1f.2 on end # Power Management Controller
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h b/src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h
deleted file mode 100644
index 9c22f00f42..0000000000
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/include/variant/gpio.h
+++ /dev/null
@@ -1,201 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2015 Google Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.See the
- * GNU General Public License for more details.
- */
-
-#ifndef MAINBOARD_GPIO_H
-#define MAINBOARD_GPIO_H
-
-#include <soc/gpe.h>
-#include <soc/gpio.h>
-
-#ifndef __ACPI__
-
-/* Pad configuration in ramstage. */
-static const struct pad_config gpio_table[] = {
-/* RCIN# */ PAD_CFG_NF(GPP_A0, NONE, DEEP, NF1),
-/* LAD0 */ PAD_CFG_NF(GPP_A1, NONE, DEEP, NF1),
-/* LAD1 */ PAD_CFG_NF(GPP_A2, NONE, DEEP, NF1),
-/* LAD2 */ PAD_CFG_NF(GPP_A3, NONE, DEEP, NF1),
-/* LAD3 */ PAD_CFG_NF(GPP_A4, NONE, DEEP, NF1),
-/* LFRAME# */ PAD_CFG_NF(GPP_A5, NONE, DEEP, NF1),
-/* SERIRQ */ PAD_CFG_NF(GPP_A6, NONE, DEEP, NF1),
-/* PIRQA# */ PAD_CFG_NC(GPP_A7),
-/* CLKRUN# */ PAD_CFG_NF(GPP_A8, NONE, DEEP, NF1),
-/* CLKOUT_LPC0 */ PAD_CFG_NF(GPP_A9, NONE, DEEP, NF1),
-/* CLKOUT_LPC1 */ PAD_CFG_NF(GPP_A10, NONE, DEEP, NF1),
-/* PME# */ PAD_CFG_NC(GPP_A11),
-/* BM_BUSY# */ PAD_CFG_NC(GPP_A12),
-/* SUSWARN# */ PAD_CFG_NF(GPP_A13, NONE, DEEP, NF1),
-/* SUS_STAT# */ PAD_CFG_NF(GPP_A14, NONE, DEEP, NF1),
-/* SUSACK# */ PAD_CFG_NF(GPP_A15, DN_20K, DEEP, NF1),
-/* SD_1P8_SEL */ PAD_CFG_NC(GPP_A16),
-/* SD_PWR_EN# */ PAD_CFG_NF(GPP_A17, NONE, DEEP, NF1),
-/* ISH_GP0 */ PAD_CFG_GPI(GPP_A18, NONE, DEEP),
-/* ISH_GP1 */ PAD_CFG_GPI(GPP_A19, NONE, DEEP),
-/* ISH_GP2 */ PAD_CFG_GPI(GPP_A20, NONE, DEEP),
-/* ISH_GP3 */ PAD_CFG_NC(GPP_A21),
-/* ISH_GP4 */ PAD_CFG_NC(GPP_A22),
-/* ISH_GP5 */ PAD_CFG_NC(GPP_A23),
-
-/* CORE_VID0 */ PAD_CFG_NC(GPP_B0),
-/* CORE_VID1 */ PAD_CFG_NC(GPP_B1),
-/* VRALERT# */ PAD_CFG_NC(GPP_B2),
-/* CPU_GP2 */ PAD_CFG_NC(GPP_B3),
-/* CPU_GP3 */ PAD_CFG_NC(GPP_B4),
-/* SRCCLKREQ0# */ PAD_CFG_NF(GPP_B5, NONE, DEEP, NF1),
-/* SRCCLKREQ1# */ PAD_CFG_NF(GPP_B6, NONE, DEEP, NF1),
-/* SRCCLKREQ2# */ PAD_CFG_NF(GPP_B7, NONE, DEEP, NF1),
-/* SRCCLKREQ3# */ PAD_CFG_NF(GPP_B8, NONE, DEEP, NF1),
-/* SRCCLKREQ4# */ PAD_CFG_NF(GPP_B9, NONE, DEEP, NF1),
-/* SRCCLKREQ5# */ PAD_CFG_NF(GPP_B10, NONE, DEEP, NF1),
-/* EXT_PWR_GATE# */ PAD_CFG_NC(GPP_B11),
-/* SLP_S0# */ PAD_CFG_NF(GPP_B12, NONE, DEEP, NF1),
-/* PLTRST# */ PAD_CFG_NF(GPP_B13, NONE, DEEP, NF1),
-/* SPKR */ PAD_CFG_TERM_GPO(GPP_B14, 1, DN_20K, DEEP),
-/* GSPI0_CS# */ PAD_CFG_NC(GPP_B15),
-/* GSPI0_CLK */ PAD_CFG_NC(GPP_B16),
-/* GSPI0_MISO */ PAD_CFG_NC(GPP_B17),
-/* GSPI0_MOSI */ PAD_CFG_GPI_SCI(GPP_B18, UP_20K, PLTRST, LEVEL, INVERT),
-/* GSPI1_CS# */ PAD_CFG_NC(GPP_B19),
-/* GSPI1_CLK */ PAD_CFG_NC(GPP_B20),
-/* GSPI1_MISO */ PAD_CFG_NC(GPP_B21),
-/* GSPI1_MOSI */ PAD_CFG_NF(GPP_B22, DN_20K, DEEP, NF1),
-/* SM1ALERT# */ PAD_CFG_TERM_GPO(GPP_B23, 1, DN_20K, DEEP),
-
-/* SMBCLK */ PAD_CFG_NF(GPP_C0, NONE, DEEP, NF1),
-/* SMBDATA */ PAD_CFG_NF(GPP_C1, DN_20K, DEEP, NF1),
-/* SMBALERT# */ PAD_CFG_TERM_GPO(GPP_C2, 1, DN_20K, DEEP),
-/* SML0CLK */ PAD_CFG_NF(GPP_C3, NONE, DEEP, NF1),
-/* SML0DATA */ PAD_CFG_NF(GPP_C4, NONE, DEEP, NF1),
-/* SML0ALERT# */ PAD_CFG_GPI_APIC_INVERT(GPP_C5, DN_20K, DEEP),
-/* SML1CLK */ PAD_CFG_NC(GPP_C6), /* RESERVED */
-/* SML1DATA */ PAD_CFG_NC(GPP_C7), /* RESERVED */
-/* UART0_RXD */ PAD_CFG_NF(GPP_C8, NONE, DEEP, NF1),
-/* UART0_TXD */ PAD_CFG_NF(GPP_C9, NONE, DEEP, NF1),
-/* UART0_RTS# */ PAD_CFG_NF(GPP_C10, NONE, DEEP, NF1),
-/* UART0_CTS# */ PAD_CFG_NF(GPP_C11, NONE, DEEP, NF1),
-/* UART1_RXD */ PAD_CFG_NC(GPP_C12),
-/* UART1_TXD */ PAD_CFG_NC(GPP_C13),
-/* UART1_RTS# */ PAD_CFG_NC(GPP_C14),
-/* UART1_CTS# */ PAD_CFG_NC(GPP_C15),
-/* I2C0_SDA */ PAD_CFG_GPI(GPP_C16, NONE, DEEP),
-/* I2C0_SCL */ PAD_CFG_GPI(GPP_C17, NONE, DEEP),
-/* I2C1_SDA */ PAD_CFG_GPI(GPP_C18, NONE, DEEP),
-/* I2C1_SCL */ PAD_CFG_NC(GPP_C19),
-/* UART2_RXD */ PAD_CFG_NC(GPP_C20),
-/* UART2_TXD */ PAD_CFG_NC(GPP_C21),
-/* UART2_RTS# */ PAD_CFG_NC(GPP_C22),
-/* UART2_CTS# */ PAD_CFG_NC(GPP_C23),
-
-/* SPI1_CS# */ PAD_CFG_NC(GPP_D0),
-/* SPI1_CLK */ PAD_CFG_NC(GPP_D1),
-/* SPI1_MISO */ PAD_CFG_NC(GPP_D2),
-/* SPI1_MOSI */ PAD_CFG_NC(GPP_D3),
-/* FASHTRIG */ PAD_CFG_NC(GPP_D4),
-/* ISH_I2C0_SDA */ PAD_CFG_NC(GPP_D5),
-/* ISH_I2C0_SCL */ PAD_CFG_NC(GPP_D6),
-/* ISH_I2C1_SDA */ PAD_CFG_NC(GPP_D7),
-/* ISH_I2C1_SCL */ PAD_CFG_NC(GPP_D8),
-/* ISH_SPI_CS# */ PAD_CFG_TERM_GPO(GPP_D9, 0, NONE, DEEP),
-/* ISH_SPI_CLK */ PAD_CFG_GPI(GPP_D10, NONE, DEEP),
-/* ISH_SPI_MISO */ PAD_CFG_TERM_GPO(GPP_D11, 1, NONE, DEEP),
-/* ISH_SPI_MOSI */ PAD_CFG_NC(GPP_D12),
-/* ISH_UART0_RXD */ PAD_CFG_NC(GPP_D13),
-/* ISH_UART0_TXD */ PAD_CFG_NC(GPP_D14),
-/* ISH_UART0_RTS# */ PAD_CFG_NC(GPP_D15),
-/* ISH_UART0_CTS# */ PAD_CFG_NC(GPP_D16),
-/* DMIC_CLK1 */ PAD_CFG_NF(GPP_D17, NONE, DEEP, NF1),
-/* DMIC_DATA1 */ PAD_CFG_NF(GPP_D18, NONE, DEEP, NF1),
-/* DMIC_CLK0 */ PAD_CFG_NF(GPP_D19, NONE, DEEP, NF1),
-/* DMIC_DATA0 */ PAD_CFG_NF(GPP_D20, NONE, DEEP, NF1),
-/* SPI1_IO2 */ PAD_CFG_NC(GPP_D21),
-/* SPI1_IO3 */ PAD_CFG_NC(GPP_D22),
-/* I2S_MCLK */ PAD_CFG_NC(GPP_D23),
-
-/* SATAXPCI0 */ PAD_CFG_NC(GPP_E0),
-/* SATAXPCIE1 */ PAD_CFG_NC(GPP_E1),
-/* SATAXPCIE2 */ PAD_CFG_NF(GPP_E2, UP_20K, DEEP, NF1),
-/* CPU_GP0 */ PAD_CFG_NC(GPP_E3),
-/* SATA_DEVSLP0 */ PAD_CFG_NC(GPP_E4),
-/* SATA_DEVSLP1 */ PAD_CFG_NC(GPP_E5),
-/* SATA_DEVSLP2 */ PAD_CFG_NC(GPP_E6),
-/* CPU_GP1 */ PAD_CFG_NC(GPP_E7),
-/* SATALED# */ PAD_CFG_NC(GPP_E8),
-/* USB2_OCO# */ PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
-/* USB2_OC1# */ PAD_CFG_NF(GPP_E10, NONE, DEEP, NF1),
-/* USB2_OC2# */ PAD_CFG_NF(GPP_E11, NONE, DEEP, NF1),
-/* USB2_OC3# */ PAD_CFG_NC(GPP_E12),
-/* DDPB_HPD0 */ PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
-/* DDPC_HPD1 */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
-/* DDPD_HPD2 */ PAD_CFG_NC(GPP_E15),
-/* DDPE_HPD3 */ PAD_CFG_GPI_ACPI_SCI(GPP_E16, NONE, PLTRST, NONE),
-/* EDP_HPD */ PAD_CFG_NF(GPP_E17, NONE, DEEP, NF1),
-/* DDPB_CTRLCLK */ PAD_CFG_NF(GPP_E18, NONE, DEEP, NF1),
-/* DDPB_CTRLDATA */ PAD_CFG_NF(GPP_E19, DN_20K, DEEP, NF1),
-/* DDPC_CTRLCLK */ PAD_CFG_NF(GPP_E20, NONE, DEEP, NF1),
-/* DDPC_CTRLDATA */ PAD_CFG_NF(GPP_E21, DN_20K, DEEP, NF1),
-/* DDPD_CTRLCLK */ PAD_CFG_GPI_APIC(GPP_E22, NONE, DEEP),
-/* DDPD_CTRLDATA */ PAD_CFG_TERM_GPO(GPP_E23, 1, DN_20K, DEEP),
-
-/* I2S2_SCLK */ PAD_CFG_NC(GPP_F0),
-/* I2S2_SFRM */ PAD_CFG_NC(GPP_F1),
-/* I2S2_TXD */ PAD_CFG_NC(GPP_F2),
-/* I2S2_RXD */ PAD_CFG_NC(GPP_F3),
-/* I2C2_SDA */ PAD_CFG_NC(GPP_F4),
-/* I2C2_SCL */ PAD_CFG_NC(GPP_F5),
-/* I2C3_SDA */ PAD_CFG_NC(GPP_F6),
-/* I2C3_SCL */ PAD_CFG_NC(GPP_F7),
-/* I2C4_SDA */ PAD_CFG_NF_1V8(GPP_F8, NONE, DEEP, NF1),
-/* I2C4_SCL */ PAD_CFG_NF_1V8(GPP_F9, NONE, DEEP, NF1),
-/* I2C5_SDA */ PAD_CFG_NC(GPP_F10),
-/* I2C5_SCL */ PAD_CFG_NC(GPP_F11),
-/* EMMC_CMD */ PAD_CFG_NC(GPP_F12),
-/* EMMC_DATA0 */ PAD_CFG_NC(GPP_F13),
-/* EMMC_DATA1 */ PAD_CFG_NC(GPP_F14),
-/* EMMC_DATA2 */ PAD_CFG_NC(GPP_F15),
-/* EMMC_DATA3 */ PAD_CFG_NC(GPP_F16),
-/* EMMC_DATA4 */ PAD_CFG_NC(GPP_F17),
-/* EMMC_DATA5 */ PAD_CFG_NC(GPP_F18),
-/* EMMC_DATA6 */ PAD_CFG_NC(GPP_F19),
-/* EMMC_DATA7 */ PAD_CFG_NC(GPP_F20),
-/* EMMC_RCLK */ PAD_CFG_NC(GPP_F21),
-/* EMMC_CLK */ PAD_CFG_NC(GPP_F22),
-/* RSVD */ PAD_CFG_NC(GPP_F23),
-
-/* SD_CMD */ PAD_CFG_NF(GPP_G0, NONE, DEEP, NF1),
-/* SD_DATA0 */ PAD_CFG_NF(GPP_G1, NONE, DEEP, NF1),
-/* SD_DATA1 */ PAD_CFG_NF(GPP_G2, NONE, DEEP, NF1),
-/* SD_DATA2 */ PAD_CFG_NF(GPP_G3, NONE, DEEP, NF1),
-/* SD_DATA3 */ PAD_CFG_NF(GPP_G4, NONE, DEEP, NF1),
-/* SD_CD# */ PAD_CFG_NF(GPP_G5, NONE, DEEP, NF1),
-/* SD_CLK */ PAD_CFG_NF(GPP_G6, NONE, DEEP, NF1),
-/* SD_WP */ PAD_CFG_NF(GPP_G7, UP_20K, DEEP, NF1),
-
-/* BATLOW# */ PAD_CFG_NC(GPD0),
-/* ACPRESENT */ PAD_CFG_NF(GPD1, NONE, PWROK, NF1),
-/* LAN_WAKE# */ PAD_CFG_NC(GPD2),
-/* PWRBTN# */ PAD_CFG_NF(GPD3, UP_20K, PWROK, NF1),
-/* SLP_S3# */ PAD_CFG_NF(GPD4, NONE, PWROK, NF1),
-/* SLP_S4# */ PAD_CFG_NF(GPD5, NONE, PWROK, NF1),
-/* SLP_A# */ PAD_CFG_NF(GPD6, NONE, PWROK, NF1),
-/* RSVD */ PAD_CFG_NC(GPD7),
-/* SUSCLK */ PAD_CFG_NF(GPD8, NONE, PWROK, NF1),
-/* SLP_WLAN# */ PAD_CFG_NF(GPD9, NONE, PWROK, NF1),
-/* SLP_S5# */ PAD_CFG_NF(GPD10, NONE, PWROK, NF1),
-/* LANPHYC */ PAD_CFG_NF(GPD11, NONE, DEEP, NF1),
-};
-
-#endif
-
-#endif
--
2.14.3

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@ -1,40 +0,0 @@
From e6998f87d8d4c389d86586ea66f0ff20cd7751d2 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 9 Feb 2018 18:44:45 -0500
Subject: [PATCH 6/9] purism/librem_skl: Explicitely enable VMX and Intel
SpeedStep
The VMX feature was enabled by default by the FSP but a different
FSP might have it disabled, so this ensures that VMX is explicitely
enabled for the Librem machines. This option however doesn't seem
to work in the FSP since VMX doesn't actually get enabled but as
long as the features MSR remains unlocked, it's not critical.
Enabling Intel SpeedStep Technology ensures the ACPI tables contain
the C-states/P-states which are required for the xen-acpi-processor
module to be loaded. Without it, the Qubes 4.0-rc4 installer will
complain at boot about modules that could not be loaded.
Change-Id: I968ef36ec9382a10db13d96fd3a5c0fc904db387
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index e2e2ac03da..9ce1d91549 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -7,6 +7,9 @@ chip soc/intel/skylake
register "deep_s5_enable_dc" = "0"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
+ register "eist_enable" = "1"
+ register "VmxEnable" = "1"
+
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
--
2.14.3

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@ -1,60 +0,0 @@
From 8c6528caa1a2abcd30bbb0c4fdb4663dc70cb7d4 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Thu, 22 Feb 2018 20:56:04 -0500
Subject: [PATCH 9/9] Add heads TPM measurements to Skylake/Kabylake
---
src/drivers/intel/fsp2_0/memory_init.c | 20 +++++++++++++++++---
1 file changed, 17 insertions(+), 3 deletions(-)
diff --git a/src/drivers/intel/fsp2_0/memory_init.c b/src/drivers/intel/fsp2_0/memory_init.c
index 575f277466..4160b997a4 100644
--- a/src/drivers/intel/fsp2_0/memory_init.c
+++ b/src/drivers/intel/fsp2_0/memory_init.c
@@ -33,6 +33,7 @@
#include <symbols.h>
#include <timestamp.h>
#include <tpm_lite/tlcl.h>
+#include <program_loading.h>
#include <security/vboot/vboot_common.h>
#include <vb2_api.h>
@@ -150,12 +151,14 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
/*
* Initialize the TPM, unless the TPM was already initialized
- * in verstage and used to verify romstage.
+ * in verstage and used to verify romstage, or for measured boot.
*/
if (IS_ENABLED(CONFIG_LPC_TPM) &&
- (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)))
+ (!IS_ENABLED(CONFIG_RESUME_PATH_SAME_AS_BOOT) ||
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK)) &&
+ !IS_ENABLED(CONFIG_MEASURED_BOOT))
init_tpm(s3wake);
+ printk(BIOS_DEBUG, "%s: romstage complete\n", __FILE__);
}
static int mrc_cache_verify_tpm_hash(const uint8_t *data, size_t size)
@@ -484,6 +487,17 @@ void fsp_memory_init(bool s3wake)
if (status != CB_SUCCESS)
die("Loading FSPM failed!\n");
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
+ // we don't know if we are coming out of a resume
+ // at this point, but want to setup the tpm ASAP
+ init_tpm(0);
+ tlcl_lib_init();
+ const void * const bootblock = (const void*) 0xFFFFF800;
+ const unsigned bootblock_size = 0x800;
+ tlcl_measure(0, bootblock, bootblock_size);
+
+ tlcl_measure(1, _romstage, _eromstage - _romstage);
+ }
/* Signal that FSP component has been loaded. */
prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);
--
2.14.3

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@ -1,37 +0,0 @@
From 73c4fda90fdc4bd0bc6b383995d15b2c803cc274 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 2 Mar 2018 14:22:14 -0500
Subject: [PATCH 13/15] intel/cpu: Fix SpeedStep enabling
The IA32_MISC_ENABLE MSR was being overwritten by its old value
right after enabling SpeedStep (eist) which caused it to revert
the call to cpu_enable_eist().
Fixes bug introduced in 6b45ee44.
Change-Id: Id2ac660bf8ea56d45e8c3f631a586b74106a6cc9
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/soc/intel/skylake/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/soc/intel/skylake/cpu.c b/src/soc/intel/skylake/cpu.c
index 291a40da3e..d09a05667e 100644
--- a/src/soc/intel/skylake/cpu.c
+++ b/src/soc/intel/skylake/cpu.c
@@ -260,11 +260,11 @@ static void configure_misc(void)
msr = rdmsr(IA32_MISC_ENABLE);
msr.lo |= (1 << 0); /* Fast String enable */
msr.lo |= (1 << 3); /* TM1/TM2/EMTTM enable */
+ wrmsr(IA32_MISC_ENABLE, msr);
if (conf->eist_enable)
cpu_enable_eist();
else
cpu_disable_eist();
- wrmsr(IA32_MISC_ENABLE, msr);
/* Disable Thermal interrupts */
msr.lo = 0;
--
2.14.3

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@ -1,52 +0,0 @@
From f93f9ac4d9da20749197abc5f272839da5519e1d Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 2 Mar 2018 16:12:04 -0500
Subject: [PATCH 14/15] purism/librem_skl: Set TCC Activation at 95C
Set the Thermal Control Circuit (TCC) activaction value to 95C
even though FSP integration guide says to set it to 100C for SKL-U
(offset at 0), because when the TCC activates at 100C, the CPU
will have already shut itself down from overheating protection.
This was tested on Purism Librem 13 v2. A bisect showed that the
immediate shutdowns happened after commit [1] was merged which led
to this solution.
There is still a temperature ramping problem where a 'stress -c 4'
command will bring the temperature up from 50 to 100C (95C after
this patch) within a few milliseconds, instead of it taking many
dozens of seconds to reach ~80C. A bisect shows this regression
was introduced in commit [2] and still needs to be investigated.
This change may not be necessary anymore once the temperature
ramping problem is fixed, but it is still wise to keep it for
preventing shutdowns in corner cases.
[1] ec5a947b (soc/intel/skylake: make tcc_offset take effect)
[2] fb1cd095 (purism/librem13v2: migrate from FSP 1.1 to 2.0)
Change-Id: Idfc001c8e46ed3b07b24150c961c4b9bc9b71a62
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index 9ce1d91549..159d921046 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -10,6 +10,12 @@ chip soc/intel/skylake
register "eist_enable" = "1"
register "VmxEnable" = "1"
+ # Set the Thermal Control Circuit (TCC) activaction value to 95C
+ # even though FSP integration guide says to set it to 100C for SKL-U
+ # (offset at 0), because when the TCC activates at 100C, the CPU
+ # will have already shut itself down from overheating protection.
+ register "tcc_offset" = "5" # TCC of 95C
+
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
--
2.14.3

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@ -1,39 +0,0 @@
From bdaef1d8aa7cdfb27122665f951932e6e53d6a3d Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 2 Mar 2018 17:03:11 -0500
Subject: [PATCH 15/15] purism/librem_skl: Fix Librem 15 v3 devicetree
configuration
Recent changes to devicetree for librem_skl were only applied
to the librem13v2 variant (Enable SpeedStep, VMX, TCC at 95C),
this fixes it by applying the same fixes for the Librem 15 v3.
Change-Id: I1d5c3ba844c942bd94311f4639612228ff8e07f8
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
.../purism/librem_skl/variants/librem15v3/devicetree.cb | 9 +++++++++
1 file changed, 9 insertions(+)
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index 6cf183a61f..035db18eff 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -7,6 +7,15 @@ chip soc/intel/skylake
register "deep_s5_enable_dc" = "0"
register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
+ register "eist_enable" = "1"
+ register "VmxEnable" = "1"
+
+ # Set the Thermal Control Circuit (TCC) activaction value to 95C
+ # even though FSP integration guide says to set it to 100C for SKL-U
+ # (offset at 0), because when the TCC activates at 100C, the CPU
+ # will have already shut itself down from overheating protection.
+ register "tcc_offset" = "5" # TCC of 95C
+
# GPE configuration
# Note that GPE events called out in ASL code rely on this
# route. i.e. If this route changes then the affected GPE
--
2.14.3

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@ -1,74 +0,0 @@
From c6dd40b67a21bda1d8ec6043f19e4606a3695a05 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Tue, 13 Mar 2018 16:53:30 -0400
Subject: [PATCH 1/3] purism/librem13v1, librem13v2, liberm15v3: Fix EC LPC I/O
port
The LPC I/O ports for communicating with the EC were not set
properly causing ectool to fail to read the Index I/O from the EC.
The EC Index I/O is on port 0x380 and the LPC I/O port needs to be
decoded by the PCI device for it to be accessible.
This fixes it for the Librem 13v1, 13v2 and 15v3.
Change-Id: Ide1d158340eadfabbce5f70ceccddfabb4db188a
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/mainboard/purism/librem13v1/devicetree.cb | 4 ++++
src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 6 +++---
src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 6 +++---
3 files changed, 10 insertions(+), 6 deletions(-)
diff --git a/src/mainboard/purism/librem13v1/devicetree.cb b/src/mainboard/purism/librem13v1/devicetree.cb
index ba38070a55..c916e9a9a4 100644
--- a/src/mainboard/purism/librem13v1/devicetree.cb
+++ b/src/mainboard/purism/librem13v1/devicetree.cb
@@ -18,6 +18,10 @@ chip soc/intel/broadwell
register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms
register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
+ register "gen1_dec" = "0x00000381"
+ register "gen2_dec" = "0x000c0081"
+
# Port 0 is HDD
# Port 3 is M.2 NGFF
register "sata_port_map" = "0x9"
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index 159d921046..da97fb9ea7 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -24,9 +24,9 @@ chip soc/intel/skylake
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
- register "gen1_dec" = "0x00fc0801"
- register "gen2_dec" = "0x000c0201"
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
+ register "gen1_dec" = "0x00000381"
+ register "gen2_dec" = "0x000c0081"
# Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1"
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index 035db18eff..deaf3a6deb 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -24,9 +24,9 @@ chip soc/intel/skylake
register "gpe0_dw1" = "GPP_D"
register "gpe0_dw2" = "GPP_E"
- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
- register "gen1_dec" = "0x00fc0801"
- register "gen2_dec" = "0x000c0201"
+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
+ register "gen1_dec" = "0x00000381"
+ register "gen2_dec" = "0x000c0081"
# Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1"
--
2.14.3

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@ -1,63 +0,0 @@
From 7cb5f11eac45c17bfdd096eb10db3115fc782b5b Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Tue, 13 Mar 2018 16:58:52 -0400
Subject: [PATCH 2/3] ec/purism: Fix the CPU's PPCM value for Turbo when set by
the EC
The EC needs to set the PPCM value to 0, 1 or 2 depending on whether
the Turbo is enabled or not and the value differs from Broadwell and
Skylake machines.
Change-Id: I662dce54415e685c054ffc00b6afde0f1f7765e2
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
src/ec/purism/librem/acpi/ec.asl | 4 ++--
src/mainboard/purism/librem13v1/acpi/ec.asl | 2 ++
src/mainboard/purism/librem_skl/acpi/ec.asl | 2 ++
3 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/src/ec/purism/librem/acpi/ec.asl b/src/ec/purism/librem/acpi/ec.asl
index e95f126c63..ff325aa9a3 100644
--- a/src/ec/purism/librem/acpi/ec.asl
+++ b/src/ec/purism/librem/acpi/ec.asl
@@ -218,11 +218,11 @@ Device (EC)
* when the system is charging.
*/
If (TURB) {
- Store (Zero, PPCM)
+ Store (PPCM_TURBO, PPCM)
PPCN ()
Store (One, EDTB)
} Else {
- Store (One, PPCM)
+ Store (PPCM_NOTURBO, PPCM)
PPCN ()
Store (Zero, EDTB)
}
diff --git a/src/mainboard/purism/librem13v1/acpi/ec.asl b/src/mainboard/purism/librem13v1/acpi/ec.asl
index cf8b9a91d9..b2fa5b9924 100644
--- a/src/mainboard/purism/librem13v1/acpi/ec.asl
+++ b/src/mainboard/purism/librem13v1/acpi/ec.asl
@@ -14,5 +14,7 @@
*/
#define EC_SCI_GPI 10
+#define PPCM_TURBO Zero
+#define PPCM_NOTURBO One
#include <ec/purism/librem/acpi/ec.asl>
diff --git a/src/mainboard/purism/librem_skl/acpi/ec.asl b/src/mainboard/purism/librem_skl/acpi/ec.asl
index 4215213737..c667b6c41b 100644
--- a/src/mainboard/purism/librem_skl/acpi/ec.asl
+++ b/src/mainboard/purism/librem_skl/acpi/ec.asl
@@ -14,5 +14,7 @@
*/
#define EC_SCI_GPI 0x50
+#define PPCM_TURBO One
+#define PPCM_NOTURBO 0x02
#include <ec/purism/librem/acpi/ec.asl>
--
2.14.3

View File

@ -1,194 +0,0 @@
From 7ac4919b8af16b62fb63592dbdd43ca9215c0cf7 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Tue, 20 Mar 2018 18:32:23 -0400
Subject: [PATCH 3/3] purism/librem_skl: Add AC/DC LoadLine to VR Config
The FSP 2.0 needs to set the ac_loadline and dc_loadline for
each VR config. Without it, the Loadline is considered to be
0 mOhm and this causes CPU temp to jump all over the place
whenever the CPU is used.
These values were copied from the Google Poppy devicetree.
Change-Id: I6aeb6ee521988b94f2ae94a60d1a28b87ba984d4
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
.../librem_skl/variants/librem13v2/devicetree.cb | 40 ++++++++++++++--------
.../librem_skl/variants/librem15v3/devicetree.cb | 40 ++++++++++++++--------
2 files changed, 50 insertions(+), 30 deletions(-)
diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index da97fb9ea7..a08a3df5f4 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -31,8 +31,8 @@ chip soc/intel/skylake
# Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1"
- # Enable DPTF
- register "dptf_enable" = "1"
+ # Disable DPTF
+ register "dptf_enable" = "0"
# FSP Configuration
register "ProbelessTrace" = "0"
@@ -82,19 +82,21 @@ chip soc/intel/skylake
register "pirqh_routing" = "PCH_IRQ11"
# VR Settings Configuration for 4 Domains
- #+----------------+-------+-------+-------------+-------+
- #| Domain/Setting | SA | IA | GT Unsliced | GT |
- #+----------------+-------+-------+-------------+-------+
- #| Psi1Threshold | 20A | 20A | 20A | 20A |
- #| Psi2Threshold | 4A | 5A | 5A | 5A |
- #| Psi3Threshold | 1A | 1A | 1A | 1A |
- #| Psi3Enable | 1 | 1 | 1 | 1 |
- #| Psi4Enable | 1 | 1 | 1 | 1 |
- #| ImonSlope | 0 | 0 | 0 | 0 |
- #| ImonOffset | 0 | 0 | 0 | 0 |
- #| IccMax | 7A | 34A | 35A | 35A |
- #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
- #+----------------+-------+-------+-------------+-------+
+ #+----------------+-----------+-----------+-------------+----------+
+ #| Domain/Setting | SA | IA | GT Unsliced | GT |
+ #+----------------+-----------+-----------+-------------+----------+
+ #| Psi1Threshold | 20A | 20A | 20A | 20A |
+ #| Psi2Threshold | 4A | 5A | 5A | 5A |
+ #| Psi3Threshold | 1A | 1A | 1A | 1A |
+ #| Psi3Enable | 1 | 1 | 1 | 1 |
+ #| Psi4Enable | 1 | 1 | 1 | 1 |
+ #| ImonSlope | 0 | 0 | 0 | 0 |
+ #| ImonOffset | 0 | 0 | 0 | 0 |
+ #| IccMax | 7A | 34A | 35A | 35A |
+ #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
+ #| AC LoadLine | 15 mOhm | 5.7 mOhm | 5.2 mOhm | 5.2 mOhm |
+ #| DC LoadLine | 14.3 mOhm | 4.83 mOhm | 4.2 mOhm | 4.2 mOhm |
+ #+----------------+-----------+-----------+-------------+----------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1,
.psi1threshold = VR_CFG_AMP(20),
@@ -106,6 +108,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(7),
.voltage_limit = 1520,
+ .ac_loadline = 1500,
+ .dc_loadline = 1430,
}"
register "domain_vr_config[VR_IA_CORE]" = "{
@@ -119,6 +123,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(34),
.voltage_limit = 1520,
+ .ac_loadline = 570,
+ .dc_loadline = 483,
}"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
@@ -132,6 +138,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(35),
.voltage_limit = 1520,
+ .ac_loadline = 520,
+ .dc_loadline = 420,
}"
register "domain_vr_config[VR_GT_SLICED]" = "{
@@ -145,6 +153,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(35),
.voltage_limit = 1520,
+ .ac_loadline = 520,
+ .dc_loadline = 420,
}"
# Enable Root Ports 5 and 9
diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
index deaf3a6deb..7dff719096 100644
--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
@@ -31,8 +31,8 @@ chip soc/intel/skylake
# Enable "Intel Speed Shift Technology"
register "speed_shift_enable" = "1"
- # Enable DPTF
- register "dptf_enable" = "1"
+ # Disable DPTF
+ register "dptf_enable" = "0"
# FSP Configuration
register "ProbelessTrace" = "0"
@@ -82,19 +82,21 @@ chip soc/intel/skylake
register "pirqh_routing" = "PCH_IRQ11"
# VR Settings Configuration for 4 Domains
- #+----------------+-------+-------+-------------+-------+
- #| Domain/Setting | SA | IA | GT Unsliced | GT |
- #+----------------+-------+-------+-------------+-------+
- #| Psi1Threshold | 20A | 20A | 20A | 20A |
- #| Psi2Threshold | 4A | 5A | 5A | 5A |
- #| Psi3Threshold | 1A | 1A | 1A | 1A |
- #| Psi3Enable | 1 | 1 | 1 | 1 |
- #| Psi4Enable | 1 | 1 | 1 | 1 |
- #| ImonSlope | 0 | 0 | 0 | 0 |
- #| ImonOffset | 0 | 0 | 0 | 0 |
- #| IccMax | 7A | 34A | 35A | 35A |
- #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
- #+----------------+-------+-------+-------------+-------+
+ #+----------------+-----------+-----------+-------------+----------+
+ #| Domain/Setting | SA | IA | GT Unsliced | GT |
+ #+----------------+-----------+-----------+-------------+----------+
+ #| Psi1Threshold | 20A | 20A | 20A | 20A |
+ #| Psi2Threshold | 4A | 5A | 5A | 5A |
+ #| Psi3Threshold | 1A | 1A | 1A | 1A |
+ #| Psi3Enable | 1 | 1 | 1 | 1 |
+ #| Psi4Enable | 1 | 1 | 1 | 1 |
+ #| ImonSlope | 0 | 0 | 0 | 0 |
+ #| ImonOffset | 0 | 0 | 0 | 0 |
+ #| IccMax | 7A | 34A | 35A | 35A |
+ #| VrVoltageLimit | 1.52V | 1.52V | 1.52V | 1.52V |
+ #| AC LoadLine | 15 mOhm | 5.7 mOhm | 5.2 mOhm | 5.2 mOhm |
+ #| DC LoadLine | 14.3 mOhm | 4.83 mOhm | 4.2 mOhm | 4.2 mOhm |
+ #+----------------+-----------+-----------+-------------+----------+
register "domain_vr_config[VR_SYSTEM_AGENT]" = "{
.vr_config_enable = 1,
.psi1threshold = VR_CFG_AMP(20),
@@ -106,6 +108,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(7),
.voltage_limit = 1520,
+ .ac_loadline = 1500,
+ .dc_loadline = 1430,
}"
register "domain_vr_config[VR_IA_CORE]" = "{
@@ -119,6 +123,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(34),
.voltage_limit = 1520,
+ .ac_loadline = 570,
+ .dc_loadline = 483,
}"
register "domain_vr_config[VR_GT_UNSLICED]" = "{
@@ -132,6 +138,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(35),
.voltage_limit = 1520,
+ .ac_loadline = 520,
+ .dc_loadline = 420,
}"
register "domain_vr_config[VR_GT_SLICED]" = "{
@@ -145,6 +153,8 @@ chip soc/intel/skylake
.imon_offset = 0x0,
.icc_max = VR_CFG_AMP(35),
.voltage_limit = 1520,
+ .ac_loadline = 520,
+ .dc_loadline = 420,
}"
# Enable Root Ports 5 and 9
--
2.14.3

View File

@ -1,8 +1,8 @@
diff --git ./src/Kconfig ./src/Kconfig diff --git ./src/Kconfig ./src/Kconfig
index 6896d0e..577bd52 100644 index 99a704d..004b4a7 100644
--- ./src/Kconfig --- ./src/Kconfig
+++ ./src/Kconfig +++ ./src/Kconfig
@@ -253,6 +253,21 @@ config BOOTSPLASH_FILE @@ -260,6 +260,21 @@ config BOOTSPLASH_FILE
The path and filename of the file to use as graphical bootsplash The path and filename of the file to use as graphical bootsplash
screen. The file format has to be jpg. screen. The file format has to be jpg.
@ -25,7 +25,7 @@ index 6896d0e..577bd52 100644
menu "Mainboard" menu "Mainboard"
diff --git ./src/drivers/pc80/tpm/romstage.c ./src/drivers/pc80/tpm/romstage.c diff --git ./src/drivers/pc80/tpm/romstage.c ./src/drivers/pc80/tpm/romstage.c
index 5531458..95e65f2 100644 index b8e4705..7732e66 100644
--- ./src/drivers/pc80/tpm/romstage.c --- ./src/drivers/pc80/tpm/romstage.c
+++ ./src/drivers/pc80/tpm/romstage.c +++ ./src/drivers/pc80/tpm/romstage.c
@@ -48,6 +48,12 @@ static const struct { @@ -48,6 +48,12 @@ static const struct {
@ -60,10 +60,10 @@ index 5531458..95e65f2 100644
} }
tis_close(); tis_close();
diff --git ./src/drivers/pc80/tpm/tpm.c ./src/drivers/pc80/tpm/tpm.c diff --git ./src/drivers/pc80/tpm/tis.c ./src/drivers/pc80/tpm/tis.c
index 574d3af..9bdc73f 100644 index 3549173..11fc027 100644
--- ./src/drivers/pc80/tpm/tpm.c --- ./src/drivers/pc80/tpm/tis.c
+++ ./src/drivers/pc80/tpm/tpm.c +++ ./src/drivers/pc80/tpm/tis.c
@@ -125,10 +125,11 @@ static const struct device_name atmel_devices[] = { @@ -125,10 +125,11 @@ static const struct device_name atmel_devices[] = {
static const struct device_name infineon_devices[] = { static const struct device_name infineon_devices[] = {
@ -78,7 +78,7 @@ index 574d3af..9bdc73f 100644
#endif #endif
{0xffff} {0xffff}
diff --git ./src/include/program_loading.h ./src/include/program_loading.h diff --git ./src/include/program_loading.h ./src/include/program_loading.h
index 416e2e9..40486cd 100644 index 7aba302..879c26e 100644
--- ./src/include/program_loading.h --- ./src/include/program_loading.h
+++ ./src/include/program_loading.h +++ ./src/include/program_loading.h
@@ -24,6 +24,8 @@ enum { @@ -24,6 +24,8 @@ enum {
@ -89,84 +89,12 @@ index 416e2e9..40486cd 100644
+ SEG_NO_MEASURE = 1 << 1, + SEG_NO_MEASURE = 1 << 1,
}; };
enum prog_type { // The prog_type is a bit mask, so that in searches one can find, e.g.,
diff --git ./src/include/sha1.h ./src/include/sha1.h
new file mode 100644
index 0000000..e7e28e6
--- /dev/null
+++ ./src/include/sha1.h
@@ -0,0 +1,31 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* SHA-1 functions */
+
+#ifndef _sha1_h_
+#define _sha1_h_
+
+#include <stdint.h>
+#include <commonlib/helpers.h>
+
+#define SHA1_DIGEST_SIZE 20
+#define SHA1_BLOCK_SIZE 64
+
+/* SHA-1 context */
+struct sha1_ctx {
+ uint32_t count;
+ uint32_t state[5];
+ union {
+ uint8_t b[SHA1_BLOCK_SIZE];
+ uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))];
+ } buf;
+};
+
+void sha1_init(struct sha1_ctx *ctx);
+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len);
+uint8_t *sha1_final(struct sha1_ctx *ctx);
+
+#endif /* _sha1_h_ */
diff --git ./src/include/tpm_lite/tlcl.h ./src/include/tpm_lite/tlcl.h
index 8dd5d80..15fbebf 100644
--- ./src/include/tpm_lite/tlcl.h
+++ ./src/include/tpm_lite/tlcl.h
@@ -147,6 +147,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
uint8_t *out_digest);
/**
+ * Perform a SHA1 hash on a region and extend a PCR with the hash.
+ */
+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len);
+
+/**
* Get the entire set of permanent flags.
*/
uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags);
diff --git ./src/lib/Makefile.inc ./src/lib/Makefile.inc
index 25537d2..5248483 100644
--- ./src/lib/Makefile.inc
+++ ./src/lib/Makefile.inc
@@ -57,8 +57,13 @@ verstage-$(CONFIG_TPM) += tlcl.c
verstage-$(CONFIG_TPM2) += tpm2_marshaling.c
verstage-$(CONFIG_TPM2) += tpm2_tlcl.c
-ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
+# Add the TPM support into the ROM stage for measuring the bootblock
romstage-$(CONFIG_TPM) += tlcl.c
+romstage-$(CONFIG_TPM) += sha1.c
+ramstage-$(CONFIG_TPM) += tlcl.c
+ramstage-$(CONFIG_TPM) += sha1.c
+
+ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
romstage-$(CONFIG_TPM2) += tpm2_marshaling.c
romstage-$(CONFIG_TPM2) += tpm2_tlcl.c
endif # CONFIG_VBOOT_SEPARATE_VERSTAGE
diff --git ./src/lib/cbfs.c ./src/lib/cbfs.c diff --git ./src/lib/cbfs.c ./src/lib/cbfs.c
index 596abc5..f1928ce 100644 index 87ab387..708d321 100644
--- ./src/lib/cbfs.c --- ./src/lib/cbfs.c
+++ ./src/lib/cbfs.c +++ ./src/lib/cbfs.c
@@ -69,7 +69,13 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size) @@ -70,7 +70,13 @@ void *cbfs_boot_map_with_leak(const char *name, uint32_t type, size_t *size)
if (size != NULL) if (size != NULL)
*size = fsize; *size = fsize;
@ -181,7 +109,7 @@ index 596abc5..f1928ce 100644
} }
int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name, int cbfs_locate_file_in_region(struct cbfsf *fh, const char *region_name,
@@ -97,7 +101,8 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset, @@ -98,7 +104,8 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
return 0; return 0;
if (rdev_readat(rdev, buffer, offset, in_size) != in_size) if (rdev_readat(rdev, buffer, offset, in_size) != in_size)
return 0; return 0;
@ -191,7 +119,7 @@ index 596abc5..f1928ce 100644
case CBFS_COMPRESS_LZ4: case CBFS_COMPRESS_LZ4:
if ((ENV_BOOTBLOCK || ENV_VERSTAGE) && if ((ENV_BOOTBLOCK || ENV_VERSTAGE) &&
@@ -115,7 +120,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset, @@ -116,7 +123,7 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
timestamp_add_now(TS_START_ULZ4F); timestamp_add_now(TS_START_ULZ4F);
out_size = ulz4fn(compr_start, in_size, buffer, buffer_size); out_size = ulz4fn(compr_start, in_size, buffer, buffer_size);
timestamp_add_now(TS_END_ULZ4F); timestamp_add_now(TS_END_ULZ4F);
@ -200,7 +128,7 @@ index 596abc5..f1928ce 100644
case CBFS_COMPRESS_LZMA: case CBFS_COMPRESS_LZMA:
if (ENV_BOOTBLOCK || ENV_VERSTAGE) if (ENV_BOOTBLOCK || ENV_VERSTAGE)
@@ -134,11 +139,15 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset, @@ -135,11 +142,15 @@ size_t cbfs_load_and_decompress(const struct region_device *rdev, size_t offset,
rdev_munmap(rdev, map); rdev_munmap(rdev, map);
@ -218,18 +146,18 @@ index 596abc5..f1928ce 100644
static inline int tohex4(unsigned int c) static inline int tohex4(unsigned int c)
diff --git ./src/lib/hardwaremain.c ./src/lib/hardwaremain.c diff --git ./src/lib/hardwaremain.c ./src/lib/hardwaremain.c
index 0deab4b..eee5415 100644 index 6fd55d7..b5b7d91 100644
--- ./src/lib/hardwaremain.c --- ./src/lib/hardwaremain.c
+++ ./src/lib/hardwaremain.c +++ ./src/lib/hardwaremain.c
@@ -32,6 +32,7 @@ @@ -33,6 +33,7 @@
#include <reset.h> #include <reset.h>
#include <boot/tables.h> #include <boot/tables.h>
#include <program_loading.h> #include <program_loading.h>
+#include <tpm_lite/tlcl.h> +#include <security/tpm/tss.h>
#include <lib.h> #include <lib.h>
#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) #if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME)
#include <arch/acpi.h> #include <arch/acpi.h>
@@ -544,3 +545,13 @@ void boot_state_current_unblock(void) @@ -545,3 +546,13 @@ void boot_state_current_unblock(void)
{ {
boot_state_unblock(current_phase.state_id, current_phase.seq); boot_state_unblock(current_phase.state_id, current_phase.seq);
} }
@ -256,11 +184,31 @@ index 66d5120..b50afe7 100644
return 0; return 0;
} }
diff --git ./src/lib/sha1.c ./src/lib/sha1.c diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
index 2385635..0743a84 100644
--- ./src/security/tpm/Makefile.inc
+++ ./src/security/tpm/Makefile.inc
@@ -4,6 +4,15 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
+ifeq ($(CONFIG_MEASURED_BOOT),y)
+ifneq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
+romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
+endif
+romstage-$(CONFIG_TPM) += sha1.c
+ramstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
+ramstage-$(CONFIG_TPM) += sha1.c
+endif # CONFIG_MEASURED_BOOT
+
ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
diff --git ./src/security/tpm/sha1.c ./src/security/tpm/sha1.c
new file mode 100644 new file mode 100644
index 0000000..506907f index 0000000..6b154f8
--- /dev/null --- /dev/null
+++ ./src/lib/sha1.c +++ ./src/security/tpm/sha1.c
@@ -0,0 +1,175 @@ @@ -0,0 +1,175 @@
+/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved. +/* Copyright (c) 2010 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be + * Use of this source code is governed by a BSD-style license that can be
@ -270,7 +218,7 @@ index 0000000..506907f
+ * Open Source Project (platorm/system/core.git/libmincrypt/sha.c + * Open Source Project (platorm/system/core.git/libmincrypt/sha.c
+ */ + */
+ +
+#include "sha1.h" +#include <security/tpm/sha1.h>
+#include <string.h> +#include <string.h>
+ +
+static uint32_t ror27(uint32_t val) +static uint32_t ror27(uint32_t val)
@ -437,19 +385,72 @@ index 0000000..506907f
+ ctx->state[4] = 0xC3D2E1F0; + ctx->state[4] = 0xC3D2E1F0;
+ ctx->count = 0; + ctx->count = 0;
+} +}
diff --git ./src/lib/tlcl.c ./src/lib/tlcl.c diff --git ./src/security/tpm/sha1.h ./src/security/tpm/sha1.h
index 49854cb..32eb128 100644 new file mode 100644
--- ./src/lib/tlcl.c index 0000000..e7e28e6
+++ ./src/lib/tlcl.c --- /dev/null
@@ -19,6 +19,7 @@ +++ ./src/security/tpm/sha1.h
@@ -0,0 +1,31 @@
+/* Copyright (c) 2014 The Chromium OS Authors. All rights reserved.
+ * Use of this source code is governed by a BSD-style license that can be
+ * found in the LICENSE file.
+ */
+
+/* SHA-1 functions */
+
+#ifndef _sha1_h_
+#define _sha1_h_
+
+#include <stdint.h>
+#include <commonlib/helpers.h>
+
+#define SHA1_DIGEST_SIZE 20
+#define SHA1_BLOCK_SIZE 64
+
+/* SHA-1 context */
+struct sha1_ctx {
+ uint32_t count;
+ uint32_t state[5];
+ union {
+ uint8_t b[SHA1_BLOCK_SIZE];
+ uint32_t w[DIV_ROUND_UP(SHA1_BLOCK_SIZE, sizeof(uint32_t))];
+ } buf;
+};
+
+void sha1_init(struct sha1_ctx *ctx);
+void sha1_update(struct sha1_ctx *ctx, const uint8_t *data, uint32_t len);
+uint8_t *sha1_final(struct sha1_ctx *ctx);
+
+#endif /* _sha1_h_ */
diff --git ./src/security/tpm/tss.h ./src/security/tpm/tss.h
index 8f3f1cb..5c569cb 100644
--- ./src/security/tpm/tss.h
+++ ./src/security/tpm/tss.h
@@ -147,6 +147,11 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
uint8_t *out_digest);
/**
+ * Perform a SHA1 hash on a region and extend a PCR with the hash.
+ */
+uint32_t tlcl_measure(int pcr_num, const void * start, size_t len);
+
+/**
* Get the entire set of permanent flags.
*/
uint32_t tlcl_get_permanent_flags(TPM_PERMANENT_FLAGS *pflags);
diff --git ./src/security/tpm/tss/tcg-1.2/tss.c ./src/security/tpm/tss/tcg-1.2/tss.c
index 161d29f..95e55b9 100644
--- ./src/security/tpm/tss/tcg-1.2/tss.c
+++ ./src/security/tpm/tss/tcg-1.2/tss.c
@@ -17,6 +17,7 @@
#include <arch/early_variables.h>
#include <assert.h>
#include <string.h> #include <string.h>
#include <tpm_lite/tlcl.h> +#include <security/tpm/sha1.h>
#include <tpm.h> #include <security/tpm/tis.h>
+#include <sha1.h>
#include <vb2_api.h> #include <vb2_api.h>
#include "tlcl_internal.h" #include <security/tpm/tss.h>
#include "tlcl_structures.h" @@ -354,3 +355,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
@@ -351,3 +352,23 @@ uint32_t tlcl_extend(int pcr_num, const uint8_t *in_digest,
kPcrDigestLength); kPcrDigestLength);
return result; return result;
} }

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@ -0,0 +1,92 @@
From f45b4209ecbd231e3f5077eb90ce29bdc83bd6b3 Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@puri.sm>
Date: Fri, 18 Jan 2019 22:57:33 -0600
Subject: [PATCH 1/2] mb/purism/librem_skl: add support for 13v4/15v4 boards
Add support for Kabylake Librem 13v4/15v4 boards, reusing existing 13v2/15v3
variants since board design unchanged (only SoC).
Adjust identification strings, add Kabylake VGA PCI ID.
Signed-off-by: Matt DeVillier <matt.devillier@puri.sm>
---
src/mainboard/purism/librem_skl/Kconfig | 16 +++++++++++++---
src/mainboard/purism/librem_skl/Kconfig.name | 8 ++++++++
2 files changed, 21 insertions(+), 3 deletions(-)
diff --git a/src/mainboard/purism/librem_skl/Kconfig b/src/mainboard/purism/librem_skl/Kconfig
index bbb6b7443f..36fe04da06 100644
--- a/src/mainboard/purism/librem_skl/Kconfig
+++ b/src/mainboard/purism/librem_skl/Kconfig
@@ -25,6 +25,8 @@ config VARIANT_DIR
string
default "librem13v2" if BOARD_PURISM_LIBREM13_V2
default "librem15v3" if BOARD_PURISM_LIBREM15_V3
+ default "librem13v2" if BOARD_PURISM_LIBREM13_V4
+ default "librem15v3" if BOARD_PURISM_LIBREM15_V4
config MAINBOARD_VENDOR
string
@@ -34,16 +36,22 @@ config MAINBOARD_FAMILY
string
default "Librem 13" if BOARD_PURISM_LIBREM13_V2
default "Librem 15" if BOARD_PURISM_LIBREM15_V3
+ default "Librem 13" if BOARD_PURISM_LIBREM13_V4
+ default "Librem 15" if BOARD_PURISM_LIBREM15_V4
config MAINBOARD_PART_NUMBER
string
default "Librem 13 v2" if BOARD_PURISM_LIBREM13_V2
default "Librem 15 v3" if BOARD_PURISM_LIBREM15_V3
+ default "Librem 13 v4" if BOARD_PURISM_LIBREM13_V4
+ default "Librem 15 v4" if BOARD_PURISM_LIBREM15_V4
config MAINBOARD_VERSION
string
default "2.0" if BOARD_PURISM_LIBREM13_V2
default "3.0" if BOARD_PURISM_LIBREM15_V3
+ default "4.0" if BOARD_PURISM_LIBREM13_V4
+ default "4.0" if BOARD_PURISM_LIBREM15_V4
config MAINBOARD_DIR
string
@@ -51,8 +59,7 @@ config MAINBOARD_DIR
config DEVICETREE
string
- default "variants/librem13v2/devicetree.cb" if BOARD_PURISM_LIBREM13_V2
- default "variants/librem15v3/devicetree.cb" if BOARD_PURISM_LIBREM15_V3
+ default "variants/$(CONFIG_VARIANT_DIR)/devicetree.cb"
config MAX_CPUS
int
@@ -66,7 +73,10 @@ config NO_POST
config VGA_BIOS_ID
string
- default "8086,1916"
+ default "8086,1916" if BOARD_PURISM_LIBREM13_V2
+ default "8086,1916" if BOARD_PURISM_LIBREM15_V3
+ default "8086,5916" if BOARD_PURISM_LIBREM13_V4
+ default "8086,5916" if BOARD_PURISM_LIBREM15_V4
config DIMM_MAX
int
diff --git a/src/mainboard/purism/librem_skl/Kconfig.name b/src/mainboard/purism/librem_skl/Kconfig.name
index 3f43f68752..6a66e45950 100644
--- a/src/mainboard/purism/librem_skl/Kconfig.name
+++ b/src/mainboard/purism/librem_skl/Kconfig.name
@@ -5,3 +5,11 @@ config BOARD_PURISM_LIBREM13_V2
config BOARD_PURISM_LIBREM15_V3
bool "Librem 15 v3"
select BOARD_PURISM_BASEBOARD_LIBREM_SKL
+
+config BOARD_PURISM_LIBREM13_V4
+ bool "Librem 13 v4"
+ select BOARD_PURISM_BASEBOARD_LIBREM_SKL
+
+config BOARD_PURISM_LIBREM15_V4
+ bool "Librem 15 v4"
+ select BOARD_PURISM_BASEBOARD_LIBREM_SKL
--
2.19.1

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@ -0,0 +1,357 @@
From e40c2710e715fc7fed344189227bd048652268f1 Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@gmail.com>
Date: Thu, 29 Mar 2018 14:59:57 +0200
Subject: [PATCH 2/2] arch/x86/acpi: Add DMAR RMRR helper functions
Add DMAR RMRR table entry and helper functions, using the existing
DRHD functions as a model. As the DRHD device scope (DS) functions
aren't DRHD-specific, genericize them to be used with RMRR tables as
well. Correct DRHD bar size to match table entry in creator function,
as noted in comments from patchset below.
Adapted from/supersedes https://review.coreboot.org/25445
Change-Id: I912b1d7244ca4dd911bb6629533d453b1b4a06be
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27269
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
src/arch/x86/acpi.c | 40 ++++++++++++++++++------
src/arch/x86/include/arch/acpi.h | 22 ++++++++++---
src/northbridge/intel/gm45/acpi.c | 14 ++++-----
src/northbridge/intel/haswell/acpi.c | 6 ++--
src/northbridge/intel/sandybridge/acpi.c | 8 ++---
src/soc/intel/broadwell/acpi.c | 6 ++--
src/soc/intel/fsp_broadwell_de/acpi.c | 8 ++---
src/soc/intel/skylake/acpi.c | 6 ++--
8 files changed, 71 insertions(+), 39 deletions(-)
diff --git a/src/arch/x86/acpi.c b/src/arch/x86/acpi.c
index 8b6b2c1d28..60d2879219 100644
--- a/src/arch/x86/acpi.c
+++ b/src/arch/x86/acpi.c
@@ -449,7 +449,7 @@ void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
}
unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
- u16 segment, u32 bar)
+ u16 segment, u64 bar)
{
dmar_entry_t *drhd = (dmar_entry_t *)current;
memset(drhd, 0, sizeof(*drhd));
@@ -462,6 +462,20 @@ unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
return drhd->length;
}
+unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
+ u64 bar, u64 limit)
+{
+ dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)current;
+ memset(rmrr, 0, sizeof(*rmrr));
+ rmrr->type = DMAR_RMRR;
+ rmrr->length = sizeof(*rmrr); /* will be fixed up later */
+ rmrr->segment = segment;
+ rmrr->bar = bar;
+ rmrr->limit = limit;
+
+ return rmrr->length;
+}
+
unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
u16 segment)
{
@@ -481,13 +495,19 @@ void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current)
drhd->length = current - base;
}
+void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current)
+{
+ dmar_rmrr_entry_t *rmrr = (dmar_rmrr_entry_t *)base;
+ rmrr->length = current - base;
+}
+
void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current)
{
dmar_atsr_entry_t *atsr = (dmar_atsr_entry_t *)base;
atsr->length = current - base;
}
-static unsigned long acpi_create_dmar_drhd_ds(unsigned long current,
+static unsigned long acpi_create_dmar_ds(unsigned long current,
enum dev_scope_type type, u8 enumeration_id, u8 bus, u8 dev, u8 fn)
{
/* we don't support longer paths yet */
@@ -505,31 +525,31 @@ static unsigned long acpi_create_dmar_drhd_ds(unsigned long current,
return ds->length;
}
-unsigned long acpi_create_dmar_drhd_ds_pci_br(unsigned long current, u8 bus,
+unsigned long acpi_create_dmar_ds_pci_br(unsigned long current, u8 bus,
u8 dev, u8 fn)
{
- return acpi_create_dmar_drhd_ds(current,
+ return acpi_create_dmar_ds(current,
SCOPE_PCI_SUB, 0, bus, dev, fn);
}
-unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current, u8 bus,
+unsigned long acpi_create_dmar_ds_pci(unsigned long current, u8 bus,
u8 dev, u8 fn)
{
- return acpi_create_dmar_drhd_ds(current,
+ return acpi_create_dmar_ds(current,
SCOPE_PCI_ENDPOINT, 0, bus, dev, fn);
}
-unsigned long acpi_create_dmar_drhd_ds_ioapic(unsigned long current,
+unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
u8 enumeration_id, u8 bus, u8 dev, u8 fn)
{
- return acpi_create_dmar_drhd_ds(current,
+ return acpi_create_dmar_ds(current,
SCOPE_IOAPIC, enumeration_id, bus, dev, fn);
}
-unsigned long acpi_create_dmar_drhd_ds_msi_hpet(unsigned long current,
+unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
u8 enumeration_id, u8 bus, u8 dev, u8 fn)
{
- return acpi_create_dmar_drhd_ds(current,
+ return acpi_create_dmar_ds(current,
SCOPE_MSI_HPET, enumeration_id, bus, dev, fn);
}
diff --git a/src/arch/x86/include/arch/acpi.h b/src/arch/x86/include/arch/acpi.h
index 5480834eb2..5be2e6399e 100644
--- a/src/arch/x86/include/arch/acpi.h
+++ b/src/arch/x86/include/arch/acpi.h
@@ -331,6 +331,15 @@ typedef struct dmar_entry {
u64 bar;
} __packed dmar_entry_t;
+typedef struct dmar_rmrr_entry {
+ u16 type;
+ u16 length;
+ u16 reserved;
+ u16 segment;
+ u64 bar;
+ u64 limit;
+} __packed dmar_rmrr_entry_t;
+
typedef struct dmar_atsr_entry {
u16 type;
u16 length;
@@ -738,19 +747,22 @@ unsigned long acpi_write_dbg2_pci_uart(acpi_rsdp_t *rsdp, unsigned long current,
void acpi_create_dmar(acpi_dmar_t *dmar, enum dmar_flags flags,
unsigned long (*acpi_fill_dmar)(unsigned long));
unsigned long acpi_create_dmar_drhd(unsigned long current, u8 flags,
- u16 segment, u32 bar);
+ u16 segment, u64 bar);
+unsigned long acpi_create_dmar_rmrr(unsigned long current, u16 segment,
+ u64 bar, u64 limit);
unsigned long acpi_create_dmar_atsr(unsigned long current, u8 flags,
u16 segment);
void acpi_dmar_drhd_fixup(unsigned long base, unsigned long current);
+void acpi_dmar_rmrr_fixup(unsigned long base, unsigned long current);
void acpi_dmar_atsr_fixup(unsigned long base, unsigned long current);
-unsigned long acpi_create_dmar_drhd_ds_pci_br(unsigned long current,
+unsigned long acpi_create_dmar_ds_pci_br(unsigned long current,
u8 bus, u8 dev, u8 fn);
-unsigned long acpi_create_dmar_drhd_ds_pci(unsigned long current,
+unsigned long acpi_create_dmar_ds_pci(unsigned long current,
u8 bus, u8 dev, u8 fn);
-unsigned long acpi_create_dmar_drhd_ds_ioapic(unsigned long current,
+unsigned long acpi_create_dmar_ds_ioapic(unsigned long current,
u8 enumeration_id,
u8 bus, u8 dev, u8 fn);
-unsigned long acpi_create_dmar_drhd_ds_msi_hpet(unsigned long current,
+unsigned long acpi_create_dmar_ds_msi_hpet(unsigned long current,
u8 enumeration_id,
u8 bus, u8 dev, u8 fn);
void acpi_write_hest(acpi_hest_t *hest,
diff --git a/src/northbridge/intel/gm45/acpi.c b/src/northbridge/intel/gm45/acpi.c
index 73b098f610..d208eed4ab 100644
--- a/src/northbridge/intel/gm45/acpi.c
+++ b/src/northbridge/intel/gm45/acpi.c
@@ -78,24 +78,24 @@ static unsigned long acpi_fill_dmar(unsigned long current)
unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x1b, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x1b, 0);
acpi_dmar_drhd_fixup(tmp, current);
if (stepping != STEPPING_B2) {
tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE2);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 0);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x2, 1);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x2, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x2, 1);
acpi_dmar_drhd_fixup(tmp, current);
}
if (me_active) {
tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE3);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 0);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 1);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 2);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 0x3, 3);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 1);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 2);
+ current += acpi_create_dmar_ds_pci(current, 0, 0x3, 3);
acpi_dmar_drhd_fixup(tmp, current);
}
diff --git a/src/northbridge/intel/haswell/acpi.c b/src/northbridge/intel/haswell/acpi.c
index 9d76ba8ce2..3cd3bc0730 100644
--- a/src/northbridge/intel/haswell/acpi.c
+++ b/src/northbridge/intel/haswell/acpi.c
@@ -85,7 +85,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
acpi_dmar_drhd_fixup(tmp, current);
}
@@ -95,11 +95,11 @@ static unsigned long acpi_fill_dmar(unsigned long current)
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current,
DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
size_t i;
for (i = 0; i < 8; ++i)
- current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ current += acpi_create_dmar_ds_msi_hpet(current,
0, PCH_HPET_PCI_BUS,
PCH_HPET_PCI_SLOT, i);
acpi_dmar_drhd_fixup(tmp, current);
diff --git a/src/northbridge/intel/sandybridge/acpi.c b/src/northbridge/intel/sandybridge/acpi.c
index 91ecac5956..88ac2b1e38 100644
--- a/src/northbridge/intel/sandybridge/acpi.c
+++ b/src/northbridge/intel/sandybridge/acpi.c
@@ -74,19 +74,19 @@ static unsigned long acpi_fill_dmar(unsigned long current)
if (igfx && igfx->enabled) {
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, IOMMU_BASE1);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 1);
+ current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 2, 1);
acpi_dmar_drhd_fixup(tmp, current);
}
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current,
DRHD_INCLUDE_PCI_ALL, 0, IOMMU_BASE2);
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
size_t i;
for (i = 0; i < 8; ++i)
- current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ current += acpi_create_dmar_ds_msi_hpet(current,
0, PCH_HPET_PCI_BUS, PCH_HPET_PCI_SLOT, i);
acpi_dmar_drhd_fixup(tmp, current);
diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c
index 162542fe3e..a1df089fd7 100644
--- a/src/soc/intel/broadwell/acpi.c
+++ b/src/soc/intel/broadwell/acpi.c
@@ -586,7 +586,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfxvtbar);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
acpi_dmar_drhd_fixup(tmp, current);
}
@@ -596,11 +596,11 @@ static unsigned long acpi_fill_dmar(unsigned long current)
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current,
DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
2, PCH_IOAPIC_PCI_BUS, PCH_IOAPIC_PCI_SLOT, 0);
size_t i;
for (i = 0; i < 8; ++i)
- current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ current += acpi_create_dmar_ds_msi_hpet(current,
0, PCH_HPET_PCI_BUS,
PCH_HPET_PCI_SLOT, i);
acpi_dmar_drhd_fixup(tmp, current);
diff --git a/src/soc/intel/fsp_broadwell_de/acpi.c b/src/soc/intel/fsp_broadwell_de/acpi.c
index 4c6417d5d8..8bb4596ff5 100644
--- a/src/soc/intel/fsp_broadwell_de/acpi.c
+++ b/src/soc/intel/fsp_broadwell_de/acpi.c
@@ -331,12 +331,12 @@ static unsigned long acpi_fill_dmar(unsigned long current)
current += acpi_create_dmar_drhd(current,
DRHD_INCLUDE_PCI_ALL, 0, vtbar);
/* The IIO I/O APIC is fixed on PCI 00:05.4 on Broadwell-DE */
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
9, 0, 5, 4);
/* Get the PCI BDF for the PCH I/O APIC */
dev = dev_find_slot(0, LPC_DEV_FUNC);
bdf = pci_read_config16(dev, 0x6c);
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
8, (bdf >> 8), PCI_SLOT(bdf), PCI_FUNC(bdf));
/*
@@ -365,7 +365,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
/* Create one HPET entry in DMAR for every unique HPET PCI path. */
for (i = 0; i < ARRAY_SIZE(hpet_bdf); i++) {
if (hpet_bdf[i])
- current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ current += acpi_create_dmar_ds_msi_hpet(current,
0, (hpet_bdf[i] >> 8), PCI_SLOT(hpet_bdf[i]),
PCI_FUNC(hpet_bdf[i]));
}
@@ -380,7 +380,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
dev = dev_find_class(PCI_CLASS_BRIDGE_PCI << 8, dev);
if (dev && dev->bus->secondary == 0 &&
PCI_SLOT(dev->path.pci.devfn) <= 3)
- current += acpi_create_dmar_drhd_ds_pci_br(current,
+ current += acpi_create_dmar_ds_pci_br(current,
dev->bus->secondary,
PCI_SLOT(dev->path.pci.devfn),
PCI_FUNC(dev->path.pci.devfn));
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 914b9d51a3..760be590a3 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -551,7 +551,7 @@ static unsigned long acpi_fill_dmar(unsigned long current)
const unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
- current += acpi_create_dmar_drhd_ds_pci(current, 0, 2, 0);
+ current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
acpi_dmar_drhd_fixup(tmp, current);
}
@@ -576,9 +576,9 @@ static unsigned long acpi_fill_dmar(unsigned long current)
current += acpi_create_dmar_drhd(current,
DRHD_INCLUDE_PCI_ALL, 0, vtvc0bar);
- current += acpi_create_dmar_drhd_ds_ioapic(current,
+ current += acpi_create_dmar_ds_ioapic(current,
2, ibdf >> 8, PCI_SLOT(ibdf), PCI_FUNC(ibdf));
- current += acpi_create_dmar_drhd_ds_msi_hpet(current,
+ current += acpi_create_dmar_ds_msi_hpet(current,
0, hbdf >> 8, PCI_SLOT(hbdf), PCI_FUNC(hbdf));
acpi_dmar_drhd_fixup(tmp, current);
--
2.19.1

View File

@ -0,0 +1,80 @@
From 7267021c2a36ecd92aafdad2cae9ecab09e7e20d Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@gmail.com>
Date: Mon, 25 Jun 2018 14:40:53 -0500
Subject: [PATCH 3/3] soc/intel/skylake: Generate ACPI RMRR table
An ACPI RMRR table is requried for IOMMU to work properly with an
iGPU (without using passthrough mode), so create one along with the
DRHD DMAR table if the iGPU is present and enabled.
Test: build/boot google/chell and purism/librem13v2 with kernel
parameter 'intel_iommu=on' but without 'iommu=pt;' observe integrated
graphics functional without corruption.
Change-Id: I202fb3eb8618f99d41f3d1c5bbb83b2ec982aca4
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/27270
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Reviewed-by: Youness Alaoui <snifikino@gmail.com>
---
.../common/block/include/intelblocks/systemagent.h | 2 ++
.../intel/common/block/systemagent/systemagent_early.c | 2 +-
src/soc/intel/skylake/acpi.c | 10 +++++++++-
3 files changed, 12 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/common/block/include/intelblocks/systemagent.h b/src/soc/intel/common/block/include/intelblocks/systemagent.h
index a731b9cb0b..babf9cec95 100644
--- a/src/soc/intel/common/block/include/intelblocks/systemagent.h
+++ b/src/soc/intel/common/block/include/intelblocks/systemagent.h
@@ -77,6 +77,8 @@ void enable_power_aware_intr(void);
uintptr_t sa_get_tolud_base(void);
/* API to get DSM size */
size_t sa_get_dsm_size(void);
+/* API to get GSM base address */
+uintptr_t sa_get_gsm_base(void);
/* API to get GSM size */
size_t sa_get_gsm_size(void);
/* API to get TSEG base address */
diff --git a/src/soc/intel/common/block/systemagent/systemagent_early.c b/src/soc/intel/common/block/systemagent/systemagent_early.c
index 609e1596c9..c1cef5daf1 100644
--- a/src/soc/intel/common/block/systemagent/systemagent_early.c
+++ b/src/soc/intel/common/block/systemagent/systemagent_early.c
@@ -174,7 +174,7 @@ size_t sa_get_dsm_size(void)
return (prealloc_memory - 0xEF) * 4*MiB;
}
-static uintptr_t sa_get_gsm_base(void)
+uintptr_t sa_get_gsm_base(void)
{
/* All regions concerned for have 1 MiB alignment. */
return ALIGN_DOWN(pci_read_config32(SA_DEV_ROOT, BGSM), 1*MiB);
diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c
index 760be590a3..eac9e0ac91 100644
--- a/src/soc/intel/skylake/acpi.c
+++ b/src/soc/intel/skylake/acpi.c
@@ -548,12 +548,20 @@ static unsigned long acpi_fill_dmar(unsigned long current)
/* iGFX has to be enabled, GFXVTBAR set and in 32-bit space. */
if (igfx_dev && igfx_dev->enabled && gfxvten &&
gfx_vtbar && !MCHBAR32(GFXVTBAR + 4)) {
- const unsigned long tmp = current;
+ unsigned long tmp = current;
current += acpi_create_dmar_drhd(current, 0, 0, gfx_vtbar);
current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
acpi_dmar_drhd_fixup(tmp, current);
+
+ /* Add RMRR entry */
+ tmp = current;
+
+ current += acpi_create_dmar_rmrr(current, 0,
+ sa_get_gsm_base(), sa_get_tolud_base() - 1);
+ current += acpi_create_dmar_ds_pci(current, 0, 2, 0);
+ acpi_dmar_rmrr_fixup(tmp, current);
}
struct device *const p2sb_dev = dev_find_slot(0, PCH_DEVFN_P2SB);
--
2.19.1

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@ -0,0 +1,132 @@
diff --git ./src/arch/x86/postcar.c ./src/arch/x86/postcar.c
index 6497b73..485b051 100644
--- ./src/arch/x86/postcar.c
+++ ./src/arch/x86/postcar.c
@@ -19,6 +19,7 @@
#include <console/console.h>
#include <main_decl.h>
#include <program_loading.h>
+#include <security/tpm/tss.h>
#include <soc/intel/common/util.h>
/*
@@ -43,3 +44,11 @@ void main(void)
/* Load and run ramstage. */
run_ramstage();
}
+
+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
+{
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) {
+ tlcl_measure(2, (const void*) start, size);
+ }
+}
+
diff --git ./src/drivers/intel/fsp2_0/memory_init.c ./src/drivers/intel/fsp2_0/memory_init.c
index 30987ce..4957bc0 100644
--- ./src/drivers/intel/fsp2_0/memory_init.c
+++ ./src/drivers/intel/fsp2_0/memory_init.c
@@ -150,10 +150,11 @@ static void do_fsp_post_memory_init(bool s3wake, uint32_t fsp_version)
/*
* Initialize the TPM, unless the TPM was already initialized
- * in verstage and used to verify romstage.
+ * in verstage and used to verify romstage, or for measured boot.
*/
if (IS_ENABLED(CONFIG_LPC_TPM) &&
- !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK))
+ !IS_ENABLED(CONFIG_VBOOT_STARTS_IN_BOOTBLOCK) &&
+ !IS_ENABLED(CONFIG_MEASURED_BOOT))
init_tpm(s3wake);
}
@@ -483,8 +484,29 @@ void fsp_memory_init(bool s3wake)
if (status != CB_SUCCESS)
die("Loading FSPM failed!\n");
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && IS_ENABLED(CONFIG_LPC_TPM)) {
+ // we don't know if we are coming out of a resume
+ // at this point, but want to setup the tpm ASAP
+ init_tpm(0);
+ tlcl_lib_init();
+ const void * const bootblock = (const void*) 0xFFFFF800;
+ const unsigned bootblock_size = 0x800;
+ tlcl_measure(0, bootblock, bootblock_size);
+
+ tlcl_measure(1, _romstage, _eromstage - _romstage);
+ }
+
/* Signal that FSP component has been loaded. */
+ // Don't measure since it is relocated at this point
prog_segment_loaded(hdr.image_base, hdr.image_size, SEG_FINAL);
do_fsp_memory_init(&hdr, s3wake, &memmap);
}
+
+void platform_segment_loaded(uintptr_t start, size_t size, int flags)
+{
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT) && !(flags & SEG_NO_MEASURE)) {
+ tlcl_measure(1, (const void*) start, size);
+ }
+}
+
diff --git ./src/drivers/intel/fsp2_0/silicon_init.c ./src/drivers/intel/fsp2_0/silicon_init.c
index bda88d1..49568f6 100644
--- ./src/drivers/intel/fsp2_0/silicon_init.c
+++ ./src/drivers/intel/fsp2_0/silicon_init.c
@@ -18,6 +18,7 @@
#include <fsp/api.h>
#include <fsp/util.h>
#include <program_loading.h>
+#include <security/tpm/tss.h>
#include <stage_cache.h>
#include <string.h>
#include <timestamp.h>
@@ -101,6 +102,10 @@ void fsps_load(bool s3wake)
if (rdev_readat(&rdev, dest, 0, size) < 0)
die("Failed to read FSPS!\n");
+ if (IS_ENABLED(CONFIG_MEASURED_BOOT)) {
+ tlcl_measure(1, (const void*) dest, size);
+ }
+
if (fsp_component_relocate((uintptr_t)dest, dest, size) < 0)
die("Unable to relocate FSPS!\n");
@@ -115,7 +120,7 @@ void fsps_load(bool s3wake)
stage_cache_add(STAGE_REFCODE, &fsps);
/* Signal that FSP component has been loaded. */
- prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL);
+ prog_segment_loaded(hdr->image_base, hdr->image_size, SEG_FINAL | SEG_NO_MEASURE);
load_done = 1;
}
diff --git ./src/drivers/pc80/tpm/Makefile.inc ./src/drivers/pc80/tpm/Makefile.inc
index 9d428b5..1d2364f 100644
--- ./src/drivers/pc80/tpm/Makefile.inc
+++ ./src/drivers/pc80/tpm/Makefile.inc
@@ -3,6 +3,7 @@ ifeq ($(CONFIG_ARCH_X86),y)
verstage-$(CONFIG_LPC_TPM) += tis.c
romstage-$(CONFIG_LPC_TPM) += tis.c
ramstage-$(CONFIG_LPC_TPM) += tis.c
+postcar-$(CONFIG_LPC_TPM) += tis.c
romstage-$(CONFIG_LPC_TPM) += romstage.c
endif
diff --git ./src/security/tpm/Makefile.inc ./src/security/tpm/Makefile.inc
index 2385635..7ef24cc 100644
--- ./src/security/tpm/Makefile.inc
+++ ./src/security/tpm/Makefile.inc
@@ -4,6 +4,11 @@ verstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c
verstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss.c
+ifeq ($(CONFIG_MEASURED_BOOT),y)
+postcar-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
+postcar-$(CONFIG_TPM) += sha1.c
+endif # CONFIG_MEASURED_BOOT
+
ifeq ($(CONFIG_VBOOT_SEPARATE_VERSTAGE),y)
romstage-$(CONFIG_TPM) += tss/tcg-1.2/tss.c
romstage-$(CONFIG_TPM2) += tss/tcg-2.0/tss_marshaling.c

View File

@ -1,12 +1,12 @@
diff --git ./src/northbridge/intel/sandybridge/romstage.c ./src/northbridge/intel/sandybridge/romstage.c diff --git ./src/northbridge/intel/sandybridge/romstage.c ./src/northbridge/intel/sandybridge/romstage.c
index 8608d5a..dac90ee 100644 index 0426b83..d348b9e 100644
--- ./src/northbridge/intel/sandybridge/romstage.c --- ./src/northbridge/intel/sandybridge/romstage.c
+++ ./src/northbridge/intel/sandybridge/romstage.c +++ ./src/northbridge/intel/sandybridge/romstage.c
@@ -29,6 +29,8 @@ @@ -29,6 +29,8 @@
#include <device/device.h> #include <device/device.h>
#include <halt.h> #include <halt.h>
#include <tpm.h> #include <security/tpm/tis.h>
+#include <tpm_lite/tlcl.h> +#include <security/tpm/tss.h>
+#include <program_loading.h> +#include <program_loading.h>
#include <northbridge/intel/sandybridge/chip.h> #include <northbridge/intel/sandybridge/chip.h>
#include "southbridge/intel/bd82x6x/pch.h" #include "southbridge/intel/bd82x6x/pch.h"
@ -31,7 +31,7 @@ index 8608d5a..dac90ee 100644
/* USB is initialized in MRC if MRC is used. */ /* USB is initialized in MRC if MRC is used. */
if (CONFIG_USE_NATIVE_RAMINIT) { if (CONFIG_USE_NATIVE_RAMINIT) {
early_usb_init(mainboard_usb_ports); early_usb_init(mainboard_usb_ports);
@@ -116,9 +131,23 @@ void mainboard_romstage_entry(unsigned long bist) @@ -117,9 +132,23 @@ void mainboard_romstage_entry(unsigned long bist)
northbridge_romstage_finalize(s3resume); northbridge_romstage_finalize(s3resume);

View File

@ -0,0 +1,44 @@
From 659f40bb348dd2ca02f9483ed2668465177b6a40 Mon Sep 17 00:00:00 2001
From: Nico Huber <nico.h@gmx.de>
Date: Wed, 23 May 2018 17:06:53 +0200
Subject: [PATCH 50/59] buildgcc: Do not try to install GCC if build failed
We didn't bail out if configuring or building of GCC failed but run
`make install` and later steps instead. This resulted in very confusing
logs that concealed the actual error.
Change-Id: Ia064e0bfd96f0cbad391da3bb19e4dc304d988ff
Signed-off-by: Nico Huber <nico.h@gmx.de>
Reviewed-on: https://review.coreboot.org/26496
Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
util/crossgcc/buildgcc | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index edcea7ab42..53f9782cb5 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -751,12 +751,12 @@ build_cross_GCC() {
--with-gmp=$DESTDIR$TARGETDIR --with-mpfr=$DESTDIR$TARGETDIR \
--with-mpc=$DESTDIR$TARGETDIR \
--with-pkgversion="coreboot toolchain v$CROSSGCC_VERSION $CROSSGCC_DATE" \
- || touch .failed
- $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc || touch .failed
+ && \
+ $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-gcc && \
$MAKE install-gcc DESTDIR=$DESTDIR || touch .failed
- if [ "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
- $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc || touch .failed
+ if [ ! -f .failed -a "$(echo $TARGETARCH | grep -c -- -mingw32)" -eq 0 ]; then
+ $MAKE $JOBS CFLAGS_FOR_BUILD="$HOSTCFLAGS" all-target-libgcc && \
$MAKE install-target-libgcc DESTDIR=$DESTDIR || touch .failed
fi
}
--
2.17.1

View File

@ -0,0 +1,130 @@
From 46fb8b6f051b1844ef92098119e4ffa12395e26a Mon Sep 17 00:00:00 2001
From: Iru Cai <mytbk920423@gmail.com>
Date: Fri, 28 Jul 2017 23:36:25 +0800
Subject: [PATCH 51/59] buildgcc: Update IASL to 20180531
Change-Id: I6c14f3aad59749896816bb8789788fc513e7176f
Signed-off-by: Iru Cai <mytbk920423@gmail.com>
Signed-off-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://review.coreboot.org/21156
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
util/crossgcc/buildgcc | 6 ++---
.../patches/acpica-unix2-20161222_iasl.patch | 27 -------------------
.../patches/acpica-unix2-20180531_iasl.patch | 27 +++++++++++++++++++
.../sum/acpica-unix2-20161222.tar.gz.cksum | 1 -
.../sum/acpica-unix2-20180531.tar.gz.cksum | 1 +
5 files changed, 31 insertions(+), 31 deletions(-)
delete mode 100644 util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
create mode 100644 util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
delete mode 100644 util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
create mode 100644 util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index 53f9782cb5..bbe74eb2b8 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -18,8 +18,8 @@
cd $(dirname $0)
-CROSSGCC_DATE="October 15th, 2017"
-CROSSGCC_VERSION="1.50"
+CROSSGCC_DATE="June 3rd, 2018"
+CROSSGCC_VERSION="1.51"
CROSSGCC_COMMIT=$( git describe )
# default settings
@@ -42,7 +42,7 @@ GCC_VERSION=6.3.0
GCC_AUTOCONF_VERSION=2.69
BINUTILS_VERSION=2.29.1
GDB_VERSION=8.0
-IASL_VERSION=20161222
+IASL_VERSION=20180531
PYTHON_VERSION=3.5.1
EXPAT_VERSION=2.2.1
# CLANG version number
diff --git a/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch b/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
deleted file mode 100644
index 24bde98a32..0000000000
--- a/util/crossgcc/patches/acpica-unix2-20161222_iasl.patch
+++ /dev/null
@@ -1,27 +0,0 @@
-diff -Naur acpica-unix2-20161222/source/compiler/asloptions.c acpica-unix2-20161222/source/compiler/asloptions.c
---- acpica-unix2-20161222/source/compiler/asloptions.c
-+++ acpica-unix2-20161222/source/compiler/asloptions.c
-@@ -100,6 +100,7 @@
- if (argc < 2)
- {
- printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
- Usage ();
- exit (1);
- }
-@@ -130,6 +131,7 @@
- if (Gbl_DoSignon)
- {
- printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
- if (Gbl_IgnoreErrors)
- {
- printf ("Ignoring all errors, forcing AML file generation\n\n");
-@@ -711,6 +713,7 @@
- case '^':
-
- printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
-+ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
- exit (0);
-
- case 'a':
diff --git a/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch b/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
new file mode 100644
index 0000000000..fea5cd3c47
--- /dev/null
+++ b/util/crossgcc/patches/acpica-unix2-20180531_iasl.patch
@@ -0,0 +1,27 @@
+diff -Naur acpica-unix2-20180531_/source/compiler/asloptions.c acpica-unix2-20180531/source/compiler/asloptions.c > acpica-unix2-20180531_iasl.patch
+--- acpica-unix2-20180531_/source/compiler/asloptions.c
++++ acpica-unix2-20180531/source/compiler/asloptions.c
+@@ -126,6 +126,7 @@
+ if (Gbl_DoSignon)
+ {
+ printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
+ if (Gbl_IgnoreErrors)
+ {
+ printf ("Ignoring all errors, forcing AML file generation\n\n");
+@@ -753,6 +754,7 @@
+ case '^':
+
+ printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
+ exit (0);
+
+ case 'a':
+@@ -766,6 +768,7 @@
+
+ printf (ACPI_COMMON_SIGNON (ASL_COMPILER_NAME));
+ printf (ACPI_COMMON_BUILD_TIME);
++ printf ("%s\n", COREBOOT_TOOLCHAIN_VERSION);
+ exit (0);
+
+ case 'e':
diff --git a/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
deleted file mode 100644
index d857678871..0000000000
--- a/util/crossgcc/sum/acpica-unix2-20161222.tar.gz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-73e57d4d558c9bc831165c71adbff577b526f256 tarballs/acpica-unix2-20161222.tar.gz
diff --git a/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum b/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
new file mode 100644
index 0000000000..700185839a
--- /dev/null
+++ b/util/crossgcc/sum/acpica-unix2-20180531.tar.gz.cksum
@@ -0,0 +1 @@
+17717140438d506533b4a56e34350749d7b84d6c tarballs/acpica-unix2-20180531.tar.gz
--
2.17.1

View File

@ -0,0 +1,132 @@
From 575f1d7784041461d02c892b4846165dd742654c Mon Sep 17 00:00:00 2001
From: Martin Roth <gaumless@gmail.com>
Date: Tue, 5 Jun 2018 20:56:29 -0600
Subject: [PATCH 52/59] crossgcc: Update to clang 6.0 & cmake 3.11.3
Change-Id: I1a0db60b527c2f7ffe77743c0d75b78a7c8bc4cc
Signed-off-by: Martin Roth <gaumless@gmail.com>
Reviewed-on: https://review.coreboot.org/26877
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
util/crossgcc/buildgcc | 6 +++---
util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum | 1 -
util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum | 1 +
util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum | 1 -
util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum | 1 +
util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum | 1 +
util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum | 1 -
util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum | 1 -
util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum | 1 +
util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum | 1 -
util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum | 1 +
11 files changed, 8 insertions(+), 8 deletions(-)
delete mode 100644 util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
create mode 100644 util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
delete mode 100644 util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
create mode 100644 util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
create mode 100644 util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
delete mode 100644 util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
delete mode 100644 util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
create mode 100644 util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
delete mode 100644 util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
create mode 100644 util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index bbe74eb2b8..addc61f186 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -46,9 +46,9 @@ IASL_VERSION=20180531
PYTHON_VERSION=3.5.1
EXPAT_VERSION=2.2.1
# CLANG version number
-CLANG_VERSION=4.0.0
+CLANG_VERSION=6.0.0
MAKE_VERSION=4.2.1
-CMAKE_VERSION=3.9.0-rc3
+CMAKE_VERSION=3.11.3
# GCC toolchain archive locations
# These are sanitized by the jenkins toolchain test builder, so if
@@ -69,7 +69,7 @@ CFE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/cfe-${CLANG_VERSION}.src
CRT_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/compiler-rt-${CLANG_VERSION}.src.tar.xz"
CTE_ARCHIVE="https://releases.llvm.org/${CLANG_VERSION}/clang-tools-extra-${CLANG_VERSION}.src.tar.xz"
MAKE_ARCHIVE="https://ftpmirror.gnu.org/make/make-${MAKE_VERSION}.tar.bz2"
-CMAKE_ARCHIVE="https://cmake.org/files/v3.9/cmake-${CMAKE_VERSION}.tar.gz"
+CMAKE_ARCHIVE="https://cmake.org/files/v3.11/cmake-${CMAKE_VERSION}.tar.gz"
ALL_ARCHIVES="$GMP_ARCHIVE $MPFR_ARCHIVE $MPC_ARCHIVE \
$GCC_ARCHIVE $BINUTILS_ARCHIVE $GDB_ARCHIVE $IASL_ARCHIVE \
diff --git a/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
deleted file mode 100644
index 00a5596878..0000000000
--- a/util/crossgcc/sum/cfe-4.0.0.src.tar.xz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-e2762800c93d9335781ea6a45af3f80845542ef5 tarballs/cfe-4.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
new file mode 100644
index 0000000000..523445035f
--- /dev/null
+++ b/util/crossgcc/sum/cfe-6.0.0.src.tar.xz.cksum
@@ -0,0 +1 @@
+4cc7bef72fda70ac5e065ca0ae2d66957abe6f2a tarballs/cfe-6.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
deleted file mode 100644
index dbf642c461..0000000000
--- a/util/crossgcc/sum/clang-tools-extra-4.0.0.src.tar.xz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-bdb543c4bb87bd80fe65711114ca0a5c25329ae3 tarballs/clang-tools-extra-4.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
new file mode 100644
index 0000000000..9fcb8280d1
--- /dev/null
+++ b/util/crossgcc/sum/clang-tools-extra-6.0.0.src.tar.xz.cksum
@@ -0,0 +1 @@
+c960a0d565e46e4c4f6976fac389f753076ca72e tarballs/clang-tools-extra-6.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
new file mode 100644
index 0000000000..14a4b22c8d
--- /dev/null
+++ b/util/crossgcc/sum/cmake-3.11.3.tar.gz.cksum
@@ -0,0 +1 @@
+73261a5b7f71abf7277c1d2a418ca3c4cf170c89 tarballs/cmake-3.11.3.tar.gz
diff --git a/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum b/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
deleted file mode 100644
index 809ce3c7ca..0000000000
--- a/util/crossgcc/sum/cmake-3.9.0-rc3.tar.gz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-d568e74e2e4a1cdeae1820cc2cb36fd2d6afc8fe tarballs/cmake-3.9.0-rc3.tar.gz
diff --git a/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
deleted file mode 100644
index 95da5148ed..0000000000
--- a/util/crossgcc/sum/compiler-rt-4.0.0.src.tar.xz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-a879b610e427ef3bba482bdc031ae371cabab81e tarballs/compiler-rt-4.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
new file mode 100644
index 0000000000..88186dbf38
--- /dev/null
+++ b/util/crossgcc/sum/compiler-rt-6.0.0.src.tar.xz.cksum
@@ -0,0 +1 @@
+5725f19be611034e77196461cdb4989f4258cfa4 tarballs/compiler-rt-6.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
deleted file mode 100644
index 410f95fb1a..0000000000
--- a/util/crossgcc/sum/llvm-4.0.0.src.tar.xz.cksum
+++ /dev/null
@@ -1 +0,0 @@
-aee4524e2407f9fe5afc6f70c753180b907011d0 tarballs/llvm-4.0.0.src.tar.xz
diff --git a/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum b/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
new file mode 100644
index 0000000000..ac079eccf5
--- /dev/null
+++ b/util/crossgcc/sum/llvm-6.0.0.src.tar.xz.cksum
@@ -0,0 +1 @@
+f61e0a35feb76644ba160a413ee209dd24c88f47 tarballs/llvm-6.0.0.src.tar.xz
--
2.17.1

View File

@ -0,0 +1,55 @@
From b0f1988f893bf5f581917816b11e810309955143 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Sat, 9 Jun 2018 11:59:00 +0200
Subject: [PATCH 53/59] src: Get rid of unneeded whitespace
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/26991
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
---
util/crossgcc/buildgcc | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
index addc61f186..cd8a091989 100755
--- a/util/crossgcc/buildgcc
+++ b/util/crossgcc/buildgcc
@@ -1191,7 +1191,7 @@ export PATH=$DESTDIR$TARGETDIR/bin:$PATH
# Download, unpack, patch and build all packages
-printf "Downloading and verifing tarballs ... \n"
+printf "Downloading and verifing tarballs ...\n"
mkdir -p tarballs
for P in $PACKAGES; do
download "$P" || exit "$?"
@@ -1199,21 +1199,21 @@ for P in $PACKAGES; do
done
printf "Downloaded tarballs ... ${green}ok${NC}\n"
-printf "Unpacking and patching ... \n"
+printf "Unpacking and patching ...\n"
for P in $PACKAGES; do
unpack_and_patch $P || exit 1
done
printf "Unpacked and patched ... ${green}ok${NC}\n"
if [ -n "$BOOTSTRAPONLY" ]; then
- printf "Building bootstrap compiler only ... \n"
+ printf "Building bootstrap compiler only ...\n"
for pkg in GMP MPFR MPC GCC; do
build_for_host $pkg
done
exit 0
fi
-printf "Building packages ... \n"
+printf "Building packages ...\n"
for package in $PACKAGES; do
build $package
done
--
2.17.1

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