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Merge pull request #1846 from Dasharo/add_novacustom_v540tu

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Add NovaCustom V560TU board
This commit is contained in:
Thierry Laurion 2025-01-15 15:21:43 -05:00 committed by GitHub
commit 49e0849d98
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GPG Key ID: B5690EEEBB952194
13 changed files with 1179 additions and 519 deletions
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17
.circleci/config.yml
View File

@ -254,7 +254,7 @@ workflows:
target: novacustom_nv4x_adl
subcommand: ""
requires:
- x86-musl-cross-make
- x230-hotp-maximized
# coreboot talos_2
- build_and_persist:
@ -510,14 +510,21 @@ workflows:
requires:
- librem_14
# dasharo release
# dasharo release, share 24.02.01 utils/crossgcc
- build:
name: nitropad-ns50
target: nitropad-ns50
name: UNTESTED_nitropad-ns50
target: UNTESTED_nitropad-ns50
subcommand: ""
requires:
- novacustom_nv4x_adl
- build:
name: novacustom-v560tu
target: novacustom-v560tu
subcommand: ""
requires:
- x230-hotp-maximized
# coreboot 4.11
- build:
name: UNMAINTAINED_kgpe-d16_workstation
@ -533,7 +540,7 @@ workflows:
subcommand: ""
requires:
- librem_l1um
# coreboot 4.11
- build:
name: UNMAINTAINED_kgpe-d16_server

2
boards/nitropad-ns50/nitropad-ns50.config → boards/UNTESTED_nitropad-ns50/UNTESTED_nitropad-ns50.config
View File

@ -6,7 +6,7 @@ export CONFIG_COREBOOT_VERSION=dasharo
export CONFIG_LINUX_VERSION=6.1.8
CONFIG_COREBOOT_CONFIG=config/coreboot-nitropad-ns50.config
CONFIG_LINUX_CONFIG=config/linux-nitropad-x.config
CONFIG_LINUX_CONFIG=config/linux-novacustom-common.config
#Enable DEBUG output
#export CONFIG_DEBUG_OUTPUT=y

81
boards/novacustom-v560tu/novacustom-v560tu.config Normal file
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@ -0,0 +1,81 @@
# NovaCustom V54 MTL (integrated graphics) board configuration
# Note the FLASH_OPTIONS: '--ifd -i bios -i me -i fd'
# This excludes gbe from internal flashing, otherwise mac address would revert to '88:88:88:88:87:88' see https://github.com/linuxboot/heads/pull/1871#discussion_r1870134788
# Same options should be used when externally flashing the first time, otherwise Intel GBE region (Ethernet config blob) will be overwitten and MAC reverted to '88:88:88:88:87:88'
# Meteor Lake (Intel Gen 14) is not supposed to support s3 but coincidently does. In case s3 is broken, user must configure settings to not suspend or otherwise enable ME/CSME for s01x to work (unsupported by QubesOS when writing those lines) or use Hibernate (Not supported by QubesOS either)
export CONFIG_COREBOOT=y
export CONFIG_COREBOOT_VERSION=dasharo
export CONFIG_LINUX_VERSION=6.1.8
CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom-v560tu.config
CONFIG_LINUX_CONFIG=config/linux-novacustom-common.config
#Enable DEBUG output
#export CONFIG_DEBUG_OUTPUT=y
#export CONFIG_ENABLE_FUNCTION_TRACING_OUTPUT=y
#Enable TPM2 pcap output under /tmp
#export CONFIG_TPM2_CAPTURE_PCAP=y
#On-demand hardware support (modules.cpio)
CONFIG_LINUX_USB=y
CONFIG_LINUX_E1000=y
CONFIG_MOBILE_TETHERING=y
#Modules packed into tools.cpio
CONFIG_CRYPTSETUP2=y
CONFIG_FLASHPROG=y
CONFIG_FLASHTOOLS=y
CONFIG_GPG2=y
CONFIG_KEXEC=y
CONFIG_UTIL_LINUX=y
CONFIG_LVM2=y
CONFIG_MBEDTLS=y
CONFIG_PCIUTILS=y
#platform locking finalization (PR0)
CONFIG_IO386=y
export CONFIG_FINALIZE_PLATFORM_LOCKING=y
#Remote attestation support
# TPM2 requirements
CONFIG_TPM2_TSS=y
CONFIG_OPENSSL=y
#Remote Attestation common tools
CONFIG_POPT=y
CONFIG_QRENCODE=y
CONFIG_TPMTOTP=y
#HOTP based remote attestation for supported USB Security dongle
#With/Without TPM support
CONFIG_HOTPKEY=y
#Nitrokey Storage admin tool (deprecated)
#CONFIG_NKSTORECLI=n
#GUI Support
#Console based Whiptail support(Console based, no FB):
#CONFIG_SLANG=y
#CONFIG_NEWT=y
#FBWhiptail based (Graphical):
CONFIG_CAIRO=y
CONFIG_FBWHIPTAIL=y
#Additional tools (tools.cpio):
#SSH server (requires ethernet drivers, eg: CONFIG_LINUX_E1000E)
CONFIG_DROPBEAR=y
#Runtime configuration
#Automatically boot if HOTP is valid
export CONFIG_AUTO_BOOT_TIMEOUT=5
#TPM2 requirements
export CONFIG_TPM2_TOOLS=y
export CONFIG_PRIMARY_KEY_TYPE=ecc
#TPM1 requirements
#export CONFIG_TPM=y
export CONFIG_BOOTSCRIPT=/bin/gui-init
export CONFIG_BOOT_REQ_HASH=n
export CONFIG_BOOT_REQ_ROLLBACK=n
export CONFIG_BOOT_KERNEL_ADD=""
export CONFIG_BOOT_KERNEL_REMOVE="intel_iommu=on intel_iommu=igfx_off"
export CONFIG_BOARD_NAME="NovaCustom V560TU"
export CONFIG_FLASH_OPTIONS="flashprog --progress --programmer internal --ifd -i bios -i me -i fd"
export CONFIG_AUTO_BOOT_TIMEOUT=5

2
boards/novacustom_nv4x_adl/novacustom_nv4x_adl.config
View File

@ -6,7 +6,7 @@ export CONFIG_COREBOOT_VERSION=dasharo
export CONFIG_LINUX_VERSION=6.1.8
CONFIG_COREBOOT_CONFIG=config/coreboot-novacustom_nv4x_adl.config
CONFIG_LINUX_CONFIG=config/linux-nitropad-x.config
CONFIG_LINUX_CONFIG=config/linux-novacustom-common.config
#Enable DEBUG output
#export CONFIG_DEBUG_OUTPUT=y

52
config/coreboot-nitropad-ns50.config
View File

@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
# CONFIG_STATIC_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@ -79,6 +80,7 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HARDKERNEL is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
@ -147,6 +149,7 @@ CONFIG_TPM_PIRQ=0x27
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)"
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x20000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@ -161,7 +164,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/ns5x_adl/descriptor.bin"
CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/ns5x_adl/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_VBT_DATA_SIZE_KB=9
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
# CONFIG_USE_LEGACY_8254_TIMER is not set
@ -191,7 +193,7 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x10000
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
CONFIG_EC_GPE_SCI=0x50
CONFIG_TPM_MEASURED_BOOT=y
CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2"
@ -207,6 +209,7 @@ CONFIG_BOARD_ROMSIZE_KB_32768=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
CONFIG_COREBOOT_ROMSIZE_KB_32768=y
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=32768
@ -233,7 +236,6 @@ CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe03e000
CONFIG_SMM_TSEG_SIZE=0x800000
@ -243,6 +245,8 @@ CONFIG_ACPI_BERT=y
CONFIG_ACPI_BERT_SIZE=0x10000
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_SOC_INTEL_ALDERLAKE=y
@ -273,12 +277,11 @@ CONFIG_SOC_INTEL_UART_DEV_MAX=7
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/"
CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd"
CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd"
CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0
CONFIG_DATA_BUS_WIDTH=128
CONFIG_DIMMS_PER_CHANNEL=2
CONFIG_MRC_CHANNEL_WIDTH=16
CONFIG_ACPI_ADL_IPU_ES_SUPPORT=y
CONFIG_ALDERLAKE_ENABLE_SOC_WORKAROUND=y
CONFIG_SI_DESC_REGION="SI_DESC"
CONFIG_SI_DESC_REGION_SZ=4096
@ -295,9 +298,11 @@ CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_PAM0_REGISTER=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
CONFIG_CPU_MAX_TEMPERATURE=100
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_INTEL_TME=y
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@ -382,6 +387,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT=y
# CONFIG_SOC_INTEL_COMMON_OC_WDT_ENABLE is not set
# CONFIG_SOC_INTEL_COMMON_OC_WDT_WDAT is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
@ -403,10 +409,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
# CONFIG_ENABLE_TCSS_DISPLAY_DETECTION is not set
# CONFIG_ENABLE_TCSS_USB_DETECTION is not set
# CONFIG_TCSS_HAS_USBC_OPS is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
@ -416,6 +420,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y
# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
@ -437,7 +443,6 @@ CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
# Intel SoC Common coreboot stages and non-IP blocks
#
CONFIG_SOC_INTEL_COMMON_BASECODE=y
CONFIG_SOC_INTEL_COMMON_BASECODE_RAMTOP=y
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
CONFIG_PAVP=y
@ -506,6 +511,7 @@ CONFIG_RCBA_LENGTH=0x4000
#
CONFIG_EC_ACPI=y
CONFIG_EC_SYSTEM76_EC=y
# CONFIG_EC_SYSTEM76_EC_UPDATE is not set
#
# Intel Firmware
@ -532,6 +538,7 @@ CONFIG_BIOS_VENDOR="3mdeb"
# Dasharo Configuration
#
CONFIG_DASHARO_PREFER_S3_SLEEP=y
# CONFIG_DASHARO_FIRMWARE_UPDATE_MODE is not set
# end of Dasharo Configuration
CONFIG_UDK_BASE=y
@ -548,7 +555,10 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_CUSTOM_BOOTMEDIA=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@ -585,7 +595,7 @@ CONFIG_BOOTSPLASH=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
@ -596,8 +606,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@ -667,7 +675,12 @@ CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
CONFIG_FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_INTEL_GMA_OPREGION_2_1=y
CONFIG_INTEL_GMA_VERSION_2=y
CONFIG_DRIVERS_INTEL_PMC=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
@ -679,6 +692,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_USB_ACPI=y
CONFIG_DRIVERS_WIFI_GENERIC=y
CONFIG_DRIVERS_MTK_WIFI=y
CONFIG_MP_SERVICES_PPI=y
CONFIG_MP_SERVICES_PPI_V2=y
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
@ -719,6 +733,7 @@ CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
@ -738,6 +753,7 @@ CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y
# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set
# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set
# CONFIG_BOOTMEDIA_SMM_BWP is not set
# end of Security
@ -752,6 +768,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
CONFIG_HEAP_SIZE=0x100000
#
# Console
@ -815,6 +832,13 @@ CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
#
# Dasharo specific payload options
#
# end of Dasharo specific payload options
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
@ -839,6 +863,10 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# CONFIG_DISPLAY_MTRRS is not set
#
# Vendorcode Debug Settings
#
#
# BLOB Debug Settings
#

947
config/coreboot-novacustom-v560tu.config Normal file
View File

@ -0,0 +1,947 @@
#
# Automatically generated file; DO NOT EDIT.
# coreboot configuration
#
#
# General setup
#
CONFIG_COREBOOT_BUILD=y
CONFIG_LOCALVERSION="v0.9.0-rc2"
CONFIG_CBFS_PREFIX="fallback"
CONFIG_COMPILER_GCC=y
# CONFIG_COMPILER_LLVM_CLANG is not set
CONFIG_ARCH_SUPPORTS_CLANG=y
# CONFIG_ANY_TOOLCHAIN is not set
# CONFIG_CCACHE is not set
# CONFIG_IWYU is not set
# CONFIG_FMD_GENPARSER is not set
# CONFIG_UTIL_GENPARSER is not set
CONFIG_OPTION_BACKEND_NONE=y
# CONFIG_USE_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
CONFIG_USE_BLOBS=y
# CONFIG_USE_AMD_BLOBS is not set
# CONFIG_USE_QC_BLOBS is not set
# CONFIG_COVERAGE is not set
# CONFIG_UBSAN is not set
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
# CONFIG_ASAN is not set
# CONFIG_NO_STAGE_CACHE is not set
CONFIG_TSEG_STAGE_CACHE=y
# CONFIG_UPDATE_IMAGE is not set
CONFIG_BOOTSPLASH_IMAGE=y
CONFIG_BOOTSPLASH_FILE="@BRAND_DIR@/bootsplash.jpg"
CONFIG_BOOTSPLASH_CONVERT=y
CONFIG_BOOTSPLASH_CONVERT_QUALITY=90
# CONFIG_BOOTSPLASH_CONVERT_RESIZE is not set
# CONFIG_BOOTSPLASH_CONVERT_COLORSWAP is not set
# CONFIG_FW_CONFIG is not set
#
# Software Bill Of Materials (SBOM)
#
# CONFIG_SBOM is not set
# end of Software Bill Of Materials (SBOM)
# end of General setup
#
# Mainboard
#
#
# Important: Run 'make distclean' before switching boards
#
# CONFIG_VENDOR_51NB is not set
# CONFIG_VENDOR_ACER is not set
# CONFIG_VENDOR_ADLINK is not set
# CONFIG_VENDOR_AMD is not set
# CONFIG_VENDOR_AOPEN is not set
# CONFIG_VENDOR_APPLE is not set
# CONFIG_VENDOR_ASROCK is not set
# CONFIG_VENDOR_ASUS is not set
# CONFIG_VENDOR_BIOSTAR is not set
# CONFIG_VENDOR_BOSTENTECH is not set
# CONFIG_VENDOR_BYTEDANCE is not set
# CONFIG_VENDOR_CAVIUM is not set
CONFIG_VENDOR_CLEVO=y
# CONFIG_VENDOR_COMPULAB is not set
# CONFIG_VENDOR_DELL is not set
# CONFIG_VENDOR_EMULATION is not set
# CONFIG_VENDOR_EXAMPLE is not set
# CONFIG_VENDOR_FACEBOOK is not set
# CONFIG_VENDOR_FOXCONN is not set
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HARDKERNEL is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
# CONFIG_VENDOR_INTEL is not set
# CONFIG_VENDOR_INVENTEC is not set
# CONFIG_VENDOR_KONTRON is not set
# CONFIG_VENDOR_LENOVO is not set
# CONFIG_VENDOR_LIBRETREND is not set
# CONFIG_VENDOR_MSI is not set
# CONFIG_VENDOR_NOVACUSTOM is not set
# CONFIG_VENDOR_OCP is not set
# CONFIG_VENDOR_OPENCELLULAR is not set
# CONFIG_VENDOR_PACKARDBELL is not set
# CONFIG_VENDOR_PCENGINES is not set
# CONFIG_VENDOR_PINE64 is not set
# CONFIG_VENDOR_PORTWELL is not set
# CONFIG_VENDOR_PRODRIVE is not set
# CONFIG_VENDOR_PROTECTLI is not set
# CONFIG_VENDOR_PURISM is not set
# CONFIG_VENDOR_RAZER is not set
# CONFIG_VENDOR_RODA is not set
# CONFIG_VENDOR_SAMSUNG is not set
# CONFIG_VENDOR_SAPPHIRE is not set
# CONFIG_VENDOR_SIEMENS is not set
# CONFIG_VENDOR_SIFIVE is not set
# CONFIG_VENDOR_STARLABS is not set
# CONFIG_VENDOR_SUPERMICRO is not set
# CONFIG_VENDOR_SYSTEM76 is not set
# CONFIG_VENDOR_TI is not set
# CONFIG_VENDOR_UP is not set
CONFIG_MAINBOARD_FAMILY="Not Applicable"
CONFIG_MAINBOARD_PART_NUMBER="V54x_6x_TU"
CONFIG_MAINBOARD_VERSION="V560TU"
CONFIG_MAINBOARD_DIR="clevo/mtl-h"
CONFIG_DIMM_MAX=4
CONFIG_DIMM_SPD_SIZE=1024
CONFIG_FMDFILE=""
# CONFIG_NO_POST is not set
CONFIG_MAINBOARD_VENDOR="Clevo"
CONFIG_CBFS_SIZE=0x1000000
# CONFIG_CONSOLE_SERIAL is not set
CONFIG_MAX_CPUS=22
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
# CONFIG_POST_DEVICE is not set
# CONFIG_POST_IO is not set
CONFIG_UART_FOR_CONSOLE=0
CONFIG_DEVICETREE="devicetree.cb"
# CONFIG_VBOOT is not set
CONFIG_VBOOT_VBNV_OFFSET=0x28
CONFIG_VARIANT_DIR="igpu"
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
# CONFIG_VGA_BIOS is not set
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Notebook"
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
#
# Alder Lake P
#
# CONFIG_BOARD_CLEVO_NS50PU is not set
# CONFIG_BOARD_CLEVO_NV40PZ is not set
#
# Comet Lake U
#
# CONFIG_BOARD_CLEVO_L140CU is not set
#
# Kaby Lake U
#
# CONFIG_BOARD_CLEVO_N130WU is not set
#
# Meteor Lake H
#
# CONFIG_BOARD_CLEVO_V540TNX is not set
# CONFIG_BOARD_CLEVO_V560TNX is not set
# CONFIG_BOARD_CLEVO_V540TU is not set
CONFIG_BOARD_CLEVO_V560TU=y
#
# Tiger Lake U
#
# CONFIG_BOARD_CLEVO_L140MU is not set
# CONFIG_BOARD_CLEVO_NV40MZ is not set
# CONFIG_BOARD_CLEVO_NS50MU is not set
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="V54x_6x_TU"
# CONFIG_CONSOLE_POST is not set
# CONFIG_USE_PM_ACPI_TIMER is not set
CONFIG_TPM_PIRQ=0x61
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)"
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
CONFIG_BOARD_CLEVO_MTLH_COMMON=y
CONFIG_BOARD_CLEVO_V5X0TU_BASE=y
CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x40000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
CONFIG_DCACHE_RAM_BASE=0xfef00000
CONFIG_DCACHE_RAM_SIZE=0xc0000
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
CONFIG_DCACHE_BSP_STACK_SIZE=0x80400
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
CONFIG_HAVE_INTEL_FIRMWARE=y
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/descriptor.bin"
CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/me.bin"
CONFIG_GBE_BIN_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/gbe.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x200000
CONFIG_PCIEXP_DEFAULT_MAX_RESIZABLE_BAR_BITS=36
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
# CONFIG_USE_LEGACY_8254_TIMER is not set
# CONFIG_DEBUG_SMI is not set
CONFIG_HAVE_IFD_BIN=y
CONFIG_PCIEXP_HOTPLUG_BUSES=42
CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000
CONFIG_PS2K_EISAID="PNP0303"
CONFIG_PS2M_EISAID="PNP0F13"
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
CONFIG_D3COLD_SUPPORT=y
CONFIG_PCIEXP_ASPM=y
CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
CONFIG_EC_GPE_SCI=0x50
CONFIG_TPM_MEASURED_BOOT=y
CONFIG_LINUX_COMMAND_LINE="debug"
CONFIG_BOARD_ROMSIZE_KB_32768=y
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
CONFIG_COREBOOT_ROMSIZE_KB_32768=y
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=32768
CONFIG_ROM_SIZE=0x02000000
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
CONFIG_POWER_STATE_OFF_AFTER_FAILURE=y
# CONFIG_POWER_STATE_ON_AFTER_FAILURE is not set
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
CONFIG_MAINBOARD_POWER_FAILURE_STATE=0
# end of Mainboard
CONFIG_SYSTEM_TYPE_LAPTOP=y
#
# Chipset
#
#
# SoC
#
CONFIG_CHIPSET_DEVICETREE="soc/intel/meteorlake/chipset.cb"
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe02c000
CONFIG_SMM_TSEG_SIZE=0x800000
CONFIG_SMM_RESERVED_SIZE=0x200000
CONFIG_SMM_MODULE_STACK_SIZE=0x800
CONFIG_ACPI_BERT=y
CONFIG_ACPI_BERT_SIZE=0x10000
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_EXT_BIOS_WIN_BASE=0xf8000000
CONFIG_EXT_BIOS_WIN_SIZE=0x2000000
CONFIG_IFD_CHIPSET="mtl"
CONFIG_IED_REGION_SIZE=0x400000
CONFIG_MAX_TBT_ROOT_PORTS=4
CONFIG_MAX_ROOT_PORTS=12
CONFIG_MAX_PCIE_CLOCK_SRC=9
CONFIG_PCR_BASE_ADDRESS=0xe0000000
CONFIG_CPU_BCLK_MHZ=100
CONFIG_SOC_INTEL_PERFORMANCE_CORE_SCALE_FACTOR=125
CONFIG_SOC_INTEL_EFFICIENT_CORE_SCALE_FACTOR=100
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
CONFIG_CPU_XTAL_HZ=38400000
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=3
CONFIG_SOC_INTEL_I2C_DEV_MAX=6
CONFIG_SOC_INTEL_UART_DEV_MAX=3
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
CONFIG_FSP_HEADER_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Include/"
CONFIG_FSP_FD_PATH="3rdparty/dasharo-blobs/novacustom/v5x0tu/MeteorLakeFspBinPkg/Fsp.fd"
CONFIG_DATA_BUS_WIDTH=128
CONFIG_DIMMS_PER_CHANNEL=2
CONFIG_MRC_CHANNEL_WIDTH=16
CONFIG_BUILDING_WITH_DEBUG_FSP=y
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258
CONFIG_INTEL_GMA_BCLV_WIDTH=32
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254
CONFIG_INTEL_GMA_BCLM_WIDTH=32
CONFIG_FSP_PUBLISH_MBP_HOB=y
CONFIG_MAX_HECI_DEVICES=6
CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_PAM0_REGISTER=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
CONFIG_SOC_INTEL_METEORLAKE=y
CONFIG_SOC_INTEL_METEORLAKE_U_H=y
CONFIG_SOC_INTEL_METEORLAKE_TCSS_USB4_SUPPORT=y
CONFIG_METEORLAKE_CAR_ENHANCED_NEM=y
CONFIG_CPU_MAX_TEMPERATURE=110
CONFIG_IOE_PCR_BASE_ADDRESS=0x60000000
CONFIG_SOC_INTEL_USB2_DEV_MAX=10
CONFIG_SOC_INTEL_USB3_DEV_MAX=2
CONFIG_SOC_INTEL_METEORLAKE_DEBUG_CONSENT=0
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x800000
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x100f
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x100f
CONFIG_IOE_DIE_CLOCK_START=6
CONFIG_SOC_INTEL_CSE_FW_PARTITION_CMOS_OFFSET=161
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_SLP_S0_FREQ_HZ=0x2005
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=42
CONFIG_INTEL_TME=y
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
CONFIG_CBFS_CACHE_ALIGN=8
CONFIG_SOC_INTEL_COMMON=y
#
# Intel SoC Common Code for IP blocks
#
CONFIG_SOC_INTEL_COMMON_BLOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
CONFIG_USE_FSP_FEATURE_PROGRAM_ON_APS=y
# CONFIG_USE_COREBOOT_MP_INIT is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
CONFIG_INTEL_CAR_NEM_ENHANCED=y
CONFIG_CAR_HAS_SF_MASKS=y
CONFIG_COS_MAPPED_TO_MSB=y
CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y
CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y
CONFIG_CPU_SUPPORTS_INTEL_TME=y
CONFIG_TME_KEY_REGENERATION_ON_WARM_BOOT=y
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
CONFIG_HAVE_HYPERTHREADING=y
CONFIG_FSP_HYPERTHREADING=y
CONFIG_INTEL_KEYLOCKER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE=2
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_MAX is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_256MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_128MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_64MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_32MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_16MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_8MB is not set
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_4MB is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_2MB=y
# CONFIG_SOC_INTEL_COMMON_BLOCK_PRMRR_SIZE_0MB is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y
CONFIG_SOC_INTEL_CSE_SEND_EOP_LATE=y
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
CONFIG_SOC_INTEL_CSE_RW_FILE=""
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
CONFIG_SOC_INTEL_CSE_SET_EOP=y
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY=y
CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY_V2=y
CONFIG_SOC_INTEL_CSE_HAVE_SPEC_SUPPORT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ME_SPEC_18=y
CONFIG_ME_SPEC=18
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_IOSTANDBY=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_PMODE_4BITS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
CONFIG_SOC_INTEL_GFX_NON_PREFETCHABLE_MMIO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
CONFIG_SOC_INTEL_COMMON_BLOCK_IOC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y
CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_IOE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
CONFIG_PCIE_CLOCK_CONTROL_THROUGH_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y
CONFIG_PMC_IPC_ACPI_INTERFACE=y
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
# CONFIG_TCSS_HAS_USBC_OPS is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
# CONFIG_FIRMWARE_CONNECTION_MANAGER is not set
CONFIG_SOFTWARE_CONNECTION_MANAGER=y
CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y
CONFIG_ENABLE_EARLY_DMA_PROTECTION=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
#
# Intel SoC Common PCH Code
#
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM=y
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
CONFIG_PCH_SPECIFIC_DISCRETE_OPTIONS=y
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
#
# Intel SoC Common coreboot stages and non-IP blocks
#
CONFIG_SOC_INTEL_COMMON_BASECODE=y
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
CONFIG_PAVP=y
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y
# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set
CONFIG_SOC_INTEL_CRASHLOG=y
CONFIG_SOC_INTEL_IOE_DIE_SUPPORT=y
#
# CPU
#
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
CONFIG_CPU_INTEL_COMMON=y
CONFIG_ENABLE_VMX=y
CONFIG_SET_IA32_FC_LOCK_BIT=y
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
CONFIG_CPU_INTEL_COMMON_VOLTAGE=y
CONFIG_CPU_INTEL_COMMON_SMM=y
CONFIG_PARALLEL_MP=y
CONFIG_PARALLEL_MP_AP_WORK=y
CONFIG_DEFAULT_X2APIC_LATE_WORKAROUND=y
# CONFIG_XAPIC_ONLY is not set
# CONFIG_X2APIC_ONLY is not set
# CONFIG_X2APIC_RUNTIME is not set
CONFIG_X2APIC_LATE_WORKAROUND=y
CONFIG_UDELAY_TSC=y
CONFIG_TSC_MONOTONIC_TIMER=y
CONFIG_X86_CLFLUSH_CAR=y
CONFIG_HAVE_SMI_HANDLER=y
CONFIG_SMM_TSEG=y
CONFIG_SMM_PCI_RESOURCE_STORE_NUM_SLOTS=8
CONFIG_X86_INIT_NEED_1_SIPI=y
CONFIG_AP_STACK_SIZE=0x800
CONFIG_SMP=y
CONFIG_SSE=y
CONFIG_SSE2=y
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
#
# Northbridge
#
#
# Southbridge
#
CONFIG_PCIEXP_HOTPLUG=y
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
CONFIG_HAVE_INTEL_CHIPSET_LOCKDOWN=y
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
# CONFIG_INTEL_CHIPSET_LOCKDOWN is not set
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
CONFIG_RCBA_LENGTH=0x4000
#
# Super I/O
#
#
# Embedded Controllers
#
CONFIG_EC_ACPI=y
CONFIG_EC_SYSTEM76_EC=y
# CONFIG_EC_SYSTEM76_EC_UPDATE is not set
#
# Intel Firmware
#
# CONFIG_IFDTOOL_DISABLE_ME is not set
CONFIG_HAVE_ME_BIN=y
# CONFIG_STITCH_ME_BIN is not set
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
CONFIG_HAVE_INTEL_ME_HAP=y
# CONFIG_INTEL_ME_DISABLED_HECI is not set
CONFIG_INTEL_ME_DISABLED_HAP=y
# CONFIG_INTEL_ME_ENABLED is not set
CONFIG_INTEL_ME_DEFAULT_STATE=2
CONFIG_MAINBOARD_USES_IFD_GBE_REGION=y
CONFIG_HAVE_GBE_BIN=y
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
CONFIG_UNLOCK_FLASH_REGIONS=y
CONFIG_BIOS_VENDOR="3mdeb"
#
# Dasharo
#
#
# Dasharo Configuration
#
CONFIG_DASHARO_PREFER_S3_SLEEP=y
CONFIG_DASHARO_FIRMWARE_UPDATE_MODE=y
# end of Dasharo Configuration
CONFIG_UDK_BASE=y
# CONFIG_UDK_202005_BINDING is not set
CONFIG_UDK_202302_BINDING=y
CONFIG_UDK_2013_VERSION=2013
CONFIG_UDK_2017_VERSION=2017
CONFIG_UDK_202005_VERSION=202005
CONFIG_UDK_202302_VERSION=202302
CONFIG_UDK_VERSION=202302
CONFIG_ARCH_X86=y
CONFIG_ARCH_BOOTBLOCK_X86_32=y
CONFIG_ARCH_VERSTAGE_X86_32=y
CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_CUSTOM_BOOTMEDIA=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
CONFIG_BOOTBLOCK_SIMPLE=y
# CONFIG_BOOTBLOCK_NORMAL is not set
CONFIG_COLLECT_TIMESTAMPS_TSC=y
CONFIG_IDT_IN_EVERY_STAGE=y
CONFIG_HAVE_CF9_RESET=y
CONFIG_DEBUG_HW_BREAKPOINTS=y
CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
# CONFIG_DUMP_SMBIOS_TYPE17 is not set
# end of Chipset
#
# Devices
#
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
CONFIG_HAVE_FSP_GOP=y
# CONFIG_VGA_ROM_RUN is not set
CONFIG_RUN_FSP_GOP=y
# CONFIG_NO_GFX_INIT is not set
CONFIG_NO_EARLY_GFX_INIT=y
#
# Display
#
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
CONFIG_LINEAR_FRAMEBUFFER=y
CONFIG_BOOTSPLASH=y
# end of Display
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
CONFIG_PCI_ALLOW_BUS_MASTER=y
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS=y
CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR=y
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
CONFIG_PCIEXP_HOTPLUG_IO=0x800
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
CONFIG_INTEL_GMA_HAVE_VBT=y
CONFIG_INTEL_GMA_ADD_VBT=y
# CONFIG_SOFTWARE_I2C is not set
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
# CONFIG_RESOURCE_ALLOCATION_TOP_DOWN is not set
# end of Devices
#
# Generic Drivers
#
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
# CONFIG_ELOG is not set
CONFIG_CACHE_MRC_SETTINGS=y
CONFIG_MRC_SETTINGS_PROTECT=y
CONFIG_MRC_CACHE_USING_MRC_VERSION=y
# CONFIG_SMMSTORE is not set
CONFIG_SPI_FLASH=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
CONFIG_SPI_FLASH_SMM=y
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
CONFIG_TPM_INIT_RAMSTAGE=y
CONFIG_TPM_PPI=y
CONFIG_DRIVERS_UART=y
CONFIG_NO_UART_ON_SUPERIO=y
CONFIG_DRIVERS_UART_8250MEM=y
CONFIG_DRIVERS_UART_8250MEM_32=y
# CONFIG_VPD is not set
CONFIG_DRIVERS_GENERIC_BAYHUB_LV2=y
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
# CONFIG_DRIVERS_GENERIC_CBFS_UUID is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
CONFIG_DRIVERS_I2C_DESIGNWARE=y
CONFIG_DRIVERS_I2C_GENERIC=y
CONFIG_DRIVERS_I2C_HID=y
# CONFIG_DRIVERS_I2C_MAX98396 is not set
# CONFIG_DISPLAY_HOBS is not set
# CONFIG_DISPLAY_UPD_DATA is not set
# CONFIG_BMP_LOGO is not set
CONFIG_PLATFORM_USES_FSP2_0=y
CONFIG_PLATFORM_USES_FSP2_1=y
CONFIG_PLATFORM_USES_FSP2_2=y
CONFIG_PLATFORM_USES_FSP2_3=y
CONFIG_PLATFORM_USES_FSP2_X86_32=y
CONFIG_ADD_FSP_BINARIES=y
CONFIG_FSP_T_LOCATION=0xfffe0000
CONFIG_FSP_S_CBFS="fsps.bin"
CONFIG_FSP_M_CBFS="fspm.bin"
CONFIG_FSP_FULL_FD=y
CONFIG_FSP_T_RESERVED_SIZE=0x0
CONFIG_FSP_M_XIP=y
CONFIG_FSP_USES_CB_STACK=y
CONFIG_HAVE_FSP_LOGO_SUPPORT=y
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
CONFIG_FSPS_HAS_ARCH_UPD=y
CONFIG_FSPS_USE_MULTI_PHASE_INIT=y
CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_INTEL_GMA_OPREGION_2_1=y
CONFIG_INTEL_GMA_VERSION_2=y
CONFIG_DRIVERS_INTEL_PMC=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
CONFIG_DRIVERS_MC146818=y
CONFIG_USE_PC_CMOS_ALTCENTURY=n
CONFIG_PC_CMOS_BASE_PORT_BANK0=0x70
CONFIG_MEMORY_MAPPED_TPM=y
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_USB_ACPI=y
CONFIG_DRIVERS_WIFI_GENERIC=y
CONFIG_DRIVERS_MTK_WIFI=y
CONFIG_MP_SERVICES_PPI=y
CONFIG_MP_SERVICES_PPI_V2=y
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
# end of Generic Drivers
#
# Security
#
#
# CBFS verification
#
# CONFIG_CBFS_VERIFICATION is not set
# end of CBFS verification
#
# Verified Boot (vboot)
#
CONFIG_VBOOT_LIB=y
# end of Verified Boot (vboot)
#
# Trusted Platform Module
#
# CONFIG_TPM1 is not set
CONFIG_TPM2=y
CONFIG_TPM=y
CONFIG_MAINBOARD_HAS_TPM2=y
# CONFIG_DEBUG_TPM is not set
CONFIG_TPM_RDRESP_NEED_DELAY=y
# CONFIG_TPM_LOG_CB is not set
CONFIG_TPM_LOG_TPM2=y
# CONFIG_TPM_HASH_SHA1 is not set
CONFIG_TPM_HASH_SHA256=y
# CONFIG_TPM_HASH_SHA384 is not set
# CONFIG_TPM_HASH_SHA512 is not set
CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
#
# Memory initialization
#
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
# end of Memory initialization
# CONFIG_INTEL_TXT is not set
# CONFIG_STM is not set
# CONFIG_INTEL_CBNT_SUPPORT is not set
# CONFIG_BOOTMEDIA_LOCK_NONE is not set
CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y
# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set
# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set
# CONFIG_BOOTMEDIA_SMM_BWP is not set
# end of Security
CONFIG_ACPI_HAVE_PCAT_8259=y
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
CONFIG_ACPI_SOC_NVS=y
CONFIG_ACPI_CUSTOM_MADT=y
CONFIG_ACPI_COMMON_MADT_IOAPIC=y
CONFIG_HAVE_ACPI_TABLES=y
CONFIG_ACPI_LPIT=y
CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
CONFIG_HEAP_SIZE=0x100000
#
# Console
#
CONFIG_BOOTBLOCK_CONSOLE=y
CONFIG_POSTCAR_CONSOLE=y
CONFIG_SQUELCH_EARLY_SMP=y
CONFIG_FIXED_UART_FOR_CONSOLE=y
# CONFIG_SPKMODEM is not set
# CONFIG_CONSOLE_NE2K is not set
CONFIG_CONSOLE_CBMEM=y
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
# CONFIG_CONSOLE_SPI_FLASH is not set
# CONFIG_CONSOLE_I2C_SMBUS is not set
# CONFIG_CONSOLE_SYSTEM76_EC is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
# CONFIG_CMOS_POST is not set
CONFIG_HWBASE_DEBUG_CB=y
# end of Console
CONFIG_ACPI_S1_NOT_SUPPORTED=y
CONFIG_HAVE_ACPI_RESUME=y
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
CONFIG_HAVE_MONOTONIC_TIMER=y
CONFIG_HAVE_OPTION_TABLE=y
CONFIG_IOAPIC=y
#
# System tables
#
CONFIG_GENERATE_SMBIOS_TABLES=y
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
# end of System tables
#
# Payload
#
# CONFIG_PAYLOAD_NONE is not set
# CONFIG_PAYLOAD_ELF is not set
# CONFIG_PAYLOAD_BOOTBOOT is not set
# CONFIG_PAYLOAD_FILO is not set
# CONFIG_PAYLOAD_GRUB2 is not set
# CONFIG_PAYLOAD_SEAGRUB is not set
# CONFIG_PAYLOAD_LINUXBOOT is not set
# CONFIG_PAYLOAD_SEABIOS is not set
# CONFIG_PAYLOAD_UBOOT is not set
# CONFIG_PAYLOAD_EDK2 is not set
CONFIG_PAYLOAD_LINUX=y
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
#
# Dasharo specific payload options
#
# end of Dasharo specific payload options
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# Secondary Payloads
#
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
# end of Secondary Payloads
# end of Payload
#
# Debugging
#
#
# CPU Debug Settings
#
# CONFIG_DISPLAY_MTRRS is not set
#
# Vendorcode Debug Settings
#
#
# BLOB Debug Settings
#
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
# CONFIG_DISPLAY_FSP_HEADER is not set
# CONFIG_VERIFY_HOBS is not set
# CONFIG_DISPLAY_FSP_VERSION_INFO is not set
CONFIG_DISPLAY_FSP_VERSION_INFO_2=y
# CONFIG_ENABLE_FSP_ERROR_INFO is not set
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
#
# General Debug Settings
#
# CONFIG_GDB_STUB is not set
# CONFIG_FATAL_ASSERTS is not set
CONFIG_HAVE_DEBUG_GPIO=y
# CONFIG_DEBUG_GPIO is not set
# CONFIG_DEBUG_CBFS is not set
CONFIG_HAVE_DEBUG_RAM_SETUP=y
# CONFIG_DEBUG_RAM_SETUP is not set
CONFIG_HAVE_DEBUG_SMBUS=y
# CONFIG_DEBUG_SMBUS is not set
# CONFIG_DEBUG_MALLOC is not set
# CONFIG_DEBUG_CONSOLE_INIT is not set
# CONFIG_DEBUG_SPI_FLASH is not set
# CONFIG_DEBUG_BOOT_STATE is not set
# CONFIG_DEBUG_ADA_CODE is not set
CONFIG_HAVE_EM100_SUPPORT=y
# CONFIG_EM100 is not set
# CONFIG_DEBUG_ACPICA_COMPATIBLE is not set
# end of Debugging
CONFIG_SPD_READ_BY_WORD=y
CONFIG_DECOMPRESS_OFAST=y
CONFIG_WARNINGS_ARE_ERRORS=y
CONFIG_MAX_REBOOT_CNT=3
CONFIG_RELOCATABLE_MODULES=y
CONFIG_GENERIC_GPIO_LIB=y
CONFIG_HAVE_BOOTBLOCK=y
CONFIG_HAVE_ROMSTAGE=y
CONFIG_HAVE_RAMSTAGE=y

52
config/coreboot-novacustom_nv4x_adl.config
View File

@ -22,6 +22,7 @@ CONFIG_USE_OPTION_TABLE=y
# CONFIG_STATIC_OPTION_TABLE is not set
CONFIG_COMPRESS_RAMSTAGE_LZMA=y
# CONFIG_COMPRESS_RAMSTAGE_LZ4 is not set
CONFIG_SEPARATE_ROMSTAGE=y
CONFIG_INCLUDE_CONFIG_FILE=y
CONFIG_COLLECT_TIMESTAMPS=y
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
@ -79,6 +80,7 @@ CONFIG_BOOTSPLASH_CONVERT_QUALITY=90
# CONFIG_VENDOR_GETAC is not set
# CONFIG_VENDOR_GIGABYTE is not set
# CONFIG_VENDOR_GOOGLE is not set
# CONFIG_VENDOR_HARDKERNEL is not set
# CONFIG_VENDOR_HP is not set
# CONFIG_VENDOR_IBASE is not set
# CONFIG_VENDOR_IBM is not set
@ -147,6 +149,7 @@ CONFIG_TPM_PIRQ=0x27
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
CONFIG_VBOOT_FWID_VERSION="$(CONFIG_LOCALVERSION)"
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
CONFIG_EC_SYSTEM76_EC_FLASH_SIZE=0x20000
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
@ -161,7 +164,6 @@ CONFIG_DRIVERS_INTEL_WIFI=y
CONFIG_IFD_BIN_PATH="3rdparty/dasharo-blobs/novacustom/nv4x_adl/descriptor.bin"
CONFIG_ME_BIN_PATH="3rdparty/dasharo-blobs/novacustom/nv4x_adl/me.bin"
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
CONFIG_VBT_DATA_SIZE_KB=9
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
# CONFIG_USE_LEGACY_8254_TIMER is not set
@ -191,7 +193,7 @@ CONFIG_PCIEXP_L1_SUB_STATE=y
CONFIG_PCIEXP_CLK_PM=y
# CONFIG_DRIVERS_UART_8250IO is not set
CONFIG_PC_CMOS_BASE_PORT_BANK1=0x72
CONFIG_HEAP_SIZE=0x10000
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
CONFIG_EC_GPE_SCI=0x50
CONFIG_TPM_MEASURED_BOOT=y
CONFIG_LINUX_COMMAND_LINE="quiet loglevel=2"
@ -207,6 +209,7 @@ CONFIG_BOARD_ROMSIZE_KB_32768=y
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
# CONFIG_COREBOOT_ROMSIZE_KB_24576 is not set
CONFIG_COREBOOT_ROMSIZE_KB_32768=y
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
CONFIG_COREBOOT_ROMSIZE_KB=32768
@ -233,7 +236,6 @@ CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
CONFIG_CBFS_MCACHE_SIZE=0x4000
CONFIG_ROMSTAGE_ADDR=0x2000000
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
CONFIG_VERSTAGE_ADDR=0x2000000
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe03e000
CONFIG_SMM_TSEG_SIZE=0x800000
@ -243,6 +245,8 @@ CONFIG_ACPI_BERT=y
CONFIG_ACPI_BERT_SIZE=0x10000
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
CONFIG_PRERAM_CBFS_CACHE_SIZE=0x4000
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_ACPI_CPU_STRING="CP%02X"
CONFIG_STACK_SIZE=0x2000
CONFIG_SOC_INTEL_ALDERLAKE=y
@ -273,12 +277,11 @@ CONFIG_SOC_INTEL_UART_DEV_MAX=7
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/"
CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd"
CONFIG_FSP_FD_PATH="3rdparty/fsp/RaptorLakeFspBinPkg/Client/RaptorLakeP/Fsp.fd"
CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0
CONFIG_DATA_BUS_WIDTH=128
CONFIG_DIMMS_PER_CHANNEL=2
CONFIG_MRC_CHANNEL_WIDTH=16
CONFIG_ACPI_ADL_IPU_ES_SUPPORT=y
CONFIG_ALDERLAKE_ENABLE_SOC_WORKAROUND=y
CONFIG_SI_DESC_REGION="SI_DESC"
CONFIG_SI_DESC_REGION_SZ=4096
@ -295,9 +298,11 @@ CONFIG_BOOTBLOCK_IN_CBFS=y
CONFIG_HAVE_PAM0_REGISTER=y
CONFIG_PCIEXP_COMMON_CLOCK=y
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
CONFIG_CPU_MAX_TEMPERATURE=100
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
CONFIG_PCIE_LTR_MAX_SNOOP_LATENCY=0x1003
CONFIG_PCIE_LTR_MAX_NO_SNOOP_LATENCY=0x1003
CONFIG_SOC_PHYSICAL_ADDRESS_WIDTH=0
CONFIG_INTEL_TME=y
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
@ -382,6 +387,7 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
CONFIG_SOC_INTEL_COMMON_BLOCK_OC_WDT=y
# CONFIG_SOC_INTEL_COMMON_OC_WDT_ENABLE is not set
# CONFIG_SOC_INTEL_COMMON_OC_WDT_WDAT is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
@ -403,10 +409,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
CONFIG_DOMAIN_RESOURCE_32BIT_LIMIT=0xe0000000
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
# CONFIG_ENABLE_TCSS_DISPLAY_DETECTION is not set
# CONFIG_ENABLE_TCSS_USB_DETECTION is not set
# CONFIG_TCSS_HAS_USBC_OPS is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
@ -416,6 +420,8 @@ CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_VTD=y
# CONFIG_ENABLE_EARLY_DMA_PROTECTION is not set
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
@ -437,7 +443,6 @@ CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
# Intel SoC Common coreboot stages and non-IP blocks
#
CONFIG_SOC_INTEL_COMMON_BASECODE=y
CONFIG_SOC_INTEL_COMMON_BASECODE_RAMTOP=y
CONFIG_SOC_INTEL_COMMON_RESET=y
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
CONFIG_PAVP=y
@ -507,6 +512,7 @@ CONFIG_RCBA_LENGTH=0x4000
CONFIG_EC_ACPI=y
CONFIG_EC_SYSTEM76_EC=y
CONFIG_EC_SYSTEM76_EC_DGPU=y
# CONFIG_EC_SYSTEM76_EC_UPDATE is not set
#
# Intel Firmware
@ -533,6 +539,7 @@ CONFIG_BIOS_VENDOR="3mdeb"
# Dasharo Configuration
#
CONFIG_DASHARO_PREFER_S3_SLEEP=y
# CONFIG_DASHARO_FIRMWARE_UPDATE_MODE is not set
# end of Dasharo Configuration
CONFIG_UDK_BASE=y
@ -549,7 +556,10 @@ CONFIG_ARCH_ROMSTAGE_X86_32=y
CONFIG_ARCH_POSTCAR_X86_32=y
CONFIG_ARCH_RAMSTAGE_X86_32=y
CONFIG_ARCH_ALL_STAGES_X86_32=y
CONFIG_RESERVED_PHYSICAL_ADDRESS_BITS_SUPPORT=y
CONFIG_X86_CUSTOM_BOOTMEDIA=y
CONFIG_POSTRAM_CBFS_CACHE_IN_BSS=y
CONFIG_RAMSTAGE_CBFS_CACHE_SIZE=0x4000
CONFIG_PC80_SYSTEM=y
CONFIG_HAVE_CMOS_DEFAULT=y
CONFIG_POSTCAR_STAGE=y
@ -586,7 +596,7 @@ CONFIG_BOOTSPLASH=y
CONFIG_PCI=y
CONFIG_ECAM_MMCONF_SUPPORT=y
CONFIG_PCIX_PLUGIN_SUPPORT=y
CONFIG_AZALIA_PLUGIN_SUPPORT=y
CONFIG_AZALIA_HDA_CODEC_SUPPORT=y
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
@ -597,8 +607,6 @@ CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
# CONFIG_PCIEXP_LANE_ERR_STAT_CLEAR is not set
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
CONFIG_FIRMWARE_CONNECTION_MANAGER=y
# CONFIG_SOFTWARE_CONNECTION_MANAGER is not set
# CONFIG_EARLY_PCI_BRIDGE is not set
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
@ -668,7 +676,12 @@ CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
CONFIG_FSP_MULTIPHASE_SI_INIT_RETURN_BROKEN=y
CONFIG_INTEL_GMA_ACPI=y
CONFIG_VBT_CBFS_COMPRESSION_LZMA=y
# CONFIG_VBT_CBFS_COMPRESSION_LZ4 is not set
# CONFIG_VBT_CBFS_COMPRESSION_NONE is not set
CONFIG_VBT_CBFS_COMPRESSION_ALGORITHM="lzma"
CONFIG_INTEL_GMA_OPREGION_2_1=y
CONFIG_INTEL_GMA_VERSION_2=y
CONFIG_DRIVERS_INTEL_PMC=y
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
@ -680,6 +693,7 @@ CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
# CONFIG_DRIVERS_SIL_3114 is not set
CONFIG_DRIVERS_USB_ACPI=y
CONFIG_DRIVERS_WIFI_GENERIC=y
CONFIG_DRIVERS_MTK_WIFI=y
CONFIG_MP_SERVICES_PPI=y
CONFIG_MP_SERVICES_PPI_V2=y
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
@ -720,6 +734,7 @@ CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
CONFIG_PCR_BOOT_MODE=1
CONFIG_PCR_HWID=1
CONFIG_PCR_SRTM=2
CONFIG_PCR_FW_VER=10
CONFIG_PCR_RUNTIME_DATA=3
# end of Trusted Platform Module
@ -739,6 +754,7 @@ CONFIG_BOOTMEDIA_LOCK_CONTROLLER=y
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
CONFIG_BOOTMEDIA_LOCK_WHOLE_RO=y
# CONFIG_BOOTMEDIA_LOCK_WHOLE_NO_ACCESS is not set
# CONFIG_BOOTMEDIA_LOCK_WPRO_VBOOT_RO is not set
# CONFIG_BOOTMEDIA_SMM_BWP is not set
# end of Security
@ -753,6 +769,7 @@ CONFIG_BOOT_DEVICE_SPI_FLASH=y
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
CONFIG_RTC=y
CONFIG_HEAP_SIZE=0x100000
#
# Console
@ -816,6 +833,13 @@ CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
CONFIG_PAYLOAD_OPTIONS=""
# CONFIG_PXE is not set
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
#
# Dasharo specific payload options
#
# end of Dasharo specific payload options
# CONFIG_PAYLOAD_IS_FLAT_BINARY is not set
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
@ -840,6 +864,10 @@ CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
#
# CONFIG_DISPLAY_MTRRS is not set
#
# Vendorcode Debug Settings
#
#
# BLOB Debug Settings
#

73
config/linux-nitropad-x.config → config/linux-novacustom-common.config
View File

@ -2,14 +2,14 @@
# Automatically generated file; DO NOT EDIT.
# Linux/x86 6.1.8 Kernel Configuration
#
CONFIG_CC_VERSION_TEXT="x86_64-linux-musl-gcc (GCC) 8.3.0"
CONFIG_CC_VERSION_TEXT="x86_64-linux-musl-gcc (GCC) 9.4.0"
CONFIG_CC_IS_GCC=y
CONFIG_GCC_VERSION=80300
CONFIG_GCC_VERSION=90400
CONFIG_CLANG_VERSION=0
CONFIG_AS_IS_GNU=y
CONFIG_AS_VERSION=23200
CONFIG_AS_VERSION=23301
CONFIG_LD_IS_BFD=y
CONFIG_LD_VERSION=23200
CONFIG_LD_VERSION=23301
CONFIG_LLD_VERSION=0
CONFIG_CC_CAN_LINK=y
CONFIG_CC_CAN_LINK_STATIC=y
@ -194,7 +194,7 @@ CONFIG_POSIX_TIMERS=y
CONFIG_PRINTK=y
CONFIG_BUG=y
CONFIG_PCSPKR_PLATFORM=y
# CONFIG_BASE_FULL is not set
CONFIG_BASE_FULL=y
CONFIG_FUTEX=y
CONFIG_FUTEX_PI=y
CONFIG_EPOLL=y
@ -210,7 +210,7 @@ CONFIG_MEMBARRIER=y
CONFIG_ARCH_HAS_MEMBARRIER_SYNC_CORE=y
CONFIG_KCMP=y
# CONFIG_RSEQ is not set
CONFIG_EMBEDDED=y
# CONFIG_EMBEDDED is not set
CONFIG_HAVE_PERF_EVENTS=y
# CONFIG_PC104 is not set
@ -258,6 +258,7 @@ CONFIG_CC_HAS_SANE_STACKPROTECTOR=y
#
CONFIG_SMP=y
CONFIG_X86_FEATURE_NAMES=y
CONFIG_X86_X2APIC=y
# CONFIG_X86_MPPARSE is not set
# CONFIG_GOLDFISH is not set
# CONFIG_X86_CPU_RESCTRL is not set
@ -322,7 +323,9 @@ CONFIG_X86_MCE_THRESHOLD=y
# CONFIG_X86_VSYSCALL_EMULATION is not set
CONFIG_X86_IOPL_IOPERM=y
# CONFIG_MICROCODE is not set
CONFIG_MICROCODE=y
CONFIG_MICROCODE_INTEL=y
# CONFIG_MICROCODE_LATE_LOADING is not set
# CONFIG_X86_MSR is not set
# CONFIG_X86_CPUID is not set
# CONFIG_X86_5LEVEL is not set
@ -342,6 +345,7 @@ CONFIG_CC_HAS_IBT=y
CONFIG_X86_INTEL_TSX_MODE_OFF=y
# CONFIG_X86_INTEL_TSX_MODE_ON is not set
# CONFIG_X86_INTEL_TSX_MODE_AUTO is not set
# CONFIG_X86_SGX is not set
CONFIG_EFI=y
# CONFIG_EFI_STUB is not set
# CONFIG_HZ_100 is not set
@ -376,7 +380,8 @@ CONFIG_HAVE_LIVEPATCH=y
CONFIG_CC_HAS_RETURN_THUNK=y
CONFIG_SPECULATION_MITIGATIONS=y
CONFIG_PAGE_TABLE_ISOLATION=y
# CONFIG_RETPOLINE is not set
CONFIG_RETPOLINE=y
CONFIG_RETHUNK=y
CONFIG_CPU_IBRS_ENTRY=y
CONFIG_ARCH_HAS_ADD_PAGES=y
CONFIG_ARCH_MHP_MEMMAP_ON_MEMORY_ENABLE=y
@ -633,7 +638,7 @@ CONFIG_GCC_PLUGINS=y
# end of General architecture-dependent options
CONFIG_RT_MUTEXES=y
CONFIG_BASE_SMALL=1
CONFIG_BASE_SMALL=0
CONFIG_MODULES=y
# CONFIG_MODULE_FORCE_LOAD is not set
# CONFIG_MODULE_UNLOAD is not set
@ -766,6 +771,7 @@ CONFIG_ZONE_DMA32=y
# GUP_TEST needs to have DEBUG_FS enabled
#
CONFIG_ARCH_HAS_PTE_SPECIAL=y
CONFIG_SECRETMEM=y
# CONFIG_USERFAULTFD is not set
# CONFIG_LRU_GEN is not set
@ -1024,6 +1030,7 @@ CONFIG_EFI_RUNTIME_WRAPPERS=y
# CONFIG_EFI_TEST is not set
# CONFIG_EFI_RCI2_TABLE is not set
# CONFIG_EFI_DISABLE_PCI_DMA is not set
CONFIG_EFI_EARLYCON=y
CONFIG_EFI_CUSTOM_SSDT_OVERLAYS=y
# CONFIG_EFI_DISABLE_RUNTIME is not set
# CONFIG_EFI_COCO_SECRET is not set
@ -1554,19 +1561,26 @@ CONFIG_LDISC_AUTOLOAD=y
#
# Serial drivers
#
CONFIG_SERIAL_EARLYCON=y
CONFIG_SERIAL_8250=y
# CONFIG_SERIAL_8250_DEPRECATED_OPTIONS is not set
# CONFIG_SERIAL_8250_PNP is not set
CONFIG_SERIAL_8250_PNP=y
# CONFIG_SERIAL_8250_16550A_VARIANTS is not set
# CONFIG_SERIAL_8250_FINTEK is not set
# CONFIG_SERIAL_8250_CONSOLE is not set
# CONFIG_SERIAL_8250_PCI is not set
CONFIG_SERIAL_8250_NR_UARTS=4
CONFIG_SERIAL_8250_RUNTIME_UARTS=4
# CONFIG_SERIAL_8250_EXTENDED is not set
# CONFIG_SERIAL_8250_DW is not set
CONFIG_SERIAL_8250_CONSOLE=y
CONFIG_SERIAL_8250_PCI=y
CONFIG_SERIAL_8250_EXAR=y
CONFIG_SERIAL_8250_NR_UARTS=32
CONFIG_SERIAL_8250_RUNTIME_UARTS=32
CONFIG_SERIAL_8250_EXTENDED=y
CONFIG_SERIAL_8250_MANY_PORTS=y
CONFIG_SERIAL_8250_SHARE_IRQ=y
# CONFIG_SERIAL_8250_DETECT_IRQ is not set
# CONFIG_SERIAL_8250_RSA is not set
CONFIG_SERIAL_8250_DWLIB=y
CONFIG_SERIAL_8250_DW=y
# CONFIG_SERIAL_8250_RT288X is not set
# CONFIG_SERIAL_8250_LPSS is not set
CONFIG_SERIAL_8250_LPSS=y
# CONFIG_SERIAL_8250_MID is not set
# CONFIG_SERIAL_8250_PERICOM is not set
@ -1575,6 +1589,7 @@ CONFIG_SERIAL_8250_RUNTIME_UARTS=4
#
# CONFIG_SERIAL_UARTLITE is not set
CONFIG_SERIAL_CORE=y
CONFIG_SERIAL_CORE_CONSOLE=y
# CONFIG_SERIAL_JSM is not set
# CONFIG_SERIAL_LANTIQ is not set
# CONFIG_SERIAL_SCCNXP is not set
@ -1631,7 +1646,7 @@ CONFIG_TCG_TIS=y
# CONFIG_XILLYBUS is not set
# CONFIG_XILLYUSB is not set
CONFIG_RANDOM_TRUST_CPU=y
# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
CONFIG_RANDOM_TRUST_BOOTLOADER=y
# end of Character devices
#
@ -2518,7 +2533,7 @@ CONFIG_INTEL_IOMMU_SVM=y
CONFIG_INTEL_IOMMU_DEFAULT_ON=y
CONFIG_INTEL_IOMMU_FLOPPY_WA=y
# CONFIG_INTEL_IOMMU_SCALABLE_MODE_DEFAULT_ON is not set
# CONFIG_IRQ_REMAP is not set
CONFIG_IRQ_REMAP=y
#
# Remoteproc drivers
@ -2854,8 +2869,10 @@ CONFIG_CRYPTO_HASH=y
CONFIG_CRYPTO_HASH2=y
CONFIG_CRYPTO_RNG=y
CONFIG_CRYPTO_RNG2=y
CONFIG_CRYPTO_RNG_DEFAULT=y
CONFIG_CRYPTO_AKCIPHER2=y
CONFIG_CRYPTO_KPP2=y
CONFIG_CRYPTO_KPP=y
CONFIG_CRYPTO_ACOMP2=y
CONFIG_CRYPTO_MANAGER=y
CONFIG_CRYPTO_MANAGER2=y
@ -2875,7 +2892,8 @@ CONFIG_CRYPTO_SIMD=y
#
# CONFIG_CRYPTO_RSA is not set
# CONFIG_CRYPTO_DH is not set
# CONFIG_CRYPTO_ECDH is not set
CONFIG_CRYPTO_ECC=y
CONFIG_CRYPTO_ECDH=y
# CONFIG_CRYPTO_ECDSA is not set
# CONFIG_CRYPTO_ECRDSA is not set
# CONFIG_CRYPTO_SM2 is not set
@ -2944,7 +2962,7 @@ CONFIG_CRYPTO_MD5=y
CONFIG_CRYPTO_SHA1=y
CONFIG_CRYPTO_SHA256=y
CONFIG_CRYPTO_SHA512=y
# CONFIG_CRYPTO_SHA3 is not set
CONFIG_CRYPTO_SHA3=y
# CONFIG_CRYPTO_SM3_GENERIC is not set
# CONFIG_CRYPTO_STREEBOG is not set
# CONFIG_CRYPTO_VMAC is not set
@ -2976,8 +2994,12 @@ CONFIG_CRYPTO_CRC32C=y
# Random number generation
#
# CONFIG_CRYPTO_ANSI_CPRNG is not set
# CONFIG_CRYPTO_DRBG_MENU is not set
# CONFIG_CRYPTO_JITTERENTROPY is not set
CONFIG_CRYPTO_DRBG_MENU=y
CONFIG_CRYPTO_DRBG_HMAC=y
# CONFIG_CRYPTO_DRBG_HASH is not set
# CONFIG_CRYPTO_DRBG_CTR is not set
CONFIG_CRYPTO_DRBG=y
CONFIG_CRYPTO_JITTERENTROPY=y
# end of Random number generation
#
@ -2987,6 +3009,7 @@ CONFIG_CRYPTO_USER_API=y
CONFIG_CRYPTO_USER_API_HASH=y
CONFIG_CRYPTO_USER_API_SKCIPHER=y
CONFIG_CRYPTO_USER_API_RNG=y
# CONFIG_CRYPTO_USER_API_RNG_CAVP is not set
CONFIG_CRYPTO_USER_API_AEAD=y
# CONFIG_CRYPTO_USER_API_ENABLE_OBSOLETE is not set
# CONFIG_CRYPTO_STATS is not set
@ -3090,7 +3113,7 @@ CONFIG_LIBCRC32C=y
CONFIG_XZ_DEC=y
CONFIG_XZ_DEC_X86=y
# CONFIG_XZ_DEC_POWERPC is not set
# CONFIG_XZ_DEC_IA64 is not set
CONFIG_XZ_DEC_IA64=y
# CONFIG_XZ_DEC_ARM is not set
# CONFIG_XZ_DEC_ARMTHUMB is not set
# CONFIG_XZ_DEC_SPARC is not set
@ -3264,7 +3287,7 @@ CONFIG_WQ_WATCHDOG=y
#
# Scheduler Debugging
#
# CONFIG_SCHED_DEBUG is not set
CONFIG_SCHED_DEBUG=y
# CONFIG_SCHEDSTATS is not set
# end of Scheduler Debugging

9
modules/coreboot
View File

@ -91,11 +91,12 @@ coreboot-purism_repo := https://source.puri.sm/firmware/coreboot.git
coreboot-purism_commit_hash := bea9947a1279be7d4a72b38a601d0288d10d1cb8
$(eval $(call coreboot_module,purism,24.02.01))
# MSI and Nitropad NV41 / NS50 boards are based on Dasharo coreboot port
# MSI and NovaCustom NV4xPZ, NS5xPU, V560TU boards are based on Dasharo
# coreboot fork, based on upstream coreboot version 24.02
coreboot-dasharo_repo := https://github.com/dasharo/coreboot
coreboot-dasharo_commit_hash := 3a9aa3a4692f3dd49732f5b4e3ec54be385f0969
coreboot-dasharo_patch_version := unreleased
$(eval $(call coreboot_module,dasharo,))
coreboot-dasharo_commit_hash := 94e5f5d5b808cf8d8fd5c70d4ef6a08a054f8986
$(eval $(call coreboot_module,dasharo,24.02.01))
#coreboot-dasharo_patch_version := unreleased
# Check that the board configured the coreboot version correctly
ifeq "$(CONFIG_COREBOOT_VERSION)" ""

8
modules/linux
View File

@ -36,7 +36,7 @@ linux_version := 6.1.8
linux_hash := b60bb53ab8ba370a270454b11e93d41af29126fc72bd6ede517673e2e57b816d
else
$(error "$(BOARD): does not specify linux kernel version under CONFIG_LINUX_VERSION")
endif
endif
linux_base_dir := linux-$(linux_version)
@ -219,7 +219,7 @@ $(build)/$(BOARD)/$(LINUX_IMAGE_FILE).bundled: \
# modify_and_save_defconfig_in_place target allows us edit current in tree config
# under linux decompressed+patched directory through menuconfig
# and put it back in git tree to check changes with git difftool iteratively
# and put it back in git tree to check changes with git difftool iteratively
linux.modify_and_save_defconfig_in_place:
cp "$(pwd)/$(linux_kconfig)" "$(build)/$(linux_dir)/.config" && \
$(MAKE) \
@ -280,7 +280,7 @@ linux.save_in_versioned_defconfig_format:
# This one can be used in kernel version bump, which will accept all new defconfig options for the new version.
# PLEASE VERIFY CHANGES AND KEEP THINGS MINIMAL IN PRs.
linux.save_in_oldconfig_format_in_place:
linux.save_in_olddefconfig_format_in_place:
mkdir -p "$(build)/$(linux_dir)" \
&& cp "$(pwd)/$(linux_kconfig)" "$(build)/$(linux_dir)/.config" \
&& $(MAKE) -C "$(build)/$(linux_base_dir)" \
@ -304,7 +304,7 @@ linux.save_in_versioned_oldconfig:
# Then bump board config's CONFIG_LINUX_VERSION. build as usual to extract new linux tarball.
# Then call make BOARD=xyz linux.prompt_for_new_config_options_for_kernel_version_bump
#The following ask new config choice for all new symbols that should be evaluated prior of creating PR
# Tip: Open a browser at https://www.kernelconfig.io/index.html
# Tip: Open a browser at https://www.kernelconfig.io/index.html
linux.prompt_for_new_config_options_for_kernel_version_bump:
mkdir -p "$(build)/$(linux_dir)" \
&& cp "$(pwd)/$(linux_kconfig)" "$(build)/$(linux_dir)/.config" \

27
patches/coreboot-dasharo-unreleased/0001-tpm_pirq-not_conditional.patch
View File

@ -1,27 +0,0 @@
From 6cd77aa95a7ab46771874b72c7dba6b3600d9b29 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= <michal.zygowski@3mdeb.com>
Date: Mon, 13 May 2024 09:31:27 +0200
Subject: [PATCH] src/mainboard/clevo/adl-p/Kconfig: Add missing TPM PIRQ for
NV41
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
---
src/mainboard/clevo/adl-p/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/mainboard/clevo/adl-p/Kconfig b/src/mainboard/clevo/adl-p/Kconfig
index 6e4b679d4d1..e9bcf53c7be 100644
--- a/src/mainboard/clevo/adl-p/Kconfig
+++ b/src/mainboard/clevo/adl-p/Kconfig
@@ -115,7 +115,7 @@ config FMDFILE
default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT && VBOOT_SLOTS_RW_A
config TPM_PIRQ
- default 0x27 if BOARD_CLEVO_NS50PU_BASE # GPP_E1
+ default 0x27 # GPP_E1
config SOC_INTEL_CSE_SEND_EOP_EARLY
default n

391
patches/coreboot-dasharo-unreleased/0002-pr0_chipset_locking-post_skylake.patch
View File

@ -1,391 +0,0 @@
From ff22122c229bbe2109de92ded773493428f7ece9 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= <michal.zygowski@3mdeb.com>
Date: Sun, 20 Oct 2024 13:15:19 +0200
Subject: [PATCH] soc/intel/lockdown: Allow locking down SPI and LPC in SMM
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
Heads payload uses APM_CNT_FINALIZE SMI to set and lock down
the SPI controller with PR0 flash protection. Add new option
to skip LPC and FAST SPI lock down in coreboot and move it
to APM_CNT_FINALIZE SMI handler.
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
---
src/soc/intel/alderlake/finalize.c | 4 ++-
src/soc/intel/cannonlake/finalize.c | 3 +-
src/soc/intel/common/block/lpc/Makefile.inc | 4 +++
src/soc/intel/common/block/smm/smihandler.c | 10 ++++++
.../common/pch/include/intelpch/lockdown.h | 3 ++
src/soc/intel/common/pch/lockdown/Kconfig | 15 ++++++++
.../intel/common/pch/lockdown/Makefile.inc | 5 +++
src/soc/intel/common/pch/lockdown/lockdown.c | 33 +++++------------
.../intel/common/pch/lockdown/lockdown_lpc.c | 23 ++++++++++++
.../intel/common/pch/lockdown/lockdown_spi.c | 35 +++++++++++++++++++
src/soc/intel/denverton_ns/lpc.c | 3 +-
src/soc/intel/elkhartlake/finalize.c | 3 +-
src/soc/intel/jasperlake/finalize.c | 3 +-
src/soc/intel/meteorlake/finalize.c | 3 +-
src/soc/intel/skylake/finalize.c | 3 +-
src/soc/intel/tigerlake/finalize.c | 3 +-
src/soc/intel/xeon_sp/finalize.c | 3 +-
17 files changed, 123 insertions(+), 33 deletions(-)
create mode 100644 src/soc/intel/common/pch/lockdown/lockdown_lpc.c
create mode 100644 src/soc/intel/common/pch/lockdown/lockdown_spi.c
diff --git a/src/soc/intel/alderlake/finalize.c b/src/soc/intel/alderlake/finalize.c
index 460c8af174e..9cd9351d96a 100644
--- a/src/soc/intel/alderlake/finalize.c
+++ b/src/soc/intel/alderlake/finalize.c
@@ -84,7 +84,9 @@ static void soc_finalize(void *unused)
printk(BIOS_DEBUG, "Finalizing chipset.\n");
pch_finalize();
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
+
tbt_finalize();
if (CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT) &&
CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE))
diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c
index ba7fc69b552..b5f727e97c7 100644
--- a/src/soc/intel/cannonlake/finalize.c
+++ b/src/soc/intel/cannonlake/finalize.c
@@ -87,7 +87,8 @@ static void soc_finalize(void *unused)
printk(BIOS_DEBUG, "Finalizing chipset.\n");
pch_finalize();
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT) &&
CONFIG(SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC))
heci1_disable();
diff --git a/src/soc/intel/common/block/lpc/Makefile.inc b/src/soc/intel/common/block/lpc/Makefile.inc
index b510cd0ec35..60792654b5a 100644
--- a/src/soc/intel/common/block/lpc/Makefile.inc
+++ b/src/soc/intel/common/block/lpc/Makefile.inc
@@ -5,3 +5,7 @@ romstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c
ramstage-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc.c
+
+ifeq ($(CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM),y)
+smm-$(CONFIG_SOC_INTEL_COMMON_BLOCK_LPC) += lpc_lib.c
+endif
diff --git a/src/soc/intel/common/block/smm/smihandler.c b/src/soc/intel/common/block/smm/smihandler.c
index 4bfd17bfd07..dcd74764957 100644
--- a/src/soc/intel/common/block/smm/smihandler.c
+++ b/src/soc/intel/common/block/smm/smihandler.c
@@ -15,12 +15,14 @@
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <elog.h>
+#include <intelblocks/cfg.h>
#include <intelblocks/fast_spi.h>
#include <intelblocks/oc_wdt.h>
#include <intelblocks/pmclib.h>
#include <intelblocks/smihandler.h>
#include <intelblocks/tco.h>
#include <intelblocks/uart.h>
+#include <intelpch/lockdown.h>
#include <smmstore.h>
#include <soc/nvs.h>
#include <soc/pci_devs.h>
@@ -343,6 +345,14 @@ static void finalize(void)
}
finalize_done = 1;
+ if (CONFIG(SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM)) {
+ /* SPI lock down configuration */
+ fast_spi_lockdown_bios(CHIPSET_LOCKDOWN_COREBOOT);
+
+ /* LPC/eSPI lock down configuration */
+ lpc_lockdown_config(CHIPSET_LOCKDOWN_COREBOOT);
+ }
+
if (CONFIG(SPI_FLASH_SMM))
/* Re-init SPI driver to handle locked BAR */
fast_spi_init();
diff --git a/src/soc/intel/common/pch/include/intelpch/lockdown.h b/src/soc/intel/common/pch/include/intelpch/lockdown.h
index b5aba06fe0e..1b96f41a2a4 100644
--- a/src/soc/intel/common/pch/include/intelpch/lockdown.h
+++ b/src/soc/intel/common/pch/include/intelpch/lockdown.h
@@ -22,4 +22,7 @@ int get_lockdown_config(void);
*/
void soc_lockdown_config(int chipset_lockdown);
+void fast_spi_lockdown_bios(int chipset_lockdown);
+void lpc_lockdown_config(int chipset_lockdown);
+
#endif /* SOC_INTEL_COMMON_PCH_LOCKDOWN_H */
diff --git a/src/soc/intel/common/pch/lockdown/Kconfig b/src/soc/intel/common/pch/lockdown/Kconfig
index 8fce5e785c2..fbeb341e9ac 100644
--- a/src/soc/intel/common/pch/lockdown/Kconfig
+++ b/src/soc/intel/common/pch/lockdown/Kconfig
@@ -1,7 +1,22 @@
config SOC_INTEL_COMMON_PCH_LOCKDOWN
bool
default n
+ select HAVE_INTEL_CHIPSET_LOCKDOWN
help
This option allows to have chipset lockdown for DMI, FAST_SPI and
soc_lockdown_config() to implement any additional lockdown as PMC,
LPC for supported PCH.
+
+config SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM
+ bool "Lock down SPI controller in SMM"
+ default n
+ depends on HAVE_SMI_HANDLER
+ select SPI_FLASH_SMM
+ help
+ This option allows to have chipset lockdown for FAST_SPI and LPC for
+ supported PCH. If selected, coreboot will skip locking down the SPI
+ and LPC controller. The payload or OS is responsible for locking it
+ using APM_CNT_FINALIZE SMI. Used by heads to set and lock PR0 flash
+ protection.
+
+ If unsure, say N.
\ No newline at end of file
diff --git a/src/soc/intel/common/pch/lockdown/Makefile.inc b/src/soc/intel/common/pch/lockdown/Makefile.inc
index 71466f8edd1..64aad562acf 100644
--- a/src/soc/intel/common/pch/lockdown/Makefile.inc
+++ b/src/soc/intel/common/pch/lockdown/Makefile.inc
@@ -1,2 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-only
ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown_lpc.c
+ramstage-$(CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN) += lockdown_spi.c
+
+smm-$(CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM) += lockdown_lpc.c
+smm-$(CONFIG_SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM) += lockdown_spi.c
diff --git a/src/soc/intel/common/pch/lockdown/lockdown.c b/src/soc/intel/common/pch/lockdown/lockdown.c
index 1b1d99cc0c9..7e52fb826fe 100644
--- a/src/soc/intel/common/pch/lockdown/lockdown.c
+++ b/src/soc/intel/common/pch/lockdown/lockdown.c
@@ -61,21 +61,24 @@ static void fast_spi_lockdown_cfg(int chipset_lockdown)
/* Set FAST_SPI opcode menu */
fast_spi_set_opcode_menu();
- /* Discrete Lock Flash PR registers */
- fast_spi_pr_dlock();
-
/* Check if SPI transaction is pending */
fast_spi_cycle_in_progress();
/* Clear any outstanding status bits like AEL, FCERR, FDONE, SAF etc. */
fast_spi_clear_outstanding_status();
- /* Lock FAST_SPIBAR */
- fast_spi_lock_bar();
-
/* Set Vendor Component Lock (VCL) */
fast_spi_vscc0_lock();
+ if (CONFIG(SOC_INTEL_COMMON_SPI_LOCKDOWN_SMM))
+ return;
+
+ /* Discrete Lock Flash PR registers */
+ fast_spi_pr_dlock();
+
+ /* Lock FAST_SPIBAR */
+ fast_spi_lock_bar();
+
/* Set BIOS Interface Lock, BIOS Lock */
if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
/* BIOS Interface Lock */
@@ -95,24 +98,6 @@ static void fast_spi_lockdown_cfg(int chipset_lockdown)
}
}
-static void lpc_lockdown_config(int chipset_lockdown)
-{
- /* Set BIOS Interface Lock, BIOS Lock */
- if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
- /* BIOS Interface Lock */
- lpc_set_bios_interface_lock_down();
-
- /* Only allow writes in SMM */
- if (CONFIG(BOOTMEDIA_SMM_BWP) && is_smm_bwp_permitted()) {
- lpc_set_eiss();
- lpc_enable_wp();
- }
-
- /* BIOS Lock */
- lpc_set_lock_enable();
- }
-}
-
static void sa_lockdown_config(int chipset_lockdown)
{
if (!CONFIG(SOC_INTEL_COMMON_BLOCK_SA))
diff --git a/src/soc/intel/common/pch/lockdown/lockdown_lpc.c b/src/soc/intel/common/pch/lockdown/lockdown_lpc.c
new file mode 100644
index 00000000000..69278ea343f
--- /dev/null
+++ b/src/soc/intel/common/pch/lockdown/lockdown_lpc.c
@@ -0,0 +1,23 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <intelblocks/cfg.h>
+#include <intelblocks/lpc_lib.h>
+#include <intelpch/lockdown.h>
+
+void lpc_lockdown_config(int chipset_lockdown)
+{
+ /* Set BIOS Interface Lock, BIOS Lock */
+ if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
+ /* BIOS Interface Lock */
+ lpc_set_bios_interface_lock_down();
+
+ /* Only allow writes in SMM */
+ if (CONFIG(BOOTMEDIA_SMM_BWP)) {
+ lpc_set_eiss();
+ lpc_enable_wp();
+ }
+
+ /* BIOS Lock */
+ lpc_set_lock_enable();
+ }
+}
diff --git a/src/soc/intel/common/pch/lockdown/lockdown_spi.c b/src/soc/intel/common/pch/lockdown/lockdown_spi.c
new file mode 100644
index 00000000000..fa09cec7c2e
--- /dev/null
+++ b/src/soc/intel/common/pch/lockdown/lockdown_spi.c
@@ -0,0 +1,35 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <intelblocks/cfg.h>
+#include <intelblocks/fast_spi.h>
+#include <intelpch/lockdown.h>
+
+void fast_spi_lockdown_bios(int chipset_lockdown)
+{
+ if (!CONFIG(SOC_INTEL_COMMON_BLOCK_FAST_SPI))
+ return;
+
+ /* Discrete Lock Flash PR registers */
+ fast_spi_pr_dlock();
+
+ /* Lock FAST_SPIBAR */
+ fast_spi_lock_bar();
+
+ /* Set BIOS Interface Lock, BIOS Lock */
+ if (chipset_lockdown == CHIPSET_LOCKDOWN_COREBOOT) {
+ /* BIOS Interface Lock */
+ fast_spi_set_bios_interface_lock_down();
+
+ /* Only allow writes in SMM */
+ if (CONFIG(BOOTMEDIA_SMM_BWP)) {
+ fast_spi_set_eiss();
+ fast_spi_enable_wp();
+ }
+
+ /* BIOS Lock */
+ fast_spi_set_lock_enable();
+
+ /* EXT BIOS Lock */
+ fast_spi_set_ext_bios_lock_enable();
+ }
+}
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index 7ebca1eb946..8d8acf05088 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -536,7 +536,8 @@ static const struct pci_driver lpc_driver __pci_driver = {
static void finalize_chipset(void *unused)
{
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
}
BOOT_STATE_INIT_ENTRY(BS_OS_RESUME, BS_ON_ENTRY, finalize_chipset, NULL);
diff --git a/src/soc/intel/elkhartlake/finalize.c b/src/soc/intel/elkhartlake/finalize.c
index 275413b4efa..802d02cb596 100644
--- a/src/soc/intel/elkhartlake/finalize.c
+++ b/src/soc/intel/elkhartlake/finalize.c
@@ -43,7 +43,8 @@ static void soc_finalize(void *unused)
printk(BIOS_DEBUG, "Finalizing chipset.\n");
pch_finalize();
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
if (CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT) &&
CONFIG(USE_FSP_NOTIFY_PHASE_END_OF_FIRMWARE))
heci_finalize();
diff --git a/src/soc/intel/jasperlake/finalize.c b/src/soc/intel/jasperlake/finalize.c
index 6cff7a80f30..1b68cc51786 100644
--- a/src/soc/intel/jasperlake/finalize.c
+++ b/src/soc/intel/jasperlake/finalize.c
@@ -75,7 +75,8 @@ static void soc_finalize(void *unused)
printk(BIOS_DEBUG, "Finalizing chipset.\n");
pch_finalize();
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
/* Indicate finalize step with post code */
post_code(POSTCODE_OS_BOOT);
diff --git a/src/soc/intel/meteorlake/finalize.c b/src/soc/intel/meteorlake/finalize.c
index a977b0516e5..951153fa812 100644
--- a/src/soc/intel/meteorlake/finalize.c
+++ b/src/soc/intel/meteorlake/finalize.c
@@ -75,7 +75,8 @@ static void soc_finalize(void *unused)
printk(BIOS_DEBUG, "Finalizing chipset.\n");
pch_finalize();
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
tbt_finalize();
sa_finalize();
if (CONFIG(USE_FSP_NOTIFY_PHASE_READY_TO_BOOT) &&
diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c
index fd80aeac1a0..a147b62e46f 100644
--- a/src/soc/intel/skylake/finalize.c
+++ b/src/soc/intel/skylake/finalize.c
@@ -106,7 +106,8 @@ static void soc_finalize(void *unused)
pch_finalize_script(dev);
soc_lockdown(dev);
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
/* Indicate finalize step with post code */
post_code(POSTCODE_OS_BOOT);
diff --git a/src/soc/intel/tigerlake/finalize.c b/src/soc/intel/tigerlake/finalize.c
index cd02745a9e6..06ce243fe72 100644
--- a/src/soc/intel/tigerlake/finalize.c
+++ b/src/soc/intel/tigerlake/finalize.c
@@ -55,7 +55,8 @@ static void soc_finalize(void *unused)
printk(BIOS_DEBUG, "Finalizing chipset.\n");
pch_finalize();
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
tbt_finalize();
if (CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
heci1_disable();
diff --git a/src/soc/intel/xeon_sp/finalize.c b/src/soc/intel/xeon_sp/finalize.c
index af630fe8127..8e409b8c439 100644
--- a/src/soc/intel/xeon_sp/finalize.c
+++ b/src/soc/intel/xeon_sp/finalize.c
@@ -59,7 +59,8 @@ static void soc_finalize(void *unused)
if (!CONFIG(USE_PM_ACPI_TIMER))
setbits8(pmc_mmio_regs() + PCH_PWRM_ACPI_TMR_CTL, ACPI_TIM_DIS);
- apm_control(APM_CNT_FINALIZE);
+ if (CONFIG(INTEL_CHIPSET_LOCKDOWN) || acpi_is_wakeup_s3())
+ apm_control(APM_CNT_FINALIZE);
lock_pam0123();
if (CONFIG_MAX_SOCKET > 1) {

37
patches/coreboot-dasharo-unreleased/0004-cbmem_tpm-clear_whole_log_on_creation.patch
View File

@ -1,37 +0,0 @@
From b83a7607203d285b76e94ffd2013c55b184f5d42 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Micha=C5=82=20=C5=BBygowski?= <michal.zygowski@3mdeb.com>
Date: Wed, 30 Oct 2024 10:50:37 +0100
Subject: [PATCH] security/tpm/tspi/log-tpm1.c: Clear whole log area on
creation
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
The log area was not entirely cleared on creation resulting in
garbage after the last valid lgo entry. It caused the cbmem utility
to parse invalid events and access data outside the log area.
In the TPM2 log sources, the entire area is being cleared, thus the
issue has not been observed.
Change-Id: I7c780b62b1c6507e1dd1806b20b0270e364cde3d
Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com>
---
src/security/tpm/tspi/log-tpm1.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/security/tpm/tspi/log-tpm1.c b/src/security/tpm/tspi/log-tpm1.c
index 481b569cd5..453e74b4e8 100644
--- a/src/security/tpm/tspi/log-tpm1.c
+++ b/src/security/tpm/tspi/log-tpm1.c
@@ -33,7 +33,7 @@ void *tpm1_log_cbmem_init(void)
if (!tclt)
return NULL;
- memset(tclt, 0, sizeof(*tclt));
+ memset(tclt, 0, tpm_log_len);
hdr = &tclt->spec_id;
/* Fill in first "header" entry. */
--
2.39.5