mirror of
https://github.com/linuxboot/heads.git
synced 2024-12-24 15:16:42 +00:00
Merge pull request #1485 from Nitrokey/nx-nitropad
add Nitropad NV41/NS50 TPM2 boards (2nd)
This commit is contained in:
tlaurion
GitHub
commit
2c3987f9a3
@ -215,7 +215,7 @@ workflows:
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|||||||
# version. The last board in the sequence is the dependency
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# version. The last board in the sequence is the dependency
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||||||
# for the parallel boards built at the end, and also save_cache.
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# for the parallel boards built at the end, and also save_cache.
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||||||
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# Coreboot 4.19
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# coreboot 4.19
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- build_and_persist:
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- build_and_persist:
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name: x230-hotp-maximized
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name: x230-hotp-maximized
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target: x230-hotp-maximized
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target: x230-hotp-maximized
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||||||
@ -223,7 +223,7 @@ workflows:
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requires:
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requires:
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- prep_env
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- prep_env
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# Coreboot 4.17
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# coreboot-git librems
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- build_and_persist:
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- build_and_persist:
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name: librem_14
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name: librem_14
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target: librem_14
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target: librem_14
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@ -231,7 +231,19 @@ workflows:
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requires:
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requires:
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- x230-hotp-maximized
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- x230-hotp-maximized
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# Coreboot for Talos (PPC)
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# coreboot-git Nitropads depending on x230-hotp-maximized cache
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# since kernel is 6.x and coreboot is git is unshared
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# We use nitropad's coreboot's fork crossgcc
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# No need to wait further for other board's cache.
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# We reuse built modules from x230-hotp-maximized cache only
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- build_and_persist:
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name: nitropad-nv41
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target: nitropad-nv41
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subcommand: ""
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requires:
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- x230-hotp-maximized
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# coreboot-git Talos II (PPC)
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- build_and_persist:
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- build_and_persist:
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name: talos-2
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name: talos-2
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arch: ppc64
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arch: ppc64
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@ -243,10 +255,9 @@ workflows:
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#Cache one workspace per architecture. Make sure workspace caches are chainloaded and the last in chain for an arch is saved.
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#Cache one workspace per architecture. Make sure workspace caches are chainloaded and the last in chain for an arch is saved.
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- save_cache:
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- save_cache:
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requires:
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requires:
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- librem_14
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- talos-2
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- talos-2
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- nitropad-nv41
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#
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#
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#
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# Those onboarding new boards should add their entries below.
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# Those onboarding new boards should add their entries below.
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#
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#
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@ -498,7 +509,7 @@ workflows:
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requires:
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requires:
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- x230-hotp-maximized
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- x230-hotp-maximized
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#Coreboot 4.17 boards
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#coreboot-git librem boards
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- build:
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- build:
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name: librem_13v2
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name: librem_13v2
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target: librem_13v2
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target: librem_13v2
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@ -541,6 +552,14 @@ workflows:
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requires:
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requires:
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- librem_14
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- librem_14
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#coreboot-git dasharo clevo_release + staging IASL patch
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- build:
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name: nitropad-ns50
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target: nitropad-ns50
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subcommand: ""
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requires:
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- nitropad-nv41
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# - build:
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# - build:
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# name: UNTESTED_kgpe-d16_workstation-usb_keyboard
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# name: UNTESTED_kgpe-d16_workstation-usb_keyboard
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# target: UNTESTED_kgpe-d16_workstation-usb_keyboard
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# target: UNTESTED_kgpe-d16_workstation-usb_keyboard
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9
Makefile
9
Makefile
@ -304,11 +304,17 @@ define define_module =
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echo -n '$($1_repo)|$($1_commit_hash)' > "$$@"; \
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echo -n '$($1_repo)|$($1_commit_hash)' > "$$@"; \
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elif [ "$$$$(cat "$$@")" != '$($1_repo)|$($1_commit_hash)' ]; then \
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elif [ "$$$$(cat "$$@")" != '$($1_repo)|$($1_commit_hash)' ]; then \
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echo "Switching $1 to $($1_repo) at $($1_commit_hash)" && \
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echo "Switching $1 to $($1_repo) at $($1_commit_hash)" && \
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git -C "$(build)/$($1_base_dir)" fetch $($1_repo) $($1_commit_hash) && \
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git -C "$(build)/$($1_base_dir)" reset --hard HEAD^ && \
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echo "git fetch $($1_repo) $($1_commit_hash) --recurse-submodules=no" && \
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git -C "$(build)/$($1_base_dir)" fetch $($1_repo) $($1_commit_hash) --recurse-submodules=no && \
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echo "git reset --hard $($1_commit_hash)" && \
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git -C "$(build)/$($1_base_dir)" reset --hard $($1_commit_hash) && \
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git -C "$(build)/$($1_base_dir)" reset --hard $($1_commit_hash) && \
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echo "git clean" && \
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git -C "$(build)/$($1_base_dir)" clean -df && \
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git -C "$(build)/$($1_base_dir)" clean -df && \
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git -C "$(build)/$($1_base_dir)" clean -dffx payloads util/cbmem && \
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git -C "$(build)/$($1_base_dir)" clean -dffx payloads util/cbmem && \
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echo "git submodule sync" && \
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git -C "$(build)/$($1_base_dir)" submodule sync && \
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git -C "$(build)/$($1_base_dir)" submodule sync && \
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echo "git submodule update" && \
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git -C "$(build)/$($1_base_dir)" submodule update --init --checkout && \
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git -C "$(build)/$($1_base_dir)" submodule update --init --checkout && \
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echo -n '$($1_repo)|$($1_commit_hash)' > "$$@"; \
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echo -n '$($1_repo)|$($1_commit_hash)' > "$$@"; \
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fi
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fi
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@ -527,6 +533,7 @@ bin_modules-$(CONFIG_KBD) += kbd
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bin_modules-$(CONFIG_ZSTD) += zstd
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bin_modules-$(CONFIG_ZSTD) += zstd
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bin_modules-$(CONFIG_E2FSPROGS) += e2fsprogs
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bin_modules-$(CONFIG_E2FSPROGS) += e2fsprogs
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bin_modules-$(CONFIG_EXFATPROGS) += exfatprogs
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bin_modules-$(CONFIG_EXFATPROGS) += exfatprogs
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bin_modules-$(CONFIG_IOTOOLS) += iotools
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$(foreach m, $(bin_modules-y), \
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$(foreach m, $(bin_modules-y), \
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$(call map,initrd_bin_add,$(call bins,$m)) \
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$(call map,initrd_bin_add,$(call bins,$m)) \
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55
boards/nitropad-ns50/nitropad-ns50.config
Normal file
55
boards/nitropad-ns50/nitropad-ns50.config
Normal file
@ -0,0 +1,55 @@
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# Nitrokey Nitropad NS51 board configuration
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export CONFIG_COREBOOT=y
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export CONFIG_COREBOOT_VERSION=nitrokey
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export CONFIG_LINUX_VERSION=6.1.8
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CONFIG_COREBOOT_CONFIG=config/coreboot-nitropad-ns50.config
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CONFIG_LINUX_CONFIG=config/linux-nitropad-x.config
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CONFIG_NITROKEY_BLOBS=y
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CONFIG_KEXEC=y
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CONFIG_QRENCODE=y
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CONFIG_TPMTOTP=y
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CONFIG_POPT=y
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CONFIG_FLASHTOOLS=y
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CONFIG_FLASHROM=y
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CONFIG_PCIUTILS=y
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CONFIG_UTIL_LINUX=y
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CONFIG_CRYPTSETUP2=y
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CONFIG_GPG2=y
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CONFIG_LVM2=y
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CONFIG_MBEDTLS=y
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CONFIG_IOTOOLS=y
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CONFIG_DROPBEAR=y
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CONFIG_MSRTOOLS=y
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CONFIG_HOTPKEY=y
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CONFIG_CAIRO=y
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CONFIG_FBWHIPTAIL=y
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CONFIG_LINUX_USB=y
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CONFIG_LINUX_E1000=y
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export CONFIG_BOOTSCRIPT=/bin/gui-init
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export CONFIG_BOOT_KERNEL_ADD="intel_iommu=igfx_off"
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export CONFIG_BOOT_KERNEL_REMOVE="intel_iommu=on intel_iommu=igfx_off"
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# TPM2 requirements
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export CONFIG_TPM2_TOOLS=y
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export CONFIG_PRIMARY_KEY_TYPE=ecc
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CONFIG_TPM2_TSS=y
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CONFIG_OPENSSL=y
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export CONFIG_TPM_NO_LUKS_DISK_UNLOCK=y
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export CONFIG_BOOT_DEV="/dev/nvme0n1"
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export CONFIG_BOARD_NAME="Nitropad NS50"
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export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
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55
boards/nitropad-nv41/nitropad-nv41.config
Normal file
55
boards/nitropad-nv41/nitropad-nv41.config
Normal file
@ -0,0 +1,55 @@
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# Nitrokey Nitropad NV41 board configuration
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export CONFIG_COREBOOT=y
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export CONFIG_COREBOOT_VERSION=nitrokey
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export CONFIG_LINUX_VERSION=6.1.8
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CONFIG_COREBOOT_CONFIG=config/coreboot-nitropad-nv41.config
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CONFIG_LINUX_CONFIG=config/linux-nitropad-x.config
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CONFIG_NITROKEY_BLOBS=y
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CONFIG_KEXEC=y
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CONFIG_QRENCODE=y
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CONFIG_TPMTOTP=y
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CONFIG_POPT=y
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CONFIG_FLASHTOOLS=y
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CONFIG_FLASHROM=y
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CONFIG_PCIUTILS=y
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CONFIG_UTIL_LINUX=y
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CONFIG_CRYPTSETUP2=y
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CONFIG_GPG2=y
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CONFIG_LVM2=y
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CONFIG_MBEDTLS=y
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CONFIG_IOTOOLS=y
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CONFIG_DROPBEAR=y
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CONFIG_MSRTOOLS=y
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CONFIG_HOTPKEY=y
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CONFIG_CAIRO=y
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CONFIG_FBWHIPTAIL=y
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CONFIG_LINUX_USB=y
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CONFIG_LINUX_E1000=y
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export CONFIG_BOOTSCRIPT=/bin/gui-init
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|
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export CONFIG_BOOT_KERNEL_ADD="intel_iommu=igfx_off"
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export CONFIG_BOOT_KERNEL_REMOVE="intel_iommu=on intel_iommu=igfx_off"
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# TPM2 requirements
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||||||
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export CONFIG_TPM2_TOOLS=y
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export CONFIG_PRIMARY_KEY_TYPE=ecc
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CONFIG_TPM2_TSS=y
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CONFIG_OPENSSL=y
|
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|
|
||||||
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export CONFIG_TPM_NO_LUKS_DISK_UNLOCK=y
|
||||||
|
|
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export CONFIG_BOOT_DEV="/dev/nvme0n1"
|
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export CONFIG_BOARD_NAME="Nitropad NV41"
|
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export CONFIG_FLASHROM_OPTIONS="--force --noverify-all -p internal"
|
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|
|
||||||
801
config/coreboot-nitropad-ns50.config
Normal file
801
config/coreboot-nitropad-ns50.config
Normal file
@ -0,0 +1,801 @@
|
|||||||
|
#
|
||||||
|
# Automatically generated file; DO NOT EDIT.
|
||||||
|
# coreboot configuration
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# General setup
|
||||||
|
#
|
||||||
|
CONFIG_COREBOOT_BUILD=y
|
||||||
|
CONFIG_LOCALVERSION=""
|
||||||
|
CONFIG_CBFS_PREFIX="fallback"
|
||||||
|
CONFIG_COMPILER_GCC=y
|
||||||
|
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||||
|
CONFIG_ARCH_SUPPORTS_CLANG=y
|
||||||
|
# CONFIG_ANY_TOOLCHAIN is not set
|
||||||
|
# CONFIG_CCACHE is not set
|
||||||
|
# CONFIG_FMD_GENPARSER is not set
|
||||||
|
# CONFIG_UTIL_GENPARSER is not set
|
||||||
|
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||||
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
|
# CONFIG_STATIC_OPTION_TABLE is not set
|
||||||
|
CONFIG_COMPRESS_RAMSTAGE=y
|
||||||
|
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||||
|
CONFIG_COLLECT_TIMESTAMPS=y
|
||||||
|
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||||
|
CONFIG_USE_BLOBS=y
|
||||||
|
# CONFIG_USE_AMD_BLOBS is not set
|
||||||
|
# CONFIG_USE_QC_BLOBS is not set
|
||||||
|
# CONFIG_COVERAGE is not set
|
||||||
|
# CONFIG_UBSAN is not set
|
||||||
|
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
|
||||||
|
# CONFIG_ASAN is not set
|
||||||
|
# CONFIG_NO_STAGE_CACHE is not set
|
||||||
|
CONFIG_TSEG_STAGE_CACHE=y
|
||||||
|
# CONFIG_UPDATE_IMAGE is not set
|
||||||
|
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||||
|
# CONFIG_FW_CONFIG is not set
|
||||||
|
# end of General setup
|
||||||
|
|
||||||
|
#
|
||||||
|
# Mainboard
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Important: Run 'make distclean' before switching boards
|
||||||
|
#
|
||||||
|
# CONFIG_VENDOR_51NB is not set
|
||||||
|
# CONFIG_VENDOR_ACER is not set
|
||||||
|
# CONFIG_VENDOR_ADLINK is not set
|
||||||
|
# CONFIG_VENDOR_AMD is not set
|
||||||
|
# CONFIG_VENDOR_AOPEN is not set
|
||||||
|
# CONFIG_VENDOR_APPLE is not set
|
||||||
|
# CONFIG_VENDOR_ASROCK is not set
|
||||||
|
# CONFIG_VENDOR_ASUS is not set
|
||||||
|
# CONFIG_VENDOR_BAP is not set
|
||||||
|
# CONFIG_VENDOR_BIOSTAR is not set
|
||||||
|
# CONFIG_VENDOR_BOSTENTECH is not set
|
||||||
|
# CONFIG_VENDOR_CAVIUM is not set
|
||||||
|
# CONFIG_VENDOR_CLEVO is not set
|
||||||
|
# CONFIG_VENDOR_COMPULAB is not set
|
||||||
|
# CONFIG_VENDOR_DELL is not set
|
||||||
|
# CONFIG_VENDOR_ELMEX is not set
|
||||||
|
# CONFIG_VENDOR_EMULATION is not set
|
||||||
|
# CONFIG_VENDOR_EXAMPLE is not set
|
||||||
|
# CONFIG_VENDOR_FACEBOOK is not set
|
||||||
|
# CONFIG_VENDOR_FOXCONN is not set
|
||||||
|
# CONFIG_VENDOR_GETAC is not set
|
||||||
|
# CONFIG_VENDOR_GIGABYTE is not set
|
||||||
|
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||||
|
# CONFIG_VENDOR_GOOGLE is not set
|
||||||
|
# CONFIG_VENDOR_HP is not set
|
||||||
|
# CONFIG_VENDOR_IBASE is not set
|
||||||
|
# CONFIG_VENDOR_INTEL is not set
|
||||||
|
# CONFIG_VENDOR_JETWAY is not set
|
||||||
|
# CONFIG_VENDOR_KONTRON is not set
|
||||||
|
# CONFIG_VENDOR_LENOVO is not set
|
||||||
|
# CONFIG_VENDOR_LIBRETREND is not set
|
||||||
|
# CONFIG_VENDOR_LIPPERT is not set
|
||||||
|
# CONFIG_VENDOR_MSI is not set
|
||||||
|
CONFIG_VENDOR_NOVACUSTOM=y
|
||||||
|
# CONFIG_VENDOR_OCP is not set
|
||||||
|
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||||
|
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||||
|
# CONFIG_VENDOR_PCENGINES is not set
|
||||||
|
# CONFIG_VENDOR_PINE64 is not set
|
||||||
|
# CONFIG_VENDOR_PORTWELL is not set
|
||||||
|
# CONFIG_VENDOR_PRODRIVE is not set
|
||||||
|
# CONFIG_VENDOR_PROTECTLI is not set
|
||||||
|
# CONFIG_VENDOR_PURISM is not set
|
||||||
|
# CONFIG_VENDOR_RAZER is not set
|
||||||
|
# CONFIG_VENDOR_RODA is not set
|
||||||
|
# CONFIG_VENDOR_SAMSUNG is not set
|
||||||
|
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||||
|
# CONFIG_VENDOR_SCALEWAY is not set
|
||||||
|
# CONFIG_VENDOR_SIEMENS is not set
|
||||||
|
# CONFIG_VENDOR_SIFIVE is not set
|
||||||
|
# CONFIG_VENDOR_STARLABS is not set
|
||||||
|
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||||
|
# CONFIG_VENDOR_SYSTEM76 is not set
|
||||||
|
# CONFIG_VENDOR_TI is not set
|
||||||
|
# CONFIG_VENDOR_UP is not set
|
||||||
|
CONFIG_MAINBOARD_FAMILY="Not Applicable"
|
||||||
|
CONFIG_MAINBOARD_PART_NUMBER="ns50pu"
|
||||||
|
CONFIG_MAINBOARD_VERSION="v2.1"
|
||||||
|
CONFIG_MAINBOARD_DIR="clevo/adl-p"
|
||||||
|
CONFIG_DIMM_MAX=4
|
||||||
|
CONFIG_DIMM_SPD_SIZE=512
|
||||||
|
CONFIG_FMDFILE=""
|
||||||
|
# CONFIG_NO_POST is not set
|
||||||
|
CONFIG_MAINBOARD_VENDOR="Notebook"
|
||||||
|
CONFIG_CBFS_SIZE=0x1000000
|
||||||
|
# CONFIG_CONSOLE_SERIAL is not set
|
||||||
|
CONFIG_MAX_CPUS=24
|
||||||
|
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||||
|
# CONFIG_POST_DEVICE is not set
|
||||||
|
# CONFIG_POST_IO is not set
|
||||||
|
CONFIG_UART_FOR_CONSOLE=0
|
||||||
|
# CONFIG_VBOOT is not set
|
||||||
|
CONFIG_VBOOT_VBNV_OFFSET=0x56
|
||||||
|
CONFIG_VARIANT_DIR="ns50pu"
|
||||||
|
CONFIG_DEVICETREE="devicetree.cb"
|
||||||
|
# CONFIG_VGA_BIOS is not set
|
||||||
|
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Nitrokey"
|
||||||
|
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
|
||||||
|
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
|
||||||
|
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000
|
||||||
|
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
||||||
|
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||||
|
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||||
|
CONFIG_BOARD_CLEVO_ADLP_COMMON=y
|
||||||
|
CONFIG_BOARD_CLEVO_NS50PU_BASE=y
|
||||||
|
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nitropad NS51"
|
||||||
|
CONFIG_CONSOLE_POST=y
|
||||||
|
# CONFIG_USE_PM_ACPI_TIMER is not set
|
||||||
|
CONFIG_TPM_PIRQ=0x27
|
||||||
|
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
|
||||||
|
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
||||||
|
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||||
|
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||||
|
CONFIG_DCACHE_RAM_SIZE=0xc0000
|
||||||
|
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||||
|
CONFIG_DCACHE_BSP_STACK_SIZE=0x80400
|
||||||
|
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
|
||||||
|
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
|
||||||
|
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||||
|
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||||
|
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||||
|
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||||
|
CONFIG_IFD_BIN_PATH="../nitrokey-blobs/nitropad-ns51/flashdescriptor-HAP.bin"
|
||||||
|
CONFIG_ME_BIN_PATH="../nitrokey-blobs/nitropad-ns51/me.bin"
|
||||||
|
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||||
|
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||||
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_BUSES=42
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000
|
||||||
|
CONFIG_PS2K_EISAID="PNP0303"
|
||||||
|
CONFIG_PS2M_EISAID="PNP0F13"
|
||||||
|
|
||||||
|
#
|
||||||
|
# Alder Lake P (2022)
|
||||||
|
#
|
||||||
|
CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP=y
|
||||||
|
# CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Tiger Lake U (2021)
|
||||||
|
#
|
||||||
|
# CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set
|
||||||
|
# CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set
|
||||||
|
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
||||||
|
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||||
|
CONFIG_PCIEXP_CLK_PM=y
|
||||||
|
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||||
|
CONFIG_HEAP_SIZE=0x10000
|
||||||
|
CONFIG_EC_GPE_SCI=0x50
|
||||||
|
CONFIG_LINUX_COMMAND_LINE="iommu=pt video=eDP-1:1920x1080 drm_kms_helper.drm_leak_fbdev_smem=1 i915.enable_fbc=0"
|
||||||
|
CONFIG_BOARD_ROMSIZE_KB_32768=y
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||||
|
CONFIG_COREBOOT_ROMSIZE_KB_32768=y
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||||
|
CONFIG_COREBOOT_ROMSIZE_KB=32768
|
||||||
|
CONFIG_ROM_SIZE=0x02000000
|
||||||
|
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||||
|
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||||
|
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
||||||
|
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
||||||
|
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||||
|
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
||||||
|
# end of Mainboard
|
||||||
|
|
||||||
|
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Chipset
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# SoC
|
||||||
|
#
|
||||||
|
CONFIG_ARCH_ALL_STAGES_X86=y
|
||||||
|
CONFIG_CHIPSET_DEVICETREE="soc/intel/alderlake/chipset.cb"
|
||||||
|
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
||||||
|
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||||
|
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
|
||||||
|
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||||
|
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe03e000
|
||||||
|
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||||
|
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||||
|
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||||
|
CONFIG_ACPI_BERT=y
|
||||||
|
CONFIG_ACPI_BERT_SIZE=0x10000
|
||||||
|
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
|
||||||
|
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
|
||||||
|
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||||
|
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
||||||
|
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||||
|
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
||||||
|
CONFIG_STACK_SIZE=0x2000
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE=y
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE_PCH_P=y
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT=y
|
||||||
|
CONFIG_ALDERLAKE_CAR_ENHANCED_NEM=y
|
||||||
|
CONFIG_EXT_BIOS_WIN_BASE=0xf8000000
|
||||||
|
CONFIG_EXT_BIOS_WIN_SIZE=0x2000000
|
||||||
|
CONFIG_IFD_CHIPSET="adl"
|
||||||
|
CONFIG_IED_REGION_SIZE=0x400000
|
||||||
|
CONFIG_MAX_PCH_ROOT_PORTS=12
|
||||||
|
CONFIG_MAX_CPU_ROOT_PORTS=3
|
||||||
|
CONFIG_MAX_TBT_ROOT_PORTS=4
|
||||||
|
CONFIG_MAX_ROOT_PORTS=12
|
||||||
|
CONFIG_MAX_PCIE_CLOCK_SRC=10
|
||||||
|
CONFIG_MAX_PCIE_CLOCK_REQ=10
|
||||||
|
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
||||||
|
CONFIG_CPU_BCLK_MHZ=100
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
||||||
|
CONFIG_CPU_XTAL_HZ=38400000
|
||||||
|
CONFIG_SOC_INTEL_UFS_CLK_FREQ_HZ=19200000
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=7
|
||||||
|
CONFIG_SOC_INTEL_I2C_DEV_MAX=8
|
||||||
|
CONFIG_SOC_INTEL_UART_DEV_MAX=7
|
||||||
|
CONFIG_VBT_DATA_SIZE_KB=9
|
||||||
|
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
|
||||||
|
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
|
||||||
|
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/"
|
||||||
|
CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd"
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0
|
||||||
|
CONFIG_DATA_BUS_WIDTH=128
|
||||||
|
CONFIG_DIMMS_PER_CHANNEL=2
|
||||||
|
CONFIG_MRC_CHANNEL_WIDTH=16
|
||||||
|
CONFIG_ACPI_ADL_IPU_ES_SUPPORT=y
|
||||||
|
CONFIG_USE_FSP_MP_INIT=y
|
||||||
|
# CONFIG_USE_COREBOOT_MP_INIT is not set
|
||||||
|
CONFIG_SI_DESC_REGION="SI_DESC"
|
||||||
|
CONFIG_SI_DESC_REGION_SZ=4096
|
||||||
|
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
|
||||||
|
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258
|
||||||
|
CONFIG_INTEL_GMA_BCLV_WIDTH=32
|
||||||
|
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254
|
||||||
|
CONFIG_INTEL_GMA_BCLM_WIDTH=32
|
||||||
|
CONFIG_MAX_HECI_DEVICES=6
|
||||||
|
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||||
|
CONFIG_PCIEXP_ASPM=y
|
||||||
|
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||||
|
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||||
|
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
|
||||||
|
CONFIG_UART_PCI_ADDR=0x0
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||||
|
CONFIG_CBFS_CACHE_ALIGN=8
|
||||||
|
CONFIG_SOC_INTEL_COMMON=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel SoC Common Code for IP blocks
|
||||||
|
#
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||||
|
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||||
|
CONFIG_CAR_HAS_SF_MASKS=y
|
||||||
|
CONFIG_COS_MAPPED_TO_MSB=y
|
||||||
|
CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y
|
||||||
|
CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y
|
||||||
|
CONFIG_CPU_SUPPORTS_INTEL_TME=y
|
||||||
|
CONFIG_INTEL_TME=y
|
||||||
|
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
|
||||||
|
CONFIG_HAVE_HYPERTHREADING=y
|
||||||
|
CONFIG_FSP_HYPERTHREADING=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y
|
||||||
|
CONFIG_SOC_INTEL_CSE_HAVE_HAP=y
|
||||||
|
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_FILE=""
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
|
||||||
|
CONFIG_SOC_INTEL_CSE_SET_EOP=y
|
||||||
|
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
|
||||||
|
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
|
||||||
|
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
|
||||||
|
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||||
|
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||||
|
CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||||
|
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||||
|
CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y
|
||||||
|
CONFIG_PMC_IPC_ACPI_INTERFACE=y
|
||||||
|
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||||
|
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||||
|
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
|
||||||
|
# CONFIG_ENABLE_TCSS_DISPLAY_DETECTION is not set
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||||
|
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
|
||||||
|
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel SoC Common PCH Code
|
||||||
|
#
|
||||||
|
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
||||||
|
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
|
||||||
|
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel SoC Common coreboot stages and non-IP blocks
|
||||||
|
#
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BASECODE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||||
|
CONFIG_PAVP=y
|
||||||
|
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||||
|
CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y
|
||||||
|
# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set
|
||||||
|
CONFIG_SOC_INTEL_CRASHLOG=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# CPU
|
||||||
|
#
|
||||||
|
CONFIG_SSE2=y
|
||||||
|
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||||
|
CONFIG_CPU_INTEL_COMMON=y
|
||||||
|
CONFIG_ENABLE_VMX=y
|
||||||
|
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||||
|
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
||||||
|
CONFIG_CPU_INTEL_COMMON_SMM=y
|
||||||
|
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||||
|
CONFIG_PARALLEL_MP=y
|
||||||
|
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||||
|
CONFIG_XAPIC_ONLY=y
|
||||||
|
# CONFIG_X2APIC_ONLY is not set
|
||||||
|
# CONFIG_X2APIC_RUNTIME is not set
|
||||||
|
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
||||||
|
CONFIG_UDELAY_TSC=y
|
||||||
|
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||||
|
CONFIG_LOGICAL_CPUS=y
|
||||||
|
CONFIG_HAVE_SMI_HANDLER=y
|
||||||
|
CONFIG_SMM_TSEG=y
|
||||||
|
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||||
|
CONFIG_CPU_INFO_V2=y
|
||||||
|
CONFIG_SMP=y
|
||||||
|
CONFIG_SSE=y
|
||||||
|
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||||
|
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||||
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
||||||
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||||
|
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Northbridge
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Southbridge
|
||||||
|
#
|
||||||
|
CONFIG_PCIEXP_HOTPLUG=y
|
||||||
|
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||||
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||||
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||||
|
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||||
|
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
||||||
|
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
||||||
|
CONFIG_RCBA_LENGTH=0x4000
|
||||||
|
|
||||||
|
#
|
||||||
|
# Super I/O
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Embedded Controllers
|
||||||
|
#
|
||||||
|
CONFIG_EC_SYSTEM76_EC=y
|
||||||
|
CONFIG_EC_SYSTEM76_EC_COLOR_KEYBOARD=y
|
||||||
|
CONFIG_EC_SYSTEM76_EC_ACPI_DEVICE_HID="17761776"
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel Firmware
|
||||||
|
#
|
||||||
|
CONFIG_HAVE_ME_BIN=y
|
||||||
|
# CONFIG_STITCH_ME_BIN is not set
|
||||||
|
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
||||||
|
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||||
|
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||||
|
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||||
|
CONFIG_UDK_BASE=y
|
||||||
|
CONFIG_UDK_202005_BINDING=y
|
||||||
|
CONFIG_UDK_2013_VERSION=2013
|
||||||
|
CONFIG_UDK_2017_VERSION=2017
|
||||||
|
CONFIG_UDK_202005_VERSION=202005
|
||||||
|
CONFIG_UDK_202111_VERSION=202111
|
||||||
|
CONFIG_UDK_VERSION=202005
|
||||||
|
CONFIG_ARCH_X86=y
|
||||||
|
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||||
|
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||||
|
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||||
|
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||||
|
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||||
|
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||||
|
CONFIG_X86_CUSTOM_BOOTMEDIA=y
|
||||||
|
CONFIG_NUM_IPI_STARTS=2
|
||||||
|
CONFIG_PC80_SYSTEM=y
|
||||||
|
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||||
|
CONFIG_POSTCAR_STAGE=y
|
||||||
|
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||||
|
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||||
|
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||||
|
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||||
|
CONFIG_HAVE_CF9_RESET=y
|
||||||
|
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
||||||
|
CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
|
||||||
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
||||||
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
|
||||||
|
# end of Chipset
|
||||||
|
|
||||||
|
#
|
||||||
|
# Devices
|
||||||
|
#
|
||||||
|
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||||
|
CONFIG_HAVE_FSP_GOP=y
|
||||||
|
# CONFIG_VGA_ROM_RUN is not set
|
||||||
|
CONFIG_RUN_FSP_GOP=y
|
||||||
|
# CONFIG_NO_GFX_INIT is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Display
|
||||||
|
#
|
||||||
|
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||||
|
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||||
|
# CONFIG_BOOTSPLASH is not set
|
||||||
|
# end of Display
|
||||||
|
|
||||||
|
CONFIG_PCI=y
|
||||||
|
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||||
|
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_AZALIA_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
|
||||||
|
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||||
|
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||||
|
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
||||||
|
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
||||||
|
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
||||||
|
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||||
|
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||||
|
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||||
|
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||||
|
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||||
|
# CONFIG_SOFTWARE_I2C is not set
|
||||||
|
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||||
|
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
||||||
|
# end of Devices
|
||||||
|
|
||||||
|
#
|
||||||
|
# Generic Drivers
|
||||||
|
#
|
||||||
|
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||||
|
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||||
|
# CONFIG_ELOG is not set
|
||||||
|
CONFIG_CACHE_MRC_SETTINGS=y
|
||||||
|
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||||
|
# CONFIG_SMMSTORE is not set
|
||||||
|
CONFIG_SPI_FLASH=y
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||||
|
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
||||||
|
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||||
|
CONFIG_TPM_INIT_RAMSTAGE=y
|
||||||
|
# CONFIG_TPM_PPI is not set
|
||||||
|
CONFIG_DRIVERS_UART=y
|
||||||
|
CONFIG_NO_UART_ON_SUPERIO=y
|
||||||
|
CONFIG_DRIVERS_UART_8250MEM=y
|
||||||
|
CONFIG_DRIVERS_UART_8250MEM_32=y
|
||||||
|
# CONFIG_VPD is not set
|
||||||
|
CONFIG_DRIVERS_GENERIC_BAYHUB_LV2=y
|
||||||
|
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||||
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||||
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
||||||
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
||||||
|
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||||
|
CONFIG_DRIVERS_I2C_GENERIC=y
|
||||||
|
CONFIG_DRIVERS_I2C_HID=y
|
||||||
|
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
||||||
|
CONFIG_FSP_USE_REPO=y
|
||||||
|
# CONFIG_DISPLAY_HOBS is not set
|
||||||
|
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_1=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_2=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_3=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_X86_32=y
|
||||||
|
CONFIG_HAVE_INTEL_FSP_REPO=y
|
||||||
|
CONFIG_ADD_FSP_BINARIES=y
|
||||||
|
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||||
|
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||||
|
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||||
|
CONFIG_FSP_FULL_FD=y
|
||||||
|
CONFIG_FSP_T_RESERVED_SIZE=0x0
|
||||||
|
CONFIG_FSP_M_XIP=y
|
||||||
|
CONFIG_FSP_USES_CB_STACK=y
|
||||||
|
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
|
||||||
|
CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
|
||||||
|
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
|
||||||
|
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
|
||||||
|
CONFIG_FSPS_HAS_ARCH_UPD=y
|
||||||
|
CONFIG_FSPS_USE_MULTI_PHASE_INIT=y
|
||||||
|
CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
|
||||||
|
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
|
||||||
|
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
|
||||||
|
CONFIG_INTEL_GMA_ACPI=y
|
||||||
|
CONFIG_INTEL_GMA_OPREGION_2_1=y
|
||||||
|
CONFIG_DRIVERS_INTEL_PMC=y
|
||||||
|
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
||||||
|
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||||
|
CONFIG_DRIVERS_MC146818=y
|
||||||
|
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
|
||||||
|
CONFIG_MEMORY_MAPPED_TPM=y
|
||||||
|
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||||
|
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||||
|
CONFIG_DRIVERS_USB_ACPI=y
|
||||||
|
CONFIG_DRIVERS_WIFI_GENERIC=y
|
||||||
|
CONFIG_MP_SERVICES_PPI=y
|
||||||
|
CONFIG_MP_SERVICES_PPI_V2=y
|
||||||
|
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
|
||||||
|
# end of Generic Drivers
|
||||||
|
|
||||||
|
#
|
||||||
|
# Security
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# CBFS verification
|
||||||
|
#
|
||||||
|
# CONFIG_CBFS_VERIFICATION is not set
|
||||||
|
# end of CBFS verification
|
||||||
|
|
||||||
|
#
|
||||||
|
# Verified Boot (vboot)
|
||||||
|
#
|
||||||
|
CONFIG_VBOOT_LIB=y
|
||||||
|
# end of Verified Boot (vboot)
|
||||||
|
|
||||||
|
#
|
||||||
|
# Trusted Platform Module
|
||||||
|
#
|
||||||
|
# CONFIG_NO_TPM is not set
|
||||||
|
CONFIG_TPM2=y
|
||||||
|
CONFIG_TPM=y
|
||||||
|
CONFIG_MAINBOARD_HAS_TPM2=y
|
||||||
|
# CONFIG_DEBUG_TPM is not set
|
||||||
|
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||||
|
CONFIG_TPM_MEASURED_BOOT=y
|
||||||
|
CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
|
||||||
|
# end of Trusted Platform Module
|
||||||
|
|
||||||
|
#
|
||||||
|
# Memory initialization
|
||||||
|
#
|
||||||
|
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||||
|
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||||
|
# end of Memory initialization
|
||||||
|
|
||||||
|
# CONFIG_INTEL_TXT is not set
|
||||||
|
# CONFIG_STM is not set
|
||||||
|
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
||||||
|
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
||||||
|
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
||||||
|
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
||||||
|
# CONFIG_BOOTMEDIA_SMM_BWP is not set
|
||||||
|
# end of Security
|
||||||
|
|
||||||
|
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||||
|
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||||
|
CONFIG_ACPI_SOC_NVS=y
|
||||||
|
CONFIG_HAVE_ACPI_TABLES=y
|
||||||
|
CONFIG_ACPI_LPIT=y
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||||
|
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||||
|
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||||
|
CONFIG_RTC=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Console
|
||||||
|
#
|
||||||
|
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||||
|
CONFIG_POSTCAR_CONSOLE=y
|
||||||
|
CONFIG_SQUELCH_EARLY_SMP=y
|
||||||
|
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
||||||
|
# CONFIG_SPKMODEM is not set
|
||||||
|
# CONFIG_CONSOLE_NE2K is not set
|
||||||
|
CONFIG_CONSOLE_CBMEM=y
|
||||||
|
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||||
|
# CONFIG_CONSOLE_SPI_FLASH is not set
|
||||||
|
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||||
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||||
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||||
|
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
||||||
|
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
||||||
|
# CONFIG_CMOS_POST is not set
|
||||||
|
CONFIG_HWBASE_DEBUG_CB=y
|
||||||
|
# end of Console
|
||||||
|
|
||||||
|
CONFIG_HAVE_ACPI_RESUME=y
|
||||||
|
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||||
|
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||||
|
CONFIG_HAVE_OPTION_TABLE=y
|
||||||
|
CONFIG_IOAPIC=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# System tables
|
||||||
|
#
|
||||||
|
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||||
|
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||||
|
# end of System tables
|
||||||
|
|
||||||
|
#
|
||||||
|
# Payload
|
||||||
|
#
|
||||||
|
# CONFIG_PAYLOAD_NONE is not set
|
||||||
|
# CONFIG_PAYLOAD_ELF is not set
|
||||||
|
# CONFIG_PAYLOAD_BOOTBOOT is not set
|
||||||
|
# CONFIG_PAYLOAD_FILO is not set
|
||||||
|
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||||
|
# CONFIG_PAYLOAD_SEAGRUB is not set
|
||||||
|
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
||||||
|
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||||
|
# CONFIG_PAYLOAD_UBOOT is not set
|
||||||
|
# CONFIG_PAYLOAD_YABITS is not set
|
||||||
|
# CONFIG_PAYLOAD_EDK2 is not set
|
||||||
|
CONFIG_PAYLOAD_LINUX=y
|
||||||
|
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
|
||||||
|
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
|
||||||
|
CONFIG_PAYLOAD_OPTIONS=""
|
||||||
|
# CONFIG_PXE is not set
|
||||||
|
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Secondary Payloads
|
||||||
|
#
|
||||||
|
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
|
||||||
|
# end of Secondary Payloads
|
||||||
|
# end of Payload
|
||||||
|
|
||||||
|
#
|
||||||
|
# Debugging
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# CPU Debug Settings
|
||||||
|
#
|
||||||
|
# CONFIG_DISPLAY_MTRRS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# BLOB Debug Settings
|
||||||
|
#
|
||||||
|
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||||
|
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||||
|
# CONFIG_VERIFY_HOBS is not set
|
||||||
|
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
||||||
|
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
|
||||||
|
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# General Debug Settings
|
||||||
|
#
|
||||||
|
# CONFIG_GDB_STUB is not set
|
||||||
|
# CONFIG_FATAL_ASSERTS is not set
|
||||||
|
CONFIG_HAVE_DEBUG_GPIO=y
|
||||||
|
# CONFIG_DEBUG_GPIO is not set
|
||||||
|
# CONFIG_DEBUG_CBFS is not set
|
||||||
|
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||||
|
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||||
|
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||||
|
# CONFIG_DEBUG_SMBUS is not set
|
||||||
|
# CONFIG_DEBUG_SMI is not set
|
||||||
|
# CONFIG_DEBUG_MALLOC is not set
|
||||||
|
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||||
|
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||||
|
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||||
|
# CONFIG_DEBUG_ADA_CODE is not set
|
||||||
|
CONFIG_HAVE_EM100_SUPPORT=y
|
||||||
|
# CONFIG_EM100 is not set
|
||||||
|
# end of Debugging
|
||||||
|
|
||||||
|
CONFIG_SPD_READ_BY_WORD=y
|
||||||
|
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||||
|
CONFIG_MAX_REBOOT_CNT=3
|
||||||
|
CONFIG_RELOCATABLE_MODULES=y
|
||||||
|
CONFIG_GENERIC_GPIO_LIB=y
|
||||||
|
CONFIG_HAVE_BOOTBLOCK=y
|
||||||
|
CONFIG_HAVE_ROMSTAGE=y
|
||||||
|
CONFIG_HAVE_RAMSTAGE=y
|
||||||
801
config/coreboot-nitropad-nv41.config
Normal file
801
config/coreboot-nitropad-nv41.config
Normal file
@ -0,0 +1,801 @@
|
|||||||
|
#
|
||||||
|
# Automatically generated file; DO NOT EDIT.
|
||||||
|
# coreboot configuration
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# General setup
|
||||||
|
#
|
||||||
|
CONFIG_COREBOOT_BUILD=y
|
||||||
|
CONFIG_LOCALVERSION=""
|
||||||
|
CONFIG_CBFS_PREFIX="fallback"
|
||||||
|
CONFIG_COMPILER_GCC=y
|
||||||
|
# CONFIG_COMPILER_LLVM_CLANG is not set
|
||||||
|
CONFIG_ARCH_SUPPORTS_CLANG=y
|
||||||
|
# CONFIG_ANY_TOOLCHAIN is not set
|
||||||
|
# CONFIG_CCACHE is not set
|
||||||
|
# CONFIG_FMD_GENPARSER is not set
|
||||||
|
# CONFIG_UTIL_GENPARSER is not set
|
||||||
|
# CONFIG_OPTION_BACKEND_NONE is not set
|
||||||
|
CONFIG_USE_OPTION_TABLE=y
|
||||||
|
# CONFIG_STATIC_OPTION_TABLE is not set
|
||||||
|
CONFIG_COMPRESS_RAMSTAGE=y
|
||||||
|
CONFIG_INCLUDE_CONFIG_FILE=y
|
||||||
|
CONFIG_COLLECT_TIMESTAMPS=y
|
||||||
|
# CONFIG_TIMESTAMPS_ON_CONSOLE is not set
|
||||||
|
CONFIG_USE_BLOBS=y
|
||||||
|
# CONFIG_USE_AMD_BLOBS is not set
|
||||||
|
# CONFIG_USE_QC_BLOBS is not set
|
||||||
|
# CONFIG_COVERAGE is not set
|
||||||
|
# CONFIG_UBSAN is not set
|
||||||
|
CONFIG_HAVE_ASAN_IN_RAMSTAGE=y
|
||||||
|
# CONFIG_ASAN is not set
|
||||||
|
# CONFIG_NO_STAGE_CACHE is not set
|
||||||
|
CONFIG_TSEG_STAGE_CACHE=y
|
||||||
|
# CONFIG_UPDATE_IMAGE is not set
|
||||||
|
# CONFIG_BOOTSPLASH_IMAGE is not set
|
||||||
|
# CONFIG_FW_CONFIG is not set
|
||||||
|
# end of General setup
|
||||||
|
|
||||||
|
#
|
||||||
|
# Mainboard
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Important: Run 'make distclean' before switching boards
|
||||||
|
#
|
||||||
|
# CONFIG_VENDOR_51NB is not set
|
||||||
|
# CONFIG_VENDOR_ACER is not set
|
||||||
|
# CONFIG_VENDOR_ADLINK is not set
|
||||||
|
# CONFIG_VENDOR_AMD is not set
|
||||||
|
# CONFIG_VENDOR_AOPEN is not set
|
||||||
|
# CONFIG_VENDOR_APPLE is not set
|
||||||
|
# CONFIG_VENDOR_ASROCK is not set
|
||||||
|
# CONFIG_VENDOR_ASUS is not set
|
||||||
|
# CONFIG_VENDOR_BAP is not set
|
||||||
|
# CONFIG_VENDOR_BIOSTAR is not set
|
||||||
|
# CONFIG_VENDOR_BOSTENTECH is not set
|
||||||
|
# CONFIG_VENDOR_CAVIUM is not set
|
||||||
|
# CONFIG_VENDOR_CLEVO is not set
|
||||||
|
# CONFIG_VENDOR_COMPULAB is not set
|
||||||
|
# CONFIG_VENDOR_DELL is not set
|
||||||
|
# CONFIG_VENDOR_ELMEX is not set
|
||||||
|
# CONFIG_VENDOR_EMULATION is not set
|
||||||
|
# CONFIG_VENDOR_EXAMPLE is not set
|
||||||
|
# CONFIG_VENDOR_FACEBOOK is not set
|
||||||
|
# CONFIG_VENDOR_FOXCONN is not set
|
||||||
|
# CONFIG_VENDOR_GETAC is not set
|
||||||
|
# CONFIG_VENDOR_GIGABYTE is not set
|
||||||
|
# CONFIG_VENDOR_GIZMOSPHERE is not set
|
||||||
|
# CONFIG_VENDOR_GOOGLE is not set
|
||||||
|
# CONFIG_VENDOR_HP is not set
|
||||||
|
# CONFIG_VENDOR_IBASE is not set
|
||||||
|
# CONFIG_VENDOR_INTEL is not set
|
||||||
|
# CONFIG_VENDOR_JETWAY is not set
|
||||||
|
# CONFIG_VENDOR_KONTRON is not set
|
||||||
|
# CONFIG_VENDOR_LENOVO is not set
|
||||||
|
# CONFIG_VENDOR_LIBRETREND is not set
|
||||||
|
# CONFIG_VENDOR_LIPPERT is not set
|
||||||
|
# CONFIG_VENDOR_MSI is not set
|
||||||
|
CONFIG_VENDOR_NOVACUSTOM=y
|
||||||
|
# CONFIG_VENDOR_OCP is not set
|
||||||
|
# CONFIG_VENDOR_OPENCELLULAR is not set
|
||||||
|
# CONFIG_VENDOR_PACKARDBELL is not set
|
||||||
|
# CONFIG_VENDOR_PCENGINES is not set
|
||||||
|
# CONFIG_VENDOR_PINE64 is not set
|
||||||
|
# CONFIG_VENDOR_PORTWELL is not set
|
||||||
|
# CONFIG_VENDOR_PRODRIVE is not set
|
||||||
|
# CONFIG_VENDOR_PROTECTLI is not set
|
||||||
|
# CONFIG_VENDOR_PURISM is not set
|
||||||
|
# CONFIG_VENDOR_RAZER is not set
|
||||||
|
# CONFIG_VENDOR_RODA is not set
|
||||||
|
# CONFIG_VENDOR_SAMSUNG is not set
|
||||||
|
# CONFIG_VENDOR_SAPPHIRE is not set
|
||||||
|
# CONFIG_VENDOR_SCALEWAY is not set
|
||||||
|
# CONFIG_VENDOR_SIEMENS is not set
|
||||||
|
# CONFIG_VENDOR_SIFIVE is not set
|
||||||
|
# CONFIG_VENDOR_STARLABS is not set
|
||||||
|
# CONFIG_VENDOR_SUPERMICRO is not set
|
||||||
|
# CONFIG_VENDOR_SYSTEM76 is not set
|
||||||
|
# CONFIG_VENDOR_TI is not set
|
||||||
|
# CONFIG_VENDOR_UP is not set
|
||||||
|
CONFIG_MAINBOARD_FAMILY="Not Applicable"
|
||||||
|
CONFIG_MAINBOARD_PART_NUMBER="nv40pz"
|
||||||
|
CONFIG_MAINBOARD_VERSION="v2.1"
|
||||||
|
CONFIG_MAINBOARD_DIR="clevo/adl-p"
|
||||||
|
CONFIG_DIMM_MAX=4
|
||||||
|
CONFIG_DIMM_SPD_SIZE=512
|
||||||
|
CONFIG_FMDFILE=""
|
||||||
|
# CONFIG_NO_POST is not set
|
||||||
|
CONFIG_MAINBOARD_VENDOR="Notebook"
|
||||||
|
CONFIG_CBFS_SIZE=0x1000000
|
||||||
|
# CONFIG_CONSOLE_SERIAL is not set
|
||||||
|
CONFIG_MAX_CPUS=24
|
||||||
|
CONFIG_ONBOARD_VGA_IS_PRIMARY=y
|
||||||
|
# CONFIG_POST_DEVICE is not set
|
||||||
|
# CONFIG_POST_IO is not set
|
||||||
|
CONFIG_UART_FOR_CONSOLE=0
|
||||||
|
# CONFIG_VBOOT is not set
|
||||||
|
CONFIG_VBOOT_VBNV_OFFSET=0x56
|
||||||
|
CONFIG_VARIANT_DIR="nv40pz"
|
||||||
|
CONFIG_DEVICETREE="devicetree.cb"
|
||||||
|
# CONFIG_VGA_BIOS is not set
|
||||||
|
CONFIG_MAINBOARD_SMBIOS_MANUFACTURER="Nitrokey"
|
||||||
|
CONFIG_INTEL_GMA_VBT_FILE="src/mainboard/$(MAINBOARDDIR)/variants/$(VARIANT_DIR)/data.vbt"
|
||||||
|
# CONFIG_DISABLE_HECI1_AT_PRE_BOOT is not set
|
||||||
|
CONFIG_PRERAM_CBMEM_CONSOLE_SIZE=0x2000
|
||||||
|
CONFIG_OVERRIDE_DEVICETREE="variants/$(CONFIG_VARIANT_DIR)/overridetree.cb"
|
||||||
|
CONFIG_CMOS_DEFAULT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.default"
|
||||||
|
CONFIG_CMOS_LAYOUT_FILE="src/mainboard/$(MAINBOARDDIR)/cmos.layout"
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH_BUS=0
|
||||||
|
CONFIG_BOARD_CLEVO_ADLP_COMMON=y
|
||||||
|
CONFIG_BOARD_CLEVO_NV40PZ_BASE=y
|
||||||
|
CONFIG_MAINBOARD_SMBIOS_PRODUCT_NAME="Nitropad NV41"
|
||||||
|
CONFIG_CONSOLE_POST=y
|
||||||
|
# CONFIG_USE_PM_ACPI_TIMER is not set
|
||||||
|
CONFIG_TPM_PIRQ=0x0
|
||||||
|
# CONFIG_SOC_INTEL_CSE_SEND_EOP_EARLY is not set
|
||||||
|
CONFIG_EC_SYSTEM76_EC_BAT_THRESHOLDS=y
|
||||||
|
CONFIG_MEMLAYOUT_LD_FILE="src/arch/x86/memlayout.ld"
|
||||||
|
CONFIG_DCACHE_RAM_BASE=0xfef00000
|
||||||
|
CONFIG_DCACHE_RAM_SIZE=0xc0000
|
||||||
|
CONFIG_C_ENV_BOOTBLOCK_SIZE=0x40000
|
||||||
|
CONFIG_DCACHE_BSP_STACK_SIZE=0x80400
|
||||||
|
CONFIG_ECAM_MMCONF_BASE_ADDRESS=0xc0000000
|
||||||
|
CONFIG_ECAM_MMCONF_BUS_NUMBER=256
|
||||||
|
CONFIG_MAX_ACPI_TABLE_SIZE_KB=144
|
||||||
|
CONFIG_HAVE_INTEL_FIRMWARE=y
|
||||||
|
CONFIG_MRC_SETTINGS_CACHE_SIZE=0x10000
|
||||||
|
CONFIG_DRIVERS_INTEL_WIFI=y
|
||||||
|
CONFIG_IFD_BIN_PATH="../nitrokey-blobs/nitropad-nv41/flashdescriptor-HAP.bin"
|
||||||
|
CONFIG_ME_BIN_PATH="../nitrokey-blobs/nitropad-nv41/me.bin"
|
||||||
|
CONFIG_CONSOLE_CBMEM_BUFFER_SIZE=0x20000
|
||||||
|
# CONFIG_USE_LEGACY_8254_TIMER is not set
|
||||||
|
CONFIG_HAVE_IFD_BIN=y
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_BUSES=42
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_MEM=0xc200000
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM=0x1c000000
|
||||||
|
CONFIG_PS2K_EISAID="PNP0303"
|
||||||
|
CONFIG_PS2M_EISAID="PNP0F13"
|
||||||
|
|
||||||
|
#
|
||||||
|
# Alder Lake P (2022)
|
||||||
|
#
|
||||||
|
# CONFIG_BOARD_NOVACUSTOM_NS5X_ADLP is not set
|
||||||
|
CONFIG_BOARD_NOVACUSTOM_NV4X_ADLP=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Tiger Lake U (2021)
|
||||||
|
#
|
||||||
|
# CONFIG_BOARD_NOVACUSTOM_NV4X_TGLU is not set
|
||||||
|
# CONFIG_BOARD_NOVACUSTOM_NS5X_TGLU is not set
|
||||||
|
CONFIG_POWER_STATE_DEFAULT_ON_AFTER_FAILURE=y
|
||||||
|
CONFIG_PCIEXP_L1_SUB_STATE=y
|
||||||
|
CONFIG_PCIEXP_CLK_PM=y
|
||||||
|
# CONFIG_DRIVERS_UART_8250IO is not set
|
||||||
|
CONFIG_HEAP_SIZE=0x10000
|
||||||
|
CONFIG_EC_GPE_SCI=0x50
|
||||||
|
CONFIG_LINUX_COMMAND_LINE="iommu=pt video=eDP-1:1920x1080 drm_kms_helper.drm_leak_fbdev_smem=1 i915.enable_fbc=0"
|
||||||
|
CONFIG_BOARD_ROMSIZE_KB_32768=y
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_256 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_512 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_1024 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_2048 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_4096 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_5120 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_6144 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_8192 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_10240 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_12288 is not set
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_16384 is not set
|
||||||
|
CONFIG_COREBOOT_ROMSIZE_KB_32768=y
|
||||||
|
# CONFIG_COREBOOT_ROMSIZE_KB_65536 is not set
|
||||||
|
CONFIG_COREBOOT_ROMSIZE_KB=32768
|
||||||
|
CONFIG_ROM_SIZE=0x02000000
|
||||||
|
CONFIG_HAVE_POWER_STATE_AFTER_FAILURE=y
|
||||||
|
CONFIG_HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE=y
|
||||||
|
# CONFIG_POWER_STATE_OFF_AFTER_FAILURE is not set
|
||||||
|
CONFIG_POWER_STATE_ON_AFTER_FAILURE=y
|
||||||
|
# CONFIG_POWER_STATE_PREVIOUS_AFTER_FAILURE is not set
|
||||||
|
CONFIG_MAINBOARD_POWER_FAILURE_STATE=1
|
||||||
|
# end of Mainboard
|
||||||
|
|
||||||
|
CONFIG_SYSTEM_TYPE_LAPTOP=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Chipset
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# SoC
|
||||||
|
#
|
||||||
|
CONFIG_ARCH_ALL_STAGES_X86=y
|
||||||
|
CONFIG_CHIPSET_DEVICETREE="soc/intel/alderlake/chipset.cb"
|
||||||
|
CONFIG_CBFS_MCACHE_SIZE=0x4000
|
||||||
|
CONFIG_ROMSTAGE_ADDR=0x2000000
|
||||||
|
CONFIG_FSP_TEMP_RAM_SIZE=0x20000
|
||||||
|
CONFIG_VERSTAGE_ADDR=0x2000000
|
||||||
|
CONFIG_CONSOLE_UART_BASE_ADDRESS=0xfe03e000
|
||||||
|
CONFIG_SMM_TSEG_SIZE=0x800000
|
||||||
|
CONFIG_SMM_RESERVED_SIZE=0x200000
|
||||||
|
CONFIG_SMM_MODULE_STACK_SIZE=0x800
|
||||||
|
CONFIG_ACPI_BERT=y
|
||||||
|
CONFIG_ACPI_BERT_SIZE=0x10000
|
||||||
|
CONFIG_DRIVERS_I2C_DESIGNWARE_CLOCK_MHZ=133
|
||||||
|
CONFIG_VBOOT_HASH_BLOCK_SIZE=0x1000
|
||||||
|
CONFIG_CPU_SPECIFIC_OPTIONS=y
|
||||||
|
CONFIG_FSP_M_FILE="$(obj)/Fsp_M.fd"
|
||||||
|
CONFIG_FSP_S_FILE="$(obj)/Fsp_S.fd"
|
||||||
|
CONFIG_ACPI_CPU_STRING="\\_SB.CP%02d"
|
||||||
|
CONFIG_STACK_SIZE=0x2000
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE=y
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE_PCH_P=y
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT=y
|
||||||
|
CONFIG_ALDERLAKE_CAR_ENHANCED_NEM=y
|
||||||
|
CONFIG_EXT_BIOS_WIN_BASE=0xf8000000
|
||||||
|
CONFIG_EXT_BIOS_WIN_SIZE=0x2000000
|
||||||
|
CONFIG_IFD_CHIPSET="adl"
|
||||||
|
CONFIG_IED_REGION_SIZE=0x400000
|
||||||
|
CONFIG_MAX_PCH_ROOT_PORTS=12
|
||||||
|
CONFIG_MAX_CPU_ROOT_PORTS=3
|
||||||
|
CONFIG_MAX_TBT_ROOT_PORTS=4
|
||||||
|
CONFIG_MAX_ROOT_PORTS=12
|
||||||
|
CONFIG_MAX_PCIE_CLOCK_SRC=10
|
||||||
|
CONFIG_MAX_PCIE_CLOCK_REQ=10
|
||||||
|
CONFIG_PCR_BASE_ADDRESS=0xfd000000
|
||||||
|
CONFIG_CPU_BCLK_MHZ=100
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_CLOCK_MHZ=120
|
||||||
|
CONFIG_CPU_XTAL_HZ=38400000
|
||||||
|
CONFIG_SOC_INTEL_UFS_CLK_FREQ_HZ=19200000
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_MAX=7
|
||||||
|
CONFIG_SOC_INTEL_I2C_DEV_MAX=8
|
||||||
|
CONFIG_SOC_INTEL_UART_DEV_MAX=7
|
||||||
|
CONFIG_VBT_DATA_SIZE_KB=9
|
||||||
|
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_M_VAL=0x25a
|
||||||
|
CONFIG_SOC_INTEL_COMMON_LPSS_UART_CLK_N_VAL=0x7fff
|
||||||
|
CONFIG_FSP_HEADER_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Include/"
|
||||||
|
CONFIG_FSP_FD_PATH="3rdparty/fsp/AlderLakeFspBinPkg/Client/AlderLakeP/Fsp.fd"
|
||||||
|
CONFIG_SOC_INTEL_ALDERLAKE_DEBUG_CONSENT=0
|
||||||
|
CONFIG_DATA_BUS_WIDTH=128
|
||||||
|
CONFIG_DIMMS_PER_CHANNEL=2
|
||||||
|
CONFIG_MRC_CHANNEL_WIDTH=16
|
||||||
|
CONFIG_ACPI_ADL_IPU_ES_SUPPORT=y
|
||||||
|
CONFIG_USE_FSP_MP_INIT=y
|
||||||
|
# CONFIG_USE_COREBOOT_MP_INIT is not set
|
||||||
|
CONFIG_SI_DESC_REGION="SI_DESC"
|
||||||
|
CONFIG_SI_DESC_REGION_SZ=4096
|
||||||
|
# CONFIG_BUILDING_WITH_DEBUG_FSP is not set
|
||||||
|
CONFIG_INTEL_GMA_BCLV_OFFSET=0xc8258
|
||||||
|
CONFIG_INTEL_GMA_BCLV_WIDTH=32
|
||||||
|
CONFIG_INTEL_GMA_BCLM_OFFSET=0xc8254
|
||||||
|
CONFIG_INTEL_GMA_BCLM_WIDTH=32
|
||||||
|
CONFIG_MAX_HECI_DEVICES=6
|
||||||
|
CONFIG_BOOTBLOCK_IN_CBFS=y
|
||||||
|
CONFIG_PCIEXP_ASPM=y
|
||||||
|
CONFIG_PCIEXP_COMMON_CLOCK=y
|
||||||
|
CONFIG_CPU_INTEL_NUM_FIT_ENTRIES=4
|
||||||
|
CONFIG_SOC_INTEL_GFX_FRAMEBUFFER_OFFSET=0x0
|
||||||
|
CONFIG_UART_PCI_ADDR=0x0
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_P2SB=y
|
||||||
|
CONFIG_CBFS_CACHE_ALIGN=8
|
||||||
|
CONFIG_SOC_INTEL_COMMON=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel SoC Common Code for IP blocks
|
||||||
|
#
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_GPIO=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_LPIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_PEP_LPM_REQ=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CRASHLOG=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPPC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ACPI_CPU_HYBRID=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CNVI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_MPINIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CPU_SMMRELOCATE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CAR=y
|
||||||
|
CONFIG_INTEL_CAR_NEM_ENHANCED=y
|
||||||
|
CONFIG_CAR_HAS_SF_MASKS=y
|
||||||
|
CONFIG_COS_MAPPED_TO_MSB=y
|
||||||
|
CONFIG_CAR_HAS_L3_PROTECTED_WAYS=y
|
||||||
|
CONFIG_USE_INTEL_FSP_TO_CALL_COREBOOT_PUBLISH_MP_PPI=y
|
||||||
|
CONFIG_CPU_SUPPORTS_INTEL_TME=y
|
||||||
|
CONFIG_INTEL_TME=y
|
||||||
|
CONFIG_CPU_SUPPORTS_PM_TIMER_EMULATION=y
|
||||||
|
CONFIG_HAVE_HYPERTHREADING=y
|
||||||
|
CONFIG_FSP_HYPERTHREADING=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_CSE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_HECI1_DISABLE_USING_PMC_IPC=y
|
||||||
|
CONFIG_SOC_INTEL_CSE_HAVE_HAP=y
|
||||||
|
CONFIG_SOC_INTEL_CSE_FMAP_NAME="SI_ME"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_A_FMAP_NAME="ME_RW_A"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_B_FMAP_NAME="ME_RW_B"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_CBFS_NAME="me_rw"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_HASH_CBFS_NAME="me_rw.hash"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_VERSION_CBFS_NAME="me_rw.version"
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_FILE=""
|
||||||
|
CONFIG_SOC_INTEL_CSE_RW_VERSION=""
|
||||||
|
CONFIG_SOC_INTEL_CSE_SET_EOP=y
|
||||||
|
CONFIG_SOC_INTEL_CSE_IOM_CBFS_NAME="cse_iom"
|
||||||
|
CONFIG_SOC_INTEL_CSE_IOM_CBFS_FILE=""
|
||||||
|
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_NAME="cse_nphy"
|
||||||
|
CONFIG_SOC_INTEL_CSE_NPHY_CBFS_FILE=""
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_DSP=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_DTT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_FAST_SPI=y
|
||||||
|
CONFIG_FAST_SPI_DISABLE_WRITE_STATUS=y
|
||||||
|
CONFIG_FAST_SPI_SUPPORTS_EXT_BIOS_WINDOW=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_DUAL_ROUTE_SUPPORT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPIO_LOCK_USING_SBI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GPMR=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GRAPHICS=y
|
||||||
|
# CONFIG_SOC_INTEL_DISABLE_IGD is not set
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_GSPI_VERSION_2=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_HDA_VERB=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_I2C=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_IPU=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_IRQ=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_ITSS=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_LPC_MIRROR_TO_GPMR=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_LPSS=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_MEMINIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_BASE_P2SB=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PCIE_RTD3=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PCR=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC=y
|
||||||
|
CONFIG_SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_PMC_EPOC=y
|
||||||
|
CONFIG_PMC_IPC_ACPI_INTERFACE=y
|
||||||
|
CONFIG_PMC_GLOBAL_RESET_ENABLE_LOCK=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_POWER_LIMIT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_RTC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SATA=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMBUS=y
|
||||||
|
CONFIG_FIXED_SMBUS_IO_BASE=0xefa0
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCO_ENABLE_THROUGH_SMBUS=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_IO_TRAP=y
|
||||||
|
# CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE is not set
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SMM_S5_DELAY_MS=0
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SPI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_SA=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TCSS=y
|
||||||
|
# CONFIG_ENABLE_TCSS_DISPLAY_DETECTION is not set
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_THERMAL_BEHIND_PMC=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_TIMER=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_UART=y
|
||||||
|
CONFIG_INTEL_LPSS_UART_FOR_CONSOLE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_PCIE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_USB4_XHCI=y
|
||||||
|
CONFIG_SOC_INTEL_ENABLE_USB4_PCIE_RESOURCES=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XDCI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BLOCK_XHCI_ELOG=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel SoC Common PCH Code
|
||||||
|
#
|
||||||
|
CONFIG_SOC_INTEL_COMMON_PCH_CLIENT=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_PCH_BASE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_PCH_LOCKDOWN=y
|
||||||
|
CONFIG_PCH_SPECIFIC_BASE_OPTIONS=y
|
||||||
|
CONFIG_PCH_SPECIFIC_CLIENT_OPTIONS=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel SoC Common coreboot stages and non-IP blocks
|
||||||
|
#
|
||||||
|
CONFIG_SOC_INTEL_COMMON_BASECODE=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_RESET=y
|
||||||
|
CONFIG_SOC_INTEL_COMMON_ACPI_WAKE_SOURCE=y
|
||||||
|
CONFIG_PAVP=y
|
||||||
|
# CONFIG_SOC_INTEL_DEBUG_CONSENT is not set
|
||||||
|
CONFIG_HAVE_INTEL_COMPLIANCE_TEST_MODE=y
|
||||||
|
# CONFIG_SOC_INTEL_COMPLIANCE_TEST_MODE is not set
|
||||||
|
CONFIG_SOC_INTEL_CRASHLOG=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# CPU
|
||||||
|
#
|
||||||
|
CONFIG_SSE2=y
|
||||||
|
CONFIG_CPU_INTEL_FIRMWARE_INTERFACE_TABLE=y
|
||||||
|
CONFIG_CPU_INTEL_COMMON=y
|
||||||
|
CONFIG_ENABLE_VMX=y
|
||||||
|
CONFIG_SET_IA32_FC_LOCK_BIT=y
|
||||||
|
CONFIG_SET_MSR_AESNI_LOCK_BIT=y
|
||||||
|
CONFIG_CPU_INTEL_COMMON_SMM=y
|
||||||
|
CONFIG_MICROCODE_UPDATE_PRE_RAM=y
|
||||||
|
CONFIG_PARALLEL_MP=y
|
||||||
|
CONFIG_PARALLEL_MP_AP_WORK=y
|
||||||
|
CONFIG_XAPIC_ONLY=y
|
||||||
|
# CONFIG_X2APIC_ONLY is not set
|
||||||
|
# CONFIG_X2APIC_RUNTIME is not set
|
||||||
|
# CONFIG_X2APIC_LATE_WORKAROUND is not set
|
||||||
|
CONFIG_UDELAY_TSC=y
|
||||||
|
CONFIG_TSC_MONOTONIC_TIMER=y
|
||||||
|
CONFIG_LOGICAL_CPUS=y
|
||||||
|
CONFIG_HAVE_SMI_HANDLER=y
|
||||||
|
CONFIG_SMM_TSEG=y
|
||||||
|
CONFIG_SMM_STUB_STACK_SIZE=0x400
|
||||||
|
CONFIG_CPU_INFO_V2=y
|
||||||
|
CONFIG_SMP=y
|
||||||
|
CONFIG_SSE=y
|
||||||
|
CONFIG_SUPPORT_CPU_UCODE_IN_CBFS=y
|
||||||
|
CONFIG_USE_CPU_MICROCODE_CBFS_BINS=y
|
||||||
|
CONFIG_CPU_MICROCODE_CBFS_DEFAULT_BINS=y
|
||||||
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_BINS is not set
|
||||||
|
# CONFIG_CPU_MICROCODE_CBFS_EXTERNAL_HEADER is not set
|
||||||
|
# CONFIG_CPU_MICROCODE_CBFS_NONE is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Northbridge
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Southbridge
|
||||||
|
#
|
||||||
|
CONFIG_PCIEXP_HOTPLUG=y
|
||||||
|
CONFIG_INTEL_DESCRIPTOR_MODE_REQUIRED=y
|
||||||
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_SMBUS=y
|
||||||
|
CONFIG_SOUTHBRIDGE_INTEL_COMMON_PIRQ_ACPI_GEN=y
|
||||||
|
CONFIG_INTEL_DESCRIPTOR_MODE_CAPABLE=y
|
||||||
|
# CONFIG_VALIDATE_INTEL_DESCRIPTOR is not set
|
||||||
|
CONFIG_FIXED_RCBA_MMIO_BASE=0xfed1c000
|
||||||
|
CONFIG_RCBA_LENGTH=0x4000
|
||||||
|
|
||||||
|
#
|
||||||
|
# Super I/O
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# Embedded Controllers
|
||||||
|
#
|
||||||
|
CONFIG_EC_SYSTEM76_EC=y
|
||||||
|
CONFIG_EC_SYSTEM76_EC_DGPU=y
|
||||||
|
CONFIG_EC_SYSTEM76_EC_ACPI_DEVICE_HID="17761776"
|
||||||
|
|
||||||
|
#
|
||||||
|
# Intel Firmware
|
||||||
|
#
|
||||||
|
CONFIG_HAVE_ME_BIN=y
|
||||||
|
# CONFIG_STITCH_ME_BIN is not set
|
||||||
|
# CONFIG_ME_REGION_ALLOW_CPU_READ_ACCESS is not set
|
||||||
|
# CONFIG_DO_NOT_TOUCH_DESCRIPTOR_REGION is not set
|
||||||
|
# CONFIG_LOCK_MANAGEMENT_ENGINE is not set
|
||||||
|
CONFIG_UNLOCK_FLASH_REGIONS=y
|
||||||
|
CONFIG_UDK_BASE=y
|
||||||
|
CONFIG_UDK_202005_BINDING=y
|
||||||
|
CONFIG_UDK_2013_VERSION=2013
|
||||||
|
CONFIG_UDK_2017_VERSION=2017
|
||||||
|
CONFIG_UDK_202005_VERSION=202005
|
||||||
|
CONFIG_UDK_202111_VERSION=202111
|
||||||
|
CONFIG_UDK_VERSION=202005
|
||||||
|
CONFIG_ARCH_X86=y
|
||||||
|
CONFIG_ARCH_BOOTBLOCK_X86_32=y
|
||||||
|
CONFIG_ARCH_VERSTAGE_X86_32=y
|
||||||
|
CONFIG_ARCH_ROMSTAGE_X86_32=y
|
||||||
|
CONFIG_ARCH_POSTCAR_X86_32=y
|
||||||
|
CONFIG_ARCH_RAMSTAGE_X86_32=y
|
||||||
|
CONFIG_ARCH_ALL_STAGES_X86_32=y
|
||||||
|
CONFIG_X86_CUSTOM_BOOTMEDIA=y
|
||||||
|
CONFIG_NUM_IPI_STARTS=2
|
||||||
|
CONFIG_PC80_SYSTEM=y
|
||||||
|
CONFIG_HAVE_CMOS_DEFAULT=y
|
||||||
|
CONFIG_POSTCAR_STAGE=y
|
||||||
|
CONFIG_BOOTBLOCK_SIMPLE=y
|
||||||
|
# CONFIG_BOOTBLOCK_NORMAL is not set
|
||||||
|
CONFIG_COLLECT_TIMESTAMPS_TSC=y
|
||||||
|
CONFIG_IDT_IN_EVERY_STAGE=y
|
||||||
|
CONFIG_HAVE_CF9_RESET=y
|
||||||
|
CONFIG_DEBUG_HW_BREAKPOINTS=y
|
||||||
|
CONFIG_DEBUG_HW_BREAKPOINTS_IN_ALL_STAGES=y
|
||||||
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS=y
|
||||||
|
CONFIG_DEBUG_NULL_DEREF_BREAKPOINTS_IN_ALL_STAGES=y
|
||||||
|
# end of Chipset
|
||||||
|
|
||||||
|
#
|
||||||
|
# Devices
|
||||||
|
#
|
||||||
|
CONFIG_HAVE_LINEAR_FRAMEBUFFER=y
|
||||||
|
CONFIG_HAVE_FSP_GOP=y
|
||||||
|
# CONFIG_VGA_ROM_RUN is not set
|
||||||
|
CONFIG_RUN_FSP_GOP=y
|
||||||
|
# CONFIG_NO_GFX_INIT is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# Display
|
||||||
|
#
|
||||||
|
CONFIG_GENERIC_LINEAR_FRAMEBUFFER=y
|
||||||
|
CONFIG_LINEAR_FRAMEBUFFER=y
|
||||||
|
# CONFIG_BOOTSPLASH is not set
|
||||||
|
# end of Display
|
||||||
|
|
||||||
|
CONFIG_PCI=y
|
||||||
|
CONFIG_ECAM_MMCONF_SUPPORT=y
|
||||||
|
CONFIG_PCIX_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_CARDBUS_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_AZALIA_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_AZALIA_LOCK_DOWN_R_WO_GCAP=y
|
||||||
|
CONFIG_PCIEXP_PLUGIN_SUPPORT=y
|
||||||
|
CONFIG_ECAM_MMCONF_LENGTH=0x10000000
|
||||||
|
CONFIG_PCI_ALLOW_BUS_MASTER=y
|
||||||
|
CONFIG_PCI_SET_BUS_MASTER_PCI_BRIDGES=y
|
||||||
|
CONFIG_PCI_ALLOW_BUS_MASTER_ANY_DEVICE=y
|
||||||
|
# CONFIG_PCIEXP_SUPPORT_RESIZABLE_BARS is not set
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_PREFETCH_MEM_BELOW_4G=y
|
||||||
|
CONFIG_PCIEXP_HOTPLUG_IO=0x2000
|
||||||
|
# CONFIG_EARLY_PCI_BRIDGE is not set
|
||||||
|
CONFIG_SUBSYSTEM_VENDOR_ID=0x0000
|
||||||
|
CONFIG_SUBSYSTEM_DEVICE_ID=0x0000
|
||||||
|
CONFIG_INTEL_GMA_HAVE_VBT=y
|
||||||
|
CONFIG_INTEL_GMA_ADD_VBT=y
|
||||||
|
# CONFIG_SOFTWARE_I2C is not set
|
||||||
|
CONFIG_I2C_TRANSFER_TIMEOUT_US=500000
|
||||||
|
CONFIG_RESOURCE_ALLOCATOR_V4=y
|
||||||
|
# end of Devices
|
||||||
|
|
||||||
|
#
|
||||||
|
# Generic Drivers
|
||||||
|
#
|
||||||
|
CONFIG_CRB_TPM_BASE_ADDRESS=0xfed40000
|
||||||
|
# CONFIG_DRIVERS_EFI_VARIABLE_STORE is not set
|
||||||
|
# CONFIG_ELOG is not set
|
||||||
|
CONFIG_CACHE_MRC_SETTINGS=y
|
||||||
|
CONFIG_MRC_SETTINGS_PROTECT=y
|
||||||
|
# CONFIG_SMMSTORE is not set
|
||||||
|
CONFIG_SPI_FLASH=y
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP=y
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY=y
|
||||||
|
CONFIG_SPI_FLASH_DONT_INCLUDE_ALL_DRIVERS=y
|
||||||
|
# CONFIG_SPI_FLASH_NO_FAST_READ is not set
|
||||||
|
CONFIG_TPM_INIT_RAMSTAGE=y
|
||||||
|
# CONFIG_TPM_PPI is not set
|
||||||
|
CONFIG_DRIVERS_UART=y
|
||||||
|
CONFIG_NO_UART_ON_SUPERIO=y
|
||||||
|
CONFIG_DRIVERS_UART_8250MEM=y
|
||||||
|
CONFIG_DRIVERS_UART_8250MEM_32=y
|
||||||
|
# CONFIG_VPD is not set
|
||||||
|
CONFIG_DRIVERS_GENERIC_BAYHUB_LV2=y
|
||||||
|
# CONFIG_DRIVERS_GENERIC_CBFS_SERIAL is not set
|
||||||
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9750 is not set
|
||||||
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9755 is not set
|
||||||
|
# CONFIG_DRIVERS_GENESYSLOGIC_GL9763E is not set
|
||||||
|
CONFIG_DRIVERS_I2C_DESIGNWARE=y
|
||||||
|
CONFIG_DRIVERS_I2C_GENERIC=y
|
||||||
|
CONFIG_DRIVERS_I2C_HID=y
|
||||||
|
# CONFIG_DRIVERS_I2C_MAX98396 is not set
|
||||||
|
CONFIG_FSP_USE_REPO=y
|
||||||
|
# CONFIG_DISPLAY_HOBS is not set
|
||||||
|
# CONFIG_DISPLAY_UPD_DATA is not set
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_0=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_1=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_2=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_3=y
|
||||||
|
CONFIG_PLATFORM_USES_FSP2_X86_32=y
|
||||||
|
CONFIG_HAVE_INTEL_FSP_REPO=y
|
||||||
|
CONFIG_ADD_FSP_BINARIES=y
|
||||||
|
CONFIG_FSP_T_LOCATION=0xfffe0000
|
||||||
|
CONFIG_FSP_S_CBFS="fsps.bin"
|
||||||
|
CONFIG_FSP_M_CBFS="fspm.bin"
|
||||||
|
CONFIG_FSP_FULL_FD=y
|
||||||
|
CONFIG_FSP_T_RESERVED_SIZE=0x0
|
||||||
|
CONFIG_FSP_M_XIP=y
|
||||||
|
CONFIG_FSP_USES_CB_STACK=y
|
||||||
|
CONFIG_FSP_COMPRESS_FSP_S_LZ4=y
|
||||||
|
CONFIG_FSP_STATUS_GLOBAL_RESET_REQUIRED_3=y
|
||||||
|
CONFIG_FSP_STATUS_GLOBAL_RESET=0x40000003
|
||||||
|
CONFIG_SOC_INTEL_COMMON_FSP_RESET=y
|
||||||
|
CONFIG_FSPS_HAS_ARCH_UPD=y
|
||||||
|
CONFIG_FSPS_USE_MULTI_PHASE_INIT=y
|
||||||
|
CONFIG_FSP_USES_CB_DEBUG_EVENT_HANDLER=y
|
||||||
|
# CONFIG_DISPLAY_FSP_TIMESTAMPS is not set
|
||||||
|
CONFIG_FSP_ENABLE_SERIAL_DEBUG=y
|
||||||
|
CONFIG_INTEL_GMA_ACPI=y
|
||||||
|
CONFIG_INTEL_GMA_OPREGION_2_1=y
|
||||||
|
CONFIG_DRIVERS_INTEL_PMC=y
|
||||||
|
# CONFIG_DRIVERS_NXP_UWB_SR1XX is not set
|
||||||
|
# CONFIG_DRIVERS_PS2_KEYBOARD is not set
|
||||||
|
CONFIG_DRIVERS_MC146818=y
|
||||||
|
# CONFIG_USE_PC_CMOS_ALTCENTURY is not set
|
||||||
|
CONFIG_MEMORY_MAPPED_TPM=y
|
||||||
|
CONFIG_TPM_TIS_BASE_ADDRESS=0xfed40000
|
||||||
|
# CONFIG_DRIVERS_SIL_3114 is not set
|
||||||
|
CONFIG_DRIVERS_USB_ACPI=y
|
||||||
|
CONFIG_DRIVERS_WIFI_GENERIC=y
|
||||||
|
CONFIG_MP_SERVICES_PPI=y
|
||||||
|
CONFIG_MP_SERVICES_PPI_V2=y
|
||||||
|
CONFIG_DRIVERS_INTEL_USB4_RETIMER=y
|
||||||
|
# end of Generic Drivers
|
||||||
|
|
||||||
|
#
|
||||||
|
# Security
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# CBFS verification
|
||||||
|
#
|
||||||
|
# CONFIG_CBFS_VERIFICATION is not set
|
||||||
|
# end of CBFS verification
|
||||||
|
|
||||||
|
#
|
||||||
|
# Verified Boot (vboot)
|
||||||
|
#
|
||||||
|
CONFIG_VBOOT_LIB=y
|
||||||
|
# end of Verified Boot (vboot)
|
||||||
|
|
||||||
|
#
|
||||||
|
# Trusted Platform Module
|
||||||
|
#
|
||||||
|
# CONFIG_NO_TPM is not set
|
||||||
|
CONFIG_TPM2=y
|
||||||
|
CONFIG_TPM=y
|
||||||
|
CONFIG_MAINBOARD_HAS_TPM2=y
|
||||||
|
# CONFIG_DEBUG_TPM is not set
|
||||||
|
# CONFIG_TPM_RDRESP_NEED_DELAY is not set
|
||||||
|
CONFIG_TPM_MEASURED_BOOT=y
|
||||||
|
CONFIG_TPM_MEASURED_BOOT_RUNTIME_DATA=""
|
||||||
|
# end of Trusted Platform Module
|
||||||
|
|
||||||
|
#
|
||||||
|
# Memory initialization
|
||||||
|
#
|
||||||
|
CONFIG_PLATFORM_HAS_DRAM_CLEAR=y
|
||||||
|
# CONFIG_SECURITY_CLEAR_DRAM_ON_REGULAR_BOOT is not set
|
||||||
|
# end of Memory initialization
|
||||||
|
|
||||||
|
# CONFIG_INTEL_TXT is not set
|
||||||
|
# CONFIG_STM is not set
|
||||||
|
# CONFIG_INTEL_CBNT_SUPPORT is not set
|
||||||
|
CONFIG_BOOTMEDIA_LOCK_NONE=y
|
||||||
|
# CONFIG_BOOTMEDIA_LOCK_CONTROLLER is not set
|
||||||
|
# CONFIG_BOOTMEDIA_LOCK_CHIP is not set
|
||||||
|
# end of Security
|
||||||
|
|
||||||
|
CONFIG_ACPI_HAVE_PCAT_8259=y
|
||||||
|
CONFIG_ACPI_INTEL_HARDWARE_SLEEP_VALUES=y
|
||||||
|
CONFIG_ACPI_SOC_NVS=y
|
||||||
|
CONFIG_HAVE_ACPI_TABLES=y
|
||||||
|
CONFIG_ACPI_LPIT=y
|
||||||
|
CONFIG_BOOT_DEVICE_SPI_FLASH=y
|
||||||
|
CONFIG_BOOT_DEVICE_MEMORY_MAPPED=y
|
||||||
|
CONFIG_BOOT_DEVICE_SUPPORTS_WRITES=y
|
||||||
|
CONFIG_RTC=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Console
|
||||||
|
#
|
||||||
|
CONFIG_BOOTBLOCK_CONSOLE=y
|
||||||
|
CONFIG_POSTCAR_CONSOLE=y
|
||||||
|
CONFIG_SQUELCH_EARLY_SMP=y
|
||||||
|
CONFIG_FIXED_UART_FOR_CONSOLE=y
|
||||||
|
# CONFIG_SPKMODEM is not set
|
||||||
|
# CONFIG_CONSOLE_NE2K is not set
|
||||||
|
CONFIG_CONSOLE_CBMEM=y
|
||||||
|
# CONFIG_CONSOLE_CBMEM_DUMP_TO_UART is not set
|
||||||
|
CONFIG_CONSOLE_SPI_FLASH=y
|
||||||
|
CONFIG_CONSOLE_SPI_FLASH_BUFFER_SIZE=0x50000
|
||||||
|
# CONFIG_CONSOLE_SYSTEM76_EC is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_8 is not set
|
||||||
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL_7=y
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_6 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_5 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_4 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_3 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_2 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_1 is not set
|
||||||
|
# CONFIG_DEFAULT_CONSOLE_LOGLEVEL_0 is not set
|
||||||
|
CONFIG_DEFAULT_CONSOLE_LOGLEVEL=7
|
||||||
|
CONFIG_CONSOLE_USE_LOGLEVEL_PREFIX=y
|
||||||
|
CONFIG_CONSOLE_USE_ANSI_ESCAPES=y
|
||||||
|
# CONFIG_CMOS_POST is not set
|
||||||
|
CONFIG_HWBASE_DEBUG_CB=y
|
||||||
|
# end of Console
|
||||||
|
|
||||||
|
CONFIG_HAVE_ACPI_RESUME=y
|
||||||
|
CONFIG_RESUME_PATH_SAME_AS_BOOT=y
|
||||||
|
CONFIG_HAVE_MONOTONIC_TIMER=y
|
||||||
|
CONFIG_HAVE_OPTION_TABLE=y
|
||||||
|
CONFIG_IOAPIC=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# System tables
|
||||||
|
#
|
||||||
|
CONFIG_GENERATE_SMBIOS_TABLES=y
|
||||||
|
CONFIG_MAINBOARD_SERIAL_NUMBER="123456789"
|
||||||
|
# end of System tables
|
||||||
|
|
||||||
|
#
|
||||||
|
# Payload
|
||||||
|
#
|
||||||
|
# CONFIG_PAYLOAD_NONE is not set
|
||||||
|
# CONFIG_PAYLOAD_ELF is not set
|
||||||
|
# CONFIG_PAYLOAD_BOOTBOOT is not set
|
||||||
|
# CONFIG_PAYLOAD_FILO is not set
|
||||||
|
# CONFIG_PAYLOAD_GRUB2 is not set
|
||||||
|
# CONFIG_PAYLOAD_SEAGRUB is not set
|
||||||
|
# CONFIG_PAYLOAD_LINUXBOOT is not set
|
||||||
|
# CONFIG_PAYLOAD_SEABIOS is not set
|
||||||
|
# CONFIG_PAYLOAD_UBOOT is not set
|
||||||
|
# CONFIG_PAYLOAD_YABITS is not set
|
||||||
|
# CONFIG_PAYLOAD_EDK2 is not set
|
||||||
|
CONFIG_PAYLOAD_LINUX=y
|
||||||
|
CONFIG_PAYLOAD_FILE="@BOARD_BUILD_DIR@/bzImage"
|
||||||
|
CONFIG_LINUX_INITRD="@BOARD_BUILD_DIR@/initrd.cpio.xz"
|
||||||
|
CONFIG_PAYLOAD_OPTIONS=""
|
||||||
|
# CONFIG_PXE is not set
|
||||||
|
CONFIG_COMPRESS_SECONDARY_PAYLOAD=y
|
||||||
|
|
||||||
|
#
|
||||||
|
# Secondary Payloads
|
||||||
|
#
|
||||||
|
# CONFIG_COREINFO_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_GRUB2_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_MEMTEST_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_NVRAMCUI_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_SEABIOS_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_TINT_SECONDARY_PAYLOAD is not set
|
||||||
|
# CONFIG_COREDOOM_SECONDARY_PAYLOAD is not set
|
||||||
|
# end of Secondary Payloads
|
||||||
|
# end of Payload
|
||||||
|
|
||||||
|
#
|
||||||
|
# Debugging
|
||||||
|
#
|
||||||
|
|
||||||
|
#
|
||||||
|
# CPU Debug Settings
|
||||||
|
#
|
||||||
|
# CONFIG_DISPLAY_MTRRS is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# BLOB Debug Settings
|
||||||
|
#
|
||||||
|
# CONFIG_DISPLAY_FSP_CALLS_AND_STATUS is not set
|
||||||
|
# CONFIG_DISPLAY_FSP_HEADER is not set
|
||||||
|
# CONFIG_VERIFY_HOBS is not set
|
||||||
|
CONFIG_DISPLAY_FSP_VERSION_INFO=y
|
||||||
|
CONFIG_HAVE_GPIO_SNAPSHOT_VERIFY_SUPPORT=y
|
||||||
|
# CONFIG_CHECK_GPIO_CONFIG_CHANGES is not set
|
||||||
|
|
||||||
|
#
|
||||||
|
# General Debug Settings
|
||||||
|
#
|
||||||
|
# CONFIG_GDB_STUB is not set
|
||||||
|
# CONFIG_FATAL_ASSERTS is not set
|
||||||
|
CONFIG_HAVE_DEBUG_GPIO=y
|
||||||
|
# CONFIG_DEBUG_GPIO is not set
|
||||||
|
# CONFIG_DEBUG_CBFS is not set
|
||||||
|
CONFIG_HAVE_DEBUG_RAM_SETUP=y
|
||||||
|
# CONFIG_DEBUG_RAM_SETUP is not set
|
||||||
|
CONFIG_HAVE_DEBUG_SMBUS=y
|
||||||
|
# CONFIG_DEBUG_SMBUS is not set
|
||||||
|
# CONFIG_DEBUG_SMI is not set
|
||||||
|
# CONFIG_DEBUG_MALLOC is not set
|
||||||
|
# CONFIG_DEBUG_CONSOLE_INIT is not set
|
||||||
|
# CONFIG_DEBUG_SPI_FLASH is not set
|
||||||
|
# CONFIG_DEBUG_BOOT_STATE is not set
|
||||||
|
# CONFIG_DEBUG_ADA_CODE is not set
|
||||||
|
CONFIG_HAVE_EM100_SUPPORT=y
|
||||||
|
# CONFIG_EM100 is not set
|
||||||
|
# end of Debugging
|
||||||
|
|
||||||
|
CONFIG_SPD_READ_BY_WORD=y
|
||||||
|
CONFIG_WARNINGS_ARE_ERRORS=y
|
||||||
|
CONFIG_MAX_REBOOT_CNT=3
|
||||||
|
CONFIG_RELOCATABLE_MODULES=y
|
||||||
|
CONFIG_GENERIC_GPIO_LIB=y
|
||||||
|
CONFIG_HAVE_BOOTBLOCK=y
|
||||||
|
CONFIG_HAVE_ROMSTAGE=y
|
||||||
|
CONFIG_HAVE_RAMSTAGE=y
|
||||||
3510
config/linux-nitropad-x.config
Normal file
3510
config/linux-nitropad-x.config
Normal file
File diff suppressed because it is too large
Load Diff
8
create-npf.sh
Executable file
8
create-npf.sh
Executable file
@ -0,0 +1,8 @@
|
|||||||
|
#!/bin/bash
|
||||||
|
set -exuo pipefail
|
||||||
|
HEADS_GIT_VERSION=$(git describe --tags)
|
||||||
|
BOARD=$1
|
||||||
|
cd ./build/x86/${BOARD}/
|
||||||
|
sha256sum heads-${BOARD}-${HEADS_GIT_VERSION}.rom > sha256sum.txt
|
||||||
|
sed -ie 's@ @ /tmp/verified_rom/@g' sha256sum.txt
|
||||||
|
zip heads-${BOARD}-${HEADS_GIT_VERSION}.npf heads-${BOARD}-${HEADS_GIT_VERSION}.rom sha256sum.txt
|
||||||
@ -33,7 +33,7 @@ while true; do
|
|||||||
--yesno "You will need to insert a USB drive containing your BIOS image (*.rom or *.tgz).\n\nAfter you select this file, this program will reflash your BIOS.\n\nDo you want to proceed?" 0 80) then
|
--yesno "You will need to insert a USB drive containing your BIOS image (*.rom or *.tgz).\n\nAfter you select this file, this program will reflash your BIOS.\n\nDo you want to proceed?" 0 80) then
|
||||||
mount_usb
|
mount_usb
|
||||||
if grep -q /media /proc/mounts ; then
|
if grep -q /media /proc/mounts ; then
|
||||||
find /media ! -path '*/\.*' -type f \( -name '*.rom' -o -name '*.tgz' \) | sort > /tmp/filelist.txt
|
find /media ! -path '*/\.*' -type f \( -name '*.rom' -o -name '*.tgz' -o -type f -name '*.npf' \) | sort > /tmp/filelist.txt
|
||||||
file_selector "/tmp/filelist.txt" "Choose the ROM to flash"
|
file_selector "/tmp/filelist.txt" "Choose the ROM to flash"
|
||||||
if [ "$FILE" == "" ]; then
|
if [ "$FILE" == "" ]; then
|
||||||
exit 1
|
exit 1
|
||||||
@ -41,6 +41,27 @@ while true; do
|
|||||||
ROM=$FILE
|
ROM=$FILE
|
||||||
fi
|
fi
|
||||||
|
|
||||||
|
# is a .npf provided?
|
||||||
|
if [ -z "${ROM##*.npf}" ]; then
|
||||||
|
# unzip to /tmp/verified_rom
|
||||||
|
mkdir /tmp/verified_rom
|
||||||
|
unzip $ROM -d /tmp/verified_rom
|
||||||
|
# check file integrity
|
||||||
|
if (cd /tmp/verified_rom/ && sha256sum -cs /tmp/verified_rom/sha256sum.txt) ; then
|
||||||
|
ROM="$(head -n1 /tmp/verified_rom/sha256sum.txt | cut -d ' ' -f 3)"
|
||||||
|
else
|
||||||
|
whiptail --title 'ROM Integrity Check Failed! ' \
|
||||||
|
--msgbox "$ROM integrity check failed. Did not flash.\n\nPlease check your file (e.g. re-download).\n" 16 60
|
||||||
|
exit
|
||||||
|
fi
|
||||||
|
else
|
||||||
|
# exit if we shall not proceed
|
||||||
|
if ! (whiptail $CONFIG_ERROR_BG_COLOR --title 'Flash ROM without integrity check?' \
|
||||||
|
--yesno "You have provided a *.rom file. The integrity of the file can not be\nchecked for this file.\nIf you do not know how to check the file integrity yourself,\nyou should use a *.npf file instead.\n\nIf the file is damaged, you will not be able to boot anymore.\nDo you want to proceed flashing without file integrity check?" 16 60) then
|
||||||
|
exit
|
||||||
|
fi
|
||||||
|
fi
|
||||||
|
|
||||||
if (whiptail $BG_COLOR_WARNING --title 'Flash ROM?' \
|
if (whiptail $BG_COLOR_WARNING --title 'Flash ROM?' \
|
||||||
--yesno "This will replace your current ROM with:\n\n${ROM#"/media/"}\n\nDo you want to proceed?" 0 80) then
|
--yesno "This will replace your current ROM with:\n\n${ROM#"/media/"}\n\nDo you want to proceed?" 0 80) then
|
||||||
if [ "$menu_choice" == "c" ]; then
|
if [ "$menu_choice" == "c" ]; then
|
||||||
|
|||||||
36
initrd/bin/nitropad-shutdown.sh
Executable file
36
initrd/bin/nitropad-shutdown.sh
Executable file
@ -0,0 +1,36 @@
|
|||||||
|
#!/bin/ash
|
||||||
|
|
||||||
|
# Method to access IT5570 IO Depth 2 registers
|
||||||
|
it5570_i2ec() {
|
||||||
|
# TODO: Use /dev/port instead of iotools
|
||||||
|
|
||||||
|
# Address high byte
|
||||||
|
iotools io_write8 0x2e 0x2e
|
||||||
|
iotools io_write8 0x2f 0x11
|
||||||
|
iotools io_write8 0x2e 0x2f
|
||||||
|
iotools io_write8 0x2f $(($2>>8 & 0xff))
|
||||||
|
|
||||||
|
# Address low byte
|
||||||
|
iotools io_write8 0x2e 0x2e
|
||||||
|
iotools io_write8 0x2f 0x10
|
||||||
|
iotools io_write8 0x2e 0x2f
|
||||||
|
iotools io_write8 0x2f $(($2 & 0xff))
|
||||||
|
|
||||||
|
# Data
|
||||||
|
iotools io_write8 0x2e 0x2e
|
||||||
|
iotools io_write8 0x2f 0x12
|
||||||
|
iotools io_write8 0x2e 0x2f
|
||||||
|
|
||||||
|
case $1 in
|
||||||
|
"r")
|
||||||
|
iotools io_read8 0x2f
|
||||||
|
;;
|
||||||
|
"w")
|
||||||
|
iotools io_write8 0x2f "$3"
|
||||||
|
;;
|
||||||
|
esac
|
||||||
|
}
|
||||||
|
|
||||||
|
# shut down using EC external watchdog reset
|
||||||
|
it5570_i2ec w 0x1f01 0x20
|
||||||
|
it5570_i2ec w 0x1f07 0x01
|
||||||
@ -8,6 +8,11 @@ if [ "$CONFIG_TPM" = "y" ]; then
|
|||||||
tpmr shutdown
|
tpmr shutdown
|
||||||
fi
|
fi
|
||||||
|
|
||||||
|
# Run special EC-based poweroff for Nitropad-Nxx
|
||||||
|
if [ "${CONFIG_BOARD%_*}" = nitropad-nv41 || "${CONFIG_BOARD%_*}" = nitropad-ns51 ]; then
|
||||||
|
/bin/nitropad-shutdown.sh
|
||||||
|
fi
|
||||||
|
|
||||||
# Sync all mounted filesystems
|
# Sync all mounted filesystems
|
||||||
echo s > /proc/sysrq-trigger
|
echo s > /proc/sysrq-trigger
|
||||||
|
|
||||||
|
|||||||
@ -8,6 +8,11 @@ if [ "$CONFIG_TPM" = "y" ]; then
|
|||||||
tpmr shutdown
|
tpmr shutdown
|
||||||
fi
|
fi
|
||||||
|
|
||||||
|
# Run special EC-based poweroff for Nitropad-Nxx
|
||||||
|
if [ "${CONFIG_BOARD%_*}" = nitropad-nv41 || "${CONFIG_BOARD%_*}" = nitropad-ns51 ]; then
|
||||||
|
/bin/nitropad-shutdown.sh
|
||||||
|
fi
|
||||||
|
|
||||||
# Sync all mounted filesystems
|
# Sync all mounted filesystems
|
||||||
echo s > /proc/sysrq-trigger
|
echo s > /proc/sysrq-trigger
|
||||||
|
|
||||||
|
|||||||
@ -85,6 +85,14 @@ coreboot-purism_repo := https://source.puri.sm/firmware/coreboot.git
|
|||||||
coreboot-purism_commit_hash := a899f08d2789db1dd9b02cff34179c4d38e6d0e3
|
coreboot-purism_commit_hash := a899f08d2789db1dd9b02cff34179c4d38e6d0e3
|
||||||
$(eval $(call coreboot_module,purism,))
|
$(eval $(call coreboot_module,purism,))
|
||||||
|
|
||||||
|
#Nitrokey nv41/ns50 are based on Dasharo coreboot port,
|
||||||
|
# with patches staging under coreboot-clevo_release
|
||||||
|
coreboot-nitrokey_repo := https://github.com/dasharo/coreboot
|
||||||
|
coreboot-nitrokey_commit_hash := ae10b20f5c6abc9c23f709b65c46be6525da8c13
|
||||||
|
coreboot-nitrokey_patch_version := clevo_release
|
||||||
|
#We use clevo_release's crossgcc for now, unshared but between nitropad nv41/ns50
|
||||||
|
$(eval $(call coreboot_module,nitrokey,))
|
||||||
|
|
||||||
# Check that the board configured the coreboot version correctly
|
# Check that the board configured the coreboot version correctly
|
||||||
ifeq "$(CONFIG_COREBOOT_VERSION)" ""
|
ifeq "$(CONFIG_COREBOOT_VERSION)" ""
|
||||||
$(error "$(BOARD): does not specify coreboot version under CONFIG_COREBOOT_VERSION")
|
$(error "$(BOARD): does not specify coreboot version under CONFIG_COREBOOT_VERSION")
|
||||||
@ -99,6 +107,7 @@ coreboot_dir := $($(coreboot_module)_dir)
|
|||||||
coreboot_base_dir := $($(coreboot_module)_base_dir)
|
coreboot_base_dir := $($(coreboot_module)_base_dir)
|
||||||
|
|
||||||
$(coreboot_module)_depends += $(if $(CONFIG_PURISM_BLOBS), purism-blobs)
|
$(coreboot_module)_depends += $(if $(CONFIG_PURISM_BLOBS), purism-blobs)
|
||||||
|
$(coreboot_module)_depends += $(if $(CONFIG_NITROKEY_BLOBS), nitrokey-blobs)
|
||||||
|
|
||||||
# coreboot builds are specialized on a per-target basis.
|
# coreboot builds are specialized on a per-target basis.
|
||||||
# The builds are done in a per-target subdirectory
|
# The builds are done in a per-target subdirectory
|
||||||
|
|||||||
22
modules/iotools
Normal file
22
modules/iotools
Normal file
@ -0,0 +1,22 @@
|
|||||||
|
modules-$(CONFIG_IOTOOLS) += iotools
|
||||||
|
|
||||||
|
iotools_depends := pciutils $(musl_dep)
|
||||||
|
|
||||||
|
iotools_version := 18949fdc4dedb1da3f51ee83a582b112fb9f2c71
|
||||||
|
iotools_dir := iotools-$(iotools_version)
|
||||||
|
iotools_tar := $(iotools_dir).tar.gz
|
||||||
|
iotools_url := https://github.com/adurbin/iotools/archive/$(iotools_version).tar.gz
|
||||||
|
iotools_hash := 8df266f55cd8e79328faa0e274edc082de3f6c240617a28ace93abdace324ec2
|
||||||
|
|
||||||
|
iotools_cfg := \
|
||||||
|
|
||||||
|
iotools_target := \
|
||||||
|
$(MAKE_JOBS) \
|
||||||
|
$(CROSS_TOOLS) \
|
||||||
|
|
||||||
|
iotools_output := \
|
||||||
|
iotools
|
||||||
|
|
||||||
|
iotools_libraries := \
|
||||||
|
|
||||||
|
iotools_configure :=
|
||||||
12
modules/nitrokey-blobs
Normal file
12
modules/nitrokey-blobs
Normal file
@ -0,0 +1,12 @@
|
|||||||
|
modules-$(CONFIG_NITROKEY_BLOBS) += nitrokey-blobs
|
||||||
|
|
||||||
|
nitrokey-blobs_base_dir := nitrokey-blobs
|
||||||
|
nitrokey-blobs_version := c9e2a556508518d54cd57f8c7a440cb370f69de1
|
||||||
|
nitrokey-blobs_tar := nitrokey-blobs-${nitrokey-blobs_version}.tar.gz
|
||||||
|
nitrokey-blobs_tar_opt := --strip 1
|
||||||
|
nitrokey-blobs_url := https://github.com/Nitrokey/firmware-blobs/archive/${nitrokey-blobs_version}.tar.gz
|
||||||
|
nitrokey-blobs_hash := 1458798fa774e43ab2e6cf5cff875f4b3628c5dc1926bf9ec65051964b1a4854
|
||||||
|
|
||||||
|
## there is nothing to be built
|
||||||
|
nitrokey-blobs_output := .built
|
||||||
|
nitrokey-blobs_configure := echo -e 'all:\n\ttouch .built' > Makefile
|
||||||
@ -0,0 +1,23 @@
|
|||||||
|
From 6328eebb101fd0ded7168e1377da6a1a82a8e2da Mon Sep 17 00:00:00 2001
|
||||||
|
From: Markus Meissner <coder@safemailbox.de>
|
||||||
|
Date: Wed, 19 Jul 2023 20:36:57 +0200
|
||||||
|
Subject: [PATCH] change acpica-unix2 location to a mirror
|
||||||
|
|
||||||
|
---
|
||||||
|
util/crossgcc/buildgcc | 2 +-
|
||||||
|
1 file changed, 1 insertion(+), 1 deletion(-)
|
||||||
|
|
||||||
|
diff --git a/util/crossgcc/buildgcc b/util/crossgcc/buildgcc
|
||||||
|
index 03c24da1be9..8880c89ea66 100755
|
||||||
|
--- a/util/crossgcc/buildgcc
|
||||||
|
+++ b/util/crossgcc/buildgcc
|
||||||
|
@@ -52,7 +52,7 @@ MPFR_ARCHIVE="https://ftpmirror.gnu.org/mpfr/mpfr-${MPFR_VERSION}.tar.xz"
|
||||||
|
MPC_ARCHIVE="https://ftpmirror.gnu.org/mpc/mpc-${MPC_VERSION}.tar.gz"
|
||||||
|
GCC_ARCHIVE="https://ftpmirror.gnu.org/gcc/gcc-${GCC_VERSION}/gcc-${GCC_VERSION}.tar.xz"
|
||||||
|
BINUTILS_ARCHIVE="https://ftpmirror.gnu.org/binutils/binutils-${BINUTILS_VERSION}.tar.xz"
|
||||||
|
-IASL_ARCHIVE="https://acpica.org/sites/acpica/files/acpica-unix2-${IASL_VERSION}.tar.gz"
|
||||||
|
+IASL_ARCHIVE="https://gsdview.appspot.com/chromeos-localmirror/distfiles/acpica-unix2-${IASL_VERSION}.tar.gz"
|
||||||
|
# CLANG toolchain archive locations
|
||||||
|
LLVM_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/llvm-${CLANG_VERSION}.src.tar.xz"
|
||||||
|
CLANG_ARCHIVE="https://github.com/llvm/llvm-project/releases/download/llvmorg-${CLANG_VERSION}/clang-${CLANG_VERSION}.src.tar.xz"
|
||||||
|
|
||||||
Loading…
Reference in New Issue
Block a user