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75 lines
3.1 KiB
Diff
75 lines
3.1 KiB
Diff
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From c6dd40b67a21bda1d8ec6043f19e4606a3695a05 Mon Sep 17 00:00:00 2001
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From: Youness Alaoui <youness.alaoui@puri.sm>
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Date: Tue, 13 Mar 2018 16:53:30 -0400
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Subject: [PATCH 1/3] purism/librem13v1, librem13v2, liberm15v3: Fix EC LPC I/O
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port
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The LPC I/O ports for communicating with the EC were not set
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properly causing ectool to fail to read the Index I/O from the EC.
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The EC Index I/O is on port 0x380 and the LPC I/O port needs to be
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decoded by the PCI device for it to be accessible.
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This fixes it for the Librem 13v1, 13v2 and 15v3.
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Change-Id: Ide1d158340eadfabbce5f70ceccddfabb4db188a
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Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
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---
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src/mainboard/purism/librem13v1/devicetree.cb | 4 ++++
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src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 6 +++---
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src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb | 6 +++---
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3 files changed, 10 insertions(+), 6 deletions(-)
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diff --git a/src/mainboard/purism/librem13v1/devicetree.cb b/src/mainboard/purism/librem13v1/devicetree.cb
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index ba38070a55..c916e9a9a4 100644
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--- a/src/mainboard/purism/librem13v1/devicetree.cb
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+++ b/src/mainboard/purism/librem13v1/devicetree.cb
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@@ -18,6 +18,10 @@ chip soc/intel/broadwell
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register "gpu_panel_power_backlight_on_delay" = "2000" # 200ms
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register "gpu_panel_power_backlight_off_delay" = "2000" # 200ms
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+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
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+ register "gen1_dec" = "0x00000381"
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+ register "gen2_dec" = "0x000c0081"
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+
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# Port 0 is HDD
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# Port 3 is M.2 NGFF
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register "sata_port_map" = "0x9"
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diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
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index 159d921046..da97fb9ea7 100644
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--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
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+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
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@@ -24,9 +24,9 @@ chip soc/intel/skylake
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register "gpe0_dw1" = "GPP_D"
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register "gpe0_dw2" = "GPP_E"
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- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
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- register "gen1_dec" = "0x00fc0801"
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- register "gen2_dec" = "0x000c0201"
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+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
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+ register "gen1_dec" = "0x00000381"
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+ register "gen2_dec" = "0x000c0081"
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# Enable "Intel Speed Shift Technology"
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register "speed_shift_enable" = "1"
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diff --git a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
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index 035db18eff..deaf3a6deb 100644
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--- a/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
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+++ b/src/mainboard/purism/librem_skl/variants/librem15v3/devicetree.cb
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@@ -24,9 +24,9 @@ chip soc/intel/skylake
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register "gpe0_dw1" = "GPP_D"
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register "gpe0_dw2" = "GPP_E"
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- # EC host command ranges are in 0x800-0x8ff & 0x200-0x20f
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- register "gen1_dec" = "0x00fc0801"
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- register "gen2_dec" = "0x000c0201"
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+ # EC host command ranges are in 0x380-0x383 & 0x80-0x8f
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+ register "gen1_dec" = "0x00000381"
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+ register "gen2_dec" = "0x000c0081"
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# Enable "Intel Speed Shift Technology"
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register "speed_shift_enable" = "1"
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--
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2.14.3
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