heads/patches/coreboot-4.7/0006-purism-librem_skl-Explicitely-enable-VMX-and-Intel-S.patch

From e6998f87d8d4c389d86586ea66f0ff20cd7751d2 Mon Sep 17 00:00:00 2001
From: Youness Alaoui <youness.alaoui@puri.sm>
Date: Fri, 9 Feb 2018 18:44:45 -0500
Subject: [PATCH 6/9] purism/librem_skl: Explicitely enable VMX and Intel
 SpeedStep

The VMX feature was enabled by default by the FSP but a different
FSP might have it disabled, so this ensures that VMX is explicitely
enabled for the Librem machines. This option however doesn't seem
to work in the FSP since VMX doesn't actually get enabled but as
long as the features MSR remains unlocked, it's not critical.

Enabling Intel SpeedStep Technology ensures the ACPI tables contain
the C-states/P-states which are required for the xen-acpi-processor
module to be loaded. Without it, the Qubes 4.0-rc4 installer will
complain at boot about modules that could not be loaded.

Change-Id: I968ef36ec9382a10db13d96fd3a5c0fc904db387
Signed-off-by: Youness Alaoui <youness.alaoui@puri.sm>
---
 src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
index e2e2ac03da..9ce1d91549 100644
--- a/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
+++ b/src/mainboard/purism/librem_skl/variants/librem13v2/devicetree.cb
@@ -7,6 +7,9 @@ chip soc/intel/skylake
 	register "deep_s5_enable_dc" = "0"
 	register "deep_sx_config" = "DSX_EN_LAN_WAKE_PIN"
 
+	register "eist_enable" = "1"
+	register "VmxEnable" = "1"
+
 	# GPE configuration
 	# Note that GPE events called out in ASL code rely on this
 	# route. i.e. If this route changes then the affected GPE
-- 
2.14.3