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71a48c0a26
Ref #3260
57 lines
1.4 KiB
C++
57 lines
1.4 KiB
C++
/*
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* \brief Atomic operations for ARM 64-bit.
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* \author Stefan Kalkowski
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* \date 2019-03-25
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*/
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/*
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* Copyright (C) 2019 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__SPEC__ARM_64__CPU__ATOMIC_H_
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#define _INCLUDE__SPEC__ARM_64__CPU__ATOMIC_H_
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#include <cpu/memory_barrier.h>
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namespace Genode {
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/**
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* Atomic compare and exchange
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*
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* This function compares the value at dest with cmp_val.
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* If both values are equal, dest is set to new_val. If
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* both values are different, the value at dest remains
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* unchanged.
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*
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* Note, that cmpxchg() represents a memory barrier.
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*
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* \return 1 if the value was successfully changed to new_val,
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* 0 if cmp_val and the value at dest differ.
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*/
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inline int cmpxchg(volatile int *dest, int cmp_val, int new_val)
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{
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int fail, old_val = 0;
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do {
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asm volatile(
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"ldxr %w1, %2 \n"
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"mov %w0, #0 \n"
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"cmp %w1, %w3 \n"
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"b.ne 1f \n"
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"stxr %w0, %w4, %2 \n"
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"1: \n"
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: "=&r" (fail), "=&r" (old_val), "+Q" (*dest)
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: "r" (cmp_val), "r" (new_val)
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: "cc");
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} while (fail);
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Genode::memory_barrier();
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return (old_val != cmp_val) ? 0 : 1;
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}
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}
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#endif /* _INCLUDE__SPEC__ARM_64__CPU__ATOMIC_H_ */
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