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This patch introduces new types for expressing CPU affinities. Instead of dealing with physical CPU numbers, affinities are expressed as rectangles in a grid of virtual CPU nodes. This clears the way to conveniently assign sets of adjacent CPUs to subsystems, each of them managing their respective viewport of the coordinate space. By using 2D Cartesian coordinates, the locality of CPU nodes can be modeled for different topologies such as SMP (simple Nx1 grid), grids of NUMA nodes, or ring topologies. |
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| .. | ||
| 32bit/base | ||
| 64bit/base | ||
| arm | ||
| base | ||
| cap_session | ||
| cpu_session | ||
| dataspace | ||
| drivers | ||
| io_mem_session | ||
| io_port_session | ||
| irq_session | ||
| log_session | ||
| pager | ||
| parent | ||
| pd_session | ||
| platform | ||
| ram_session | ||
| rm_session | ||
| rom_session | ||
| root | ||
| session | ||
| signal_session | ||
| thread | ||
| util | ||
| x86/cpu | ||
| x86_32/cpu | ||
| x86_64/cpu | ||
| README | ||
This directory contains include files of interfaces that are exported by components to be used by other components. Each subdirectory corresponds to the component exporting the interface.