genode/repos/base-hw
Martin Stein 4ef2b0ed2e hw arm: avoid shared cache lines during MP init
When bringing up the kernel on multiple cores, there is a time span
where some cores already have caches enabled and some don't. Core-local
storage that may be used during this time must be aligned at least to
the maximum line size among global caches. Otherwise, a cached core may
unintentionally prefetch data of a yet uncached core into a global
cache. This may corrupt the view of the uncached core as soon as it
enables caches. However, to determine the exact alignment for every
single ARM platform isn't sensible. Instead, we can align to the minimum
page size assuming that a cache never wants to prefetch from multiple
pages at once and thus fulfills "line size <= page size".

Fixes #1937
2016-04-25 10:48:01 +02:00
..
doc tool: remove deprecated 'make prepare' mechanism 2016-03-17 17:02:04 +01:00
include Unify ipc_msgbuf.h across base platforms 2016-04-25 10:47:59 +02:00
lib hw_zynq: refactor specs 2016-04-25 10:48:00 +02:00
mk/spec hw_zynq: refactor specs 2016-04-25 10:48:00 +02:00
ports Relax tool checks of Muen port 2016-02-26 11:36:55 +01:00
run remove Versatile Express board (Fix #1611) 2015-07-07 19:48:06 +02:00
src hw arm: avoid shared cache lines during MP init 2016-04-25 10:48:01 +02:00