mirror of
https://github.com/genodelabs/genode.git
synced 2024-12-22 06:57:51 +00:00
233 lines
6.4 KiB
Diff
233 lines
6.4 KiB
Diff
Index: kernel/fiasco/src/Kconfig
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===================================================================
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--- kernel/fiasco/src/Kconfig (revision 38)
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+++ kernel/fiasco/src/Kconfig (working copy)
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@@ -694,6 +694,14 @@
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prevent some P4 processors from being overheated. This option
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requires a working timer IRQ to wakeup getchar periodically.
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+config USER_SINGLE_STEP
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+ bool "Enable user level single stepping support"
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+ depends on IA32
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+ default n
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+ help
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+ This option enables single stepping of user level applications outside of
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+ JDB.
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+
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choice
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prompt "Warn levels"
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default WARN_WARNING
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Index: kernel/fiasco/src/kern/ia32/config-ia32.cpp
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===================================================================
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--- kernel/fiasco/src/kern/ia32/config-ia32.cpp (revision 38)
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+++ kernel/fiasco/src/kern/ia32/config-ia32.cpp (working copy)
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@@ -98,6 +98,12 @@
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static const bool kinfo_timer_uses_rdtsc = false;
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#endif
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+#ifdef CONFIG_USER_SINGLE_STEP
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+ static const bool user_single_step = true;
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+#else
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+ static const bool user_single_step = false;
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+#endif
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+
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static const bool old_sigma0_adapter_hack = false;
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// the default uart to use for serial console
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Index: kernel/fiasco/src/kern/ia32/32/entry-native.S
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===================================================================
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--- kernel/fiasco/src/kern/ia32/32/entry-native.S (revision 38)
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+++ kernel/fiasco/src/kern/ia32/32/entry-native.S (working copy)
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@@ -46,6 +46,30 @@
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jmp slowtraps
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.endm
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+#ifdef CONFIG_USER_SINGLE_STEP
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+.macro HANDLE_USER_TRAP1
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+ /* Save EFLAGS, this may trap if user task had single stepping activated
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+ * test for single stepping
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+ */
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+ pushf
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+ addl $4, %esp
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+ testl $EFLAGS_TF, -4(%esp)
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+.endm
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+
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+.macro RESTORE_USER_TRAP1
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+ /* Restore single stepping if it has been set */
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+ je 1f
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+ orl $EFLAGS_TF, (%esp)
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+1:
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+.endm
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+#else
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+.macro HANDLE_USER_TRAP1
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+.endm
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+
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+.macro RESTORE_USER_TRAP1
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+.endm
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+#endif
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+
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.p2align 4
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.globl entry_vec01_debug
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entry_vec01_debug:
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@@ -55,6 +79,15 @@
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cmpl $VAL__MEM_LAYOUT__TCBS_END, %esp
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jbe 2f
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#endif
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+
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+ /* test if trap was raised within kernel */
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+ testl $3, 4(%esp)
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+ jne 1f
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+
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+ /* turn of EFLAGS.TF */
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+ btrl $7, 8(%esp)
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+ iret
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+
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1: pushl $0
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pushl $1
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pusha
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@@ -214,11 +247,17 @@
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.p2align(4)
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.global entry_sys_fast_ipc_c
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entry_sys_fast_ipc_c:
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+
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+ HANDLE_USER_TRAP1
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+
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pop %esp
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pushl $(GDT_DATA_USER|SEL_PL_U) /* user ss */
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pushl %ebp // push user SP (get in ebp)
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// Fake user eflags, set IOPL to 3
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pushl $(EFLAGS_IOPL_U | EFLAGS_IF)
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+
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+ RESTORE_USER_TRAP1
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+
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cld
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// Fake user cs. This cs value is never used with exception
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// that the thread is ex_regs'd before we leave with sysexit.
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Index: kernel/fiasco/src/kern/ia32/thread-ia32.cpp
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===================================================================
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--- kernel/fiasco/src/kern/ia32/thread-ia32.cpp (revision 38)
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+++ kernel/fiasco/src/kern/ia32/thread-ia32.cpp (working copy)
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@@ -196,12 +196,19 @@
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Address ip;
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int from_user = ts->cs() & 3;
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+ //if (ts->_trapno != 3)
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+ // LOG_MSG_3VAL(this, "trap", ts->_trapno, from_user, ts->ip());
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+
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if (EXPECT_FALSE(ts->_trapno == 0xee)) //debug IPI
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{
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Ipi::eoi(Ipi::Debug);
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goto generic_debug;
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}
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+ if (Config::user_single_step && ts->_trapno == 1 && from_user)
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+ if (send_exception(ts))
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+ goto success;
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+
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if (from_user && _space.user_mode())
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{
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if (ts->_trapno == 14 && Kmem::is_io_bitmap_page_fault(ts->_cr2))
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@@ -521,7 +528,8 @@
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// thread (not alien) and it's a debug trap,
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// debug traps for aliens are always reflected as exception IPCs
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if (!(state() & Thread_alien)
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- && (ts->_trapno == 1 || ts->_trapno == 3))
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+ && ((ts->_trapno == 1 && !Config::user_single_step)
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+ || ts->_trapno == 3))
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return 0; // we do not handle this
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if (ts->_trapno == 3)
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@@ -574,6 +582,11 @@
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}
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}
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+IMPLEMENT inline
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+void
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+Thread::user_single_step(bool)
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+{}
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+
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//----------------------------------------------------------------------------
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IMPLEMENTATION [ia32]:
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@@ -586,6 +599,16 @@
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_gs = _fs = Utcb_init::utcb_segment();
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}
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+IMPLEMENT inline
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+void
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+Thread::user_single_step(bool enable)
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+{
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+ if (!Config::user_single_step)
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+ return;
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+
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+ regs()->flags(enable ? user_flags() | EFLAGS_TF : user_flags() & ~EFLAGS_TF);
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+}
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+
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//----------------------------------------------------------------------------
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IMPLEMENTATION [amd64]:
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Index: kernel/fiasco/src/kern/thread_object.cpp
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===================================================================
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--- kernel/fiasco/src/kern/thread_object.cpp (revision 38)
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+++ kernel/fiasco/src/kern/thread_object.cpp (working copy)
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@@ -524,6 +524,8 @@
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if (o_ip) *o_ip = user_ip();
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if (o_flags) *o_flags = user_flags();
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+ (ops & Exr_single_step) ? user_single_step(true) : user_single_step(false);
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+
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// Changing the run state is only possible when the thread is not in
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// an exception.
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if (!(ops & Exr_cancel) && (state() & Thread_in_exception))
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Index: kernel/fiasco/src/kern/thread.cpp
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===================================================================
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--- kernel/fiasco/src/kern/thread.cpp (revision 38)
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+++ kernel/fiasco/src/kern/thread.cpp (working copy)
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@@ -70,6 +70,7 @@
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{
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Exr_cancel = 0x10000,
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Exr_trigger_exception = 0x20000,
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+ Exr_single_step = 0x40000,
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};
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enum Vcpu_ctl_flags
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@@ -137,6 +138,8 @@
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inline Mword user_flags() const;
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+ inline void user_single_step(bool);
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+
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/** nesting level in debugger (always critical) if >1 */
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static Per_cpu<unsigned long> nested_trap_recover;
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static void handle_remote_requests_irq() asm ("handle_remote_cpu_requests");
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Index: kernel/fiasco/src/kern/arm/thread-arm.cpp
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===================================================================
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--- kernel/fiasco/src/kern/arm/thread-arm.cpp (revision 38)
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+++ kernel/fiasco/src/kern/arm/thread-arm.cpp (working copy)
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@@ -549,6 +549,10 @@
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return (v[insn >> 28] >> (psr >> 28)) & 1;
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}
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+IMPLEMENT inline
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+void Thread::user_single_step(bool)
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+{}
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+
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// ------------------------------------------------------------------------
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IMPLEMENTATION [arm && armv6plus]:
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Index: kernel/fiasco/src/kern/ppc32/thread-ppc32.cpp
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===================================================================
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--- kernel/fiasco/src/kern/ppc32/thread-ppc32.cpp (revision 38)
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+++ kernel/fiasco/src/kern/ppc32/thread-ppc32.cpp (working copy)
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@@ -307,6 +307,10 @@
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}
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}
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+IMPLEMENT inline
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+void Thread::user_single_step(bool)
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+{}
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+
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PUBLIC inline NEEDS ["trap_state.h"]
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int
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Thread::send_exception_arch(Trap_state * /*ts*/)
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