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c246a0d194
using the spike instruction emulator issue #1880
57 lines
1.3 KiB
C++
57 lines
1.3 KiB
C++
/*
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* \brief Atomic operations for RISCV
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* \author Sebastian Sumpf
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* \date 2015-06-01
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*/
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/*
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* Copyright (C) 2015-2016 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU General Public License version 2.
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*/
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#ifndef _INCLUDE__RISCV__CPU__ATOMIC_H_
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#define _INCLUDE__RISCV__CPU__ATOMIC_H_
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/* Genode includes */
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#include <cpu/memory_barrier.h>
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namespace Genode {
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/**
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* Atomic compare and exchange
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*
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* This function compares the value at dest with cmp_val.
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* If both values are equal, dest is set to new_val. If
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* both values are different, the value at dest remains
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* unchanged.
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*
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* Note, that cmpxchg() represents a memory barrier.
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*
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* \return 1 if the value was successfully changed to new_val,
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* 0 if cmp_val and the value at dest differ.
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*/
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inline int cmpxchg(volatile int *dest, int cmp_val, int new_val)
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{
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int old_val;
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__asm__ __volatile__(
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" 1: \n"
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" lr.w %0, (%1) \n"
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" bne %0, %2, 2f \n"
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" sc.w %0, %3, (%1) \n"
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" bnez %0, 1b \n"
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" mv %0, %2 \n"
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" 2: \n"
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: "=&r" (old_val)
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: "r" (dest), "r" (cmp_val), "r" (new_val)
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: "memory");
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Genode::memory_barrier();
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return old_val == cmp_val ? 1 : 0;
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}
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}
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#endif /* _INCLUDE__RISCV__CPU__ATOMIC_H_ */
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