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d7fa4cfb8b
* Add an ieee754 FPU test * Remove simple fpu test Fix #2822
86 lines
1.7 KiB
C++
86 lines
1.7 KiB
C++
/*
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* \brief CPU, PIC, and timer context of a virtual machine
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* \author Stefan Kalkowski
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* \date 2015-02-10
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*/
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/*
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* Copyright (C) 2015-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__SPEC__ARNDALE__VM_STATE_H_
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#define _INCLUDE__SPEC__ARNDALE__VM_STATE_H_
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/* Genode includes */
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#include <cpu/cpu_state.h>
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namespace Genode
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{
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/**
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* CPU context of a virtual machine
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*/
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struct Vm_state;
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}
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struct Genode::Vm_state : Genode::Cpu_state_modes
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{
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Genode::uint64_t vttbr;
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Genode::uint32_t sctrl;
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Genode::uint32_t hsr;
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Genode::uint32_t hpfar;
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Genode::uint32_t hdfar;
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Genode::uint32_t hifar;
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Genode::uint32_t ttbcr;
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Genode::uint32_t ttbr0;
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Genode::uint32_t ttbr1;
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Genode::uint32_t prrr;
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Genode::uint32_t nmrr;
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Genode::uint32_t dacr;
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Genode::uint32_t dfsr;
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Genode::uint32_t ifsr;
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Genode::uint32_t adfsr;
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Genode::uint32_t aifsr;
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Genode::uint32_t dfar;
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Genode::uint32_t ifar;
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Genode::uint32_t cidr;
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Genode::uint32_t tls1;
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Genode::uint32_t tls2;
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Genode::uint32_t tls3;
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Genode::uint32_t cpacr;
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/**
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* Fpu registers
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*/
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Genode::uint32_t fpscr;
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Genode::uint64_t d0_d31[32];
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/**
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* Timer related registers
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*/
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Genode::uint32_t timer_ctrl;
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Genode::uint32_t timer_val;
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bool timer_irq;
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/**
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* PIC related registers
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*/
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enum { NR_IRQ = 4 };
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Genode::uint32_t gic_hcr;
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Genode::uint32_t gic_vmcr;
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Genode::uint32_t gic_misr;
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Genode::uint32_t gic_apr;
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Genode::uint32_t gic_eisr;
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Genode::uint32_t gic_elrsr0;
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Genode::uint32_t gic_lr[4];
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unsigned gic_irq;
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};
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#endif /* _INCLUDE__SPEC__ARNDALE__VM_STATE_H_ */
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