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Currently, on the Arndale platform, core uses a different thread context area base address than the other tasks (0x20000000 vs. 0x40000000). This is problematic, because core calculates the location of the UTCB area of a new thread relatively to core's own thread context area base. So, the UTCB area of non-core threads ends up in a virtual address range which is outside of the task's thread context area and not marked as used in the task's RM session. With this patch, the same thread context area base address gets used in core and in the other tasks. Fixes #779. |
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This repository contains the port of Genode to the Fiasco.OC microkernel. For further information, please refer to the following documents: :[http://genode.org/community/wiki/GenodeOnFiascoOC - Genode on Fiasco.OC Wiki page]: This Wiki page contains the information on how to build and use Genode with Fiasco.OC. :[http://os.inf.tu-dresden.de/fiasco]: Official website for the Fiasco.OC microkernel.