mirror of
https://github.com/genodelabs/genode.git
synced 2025-01-06 05:54:15 +00:00
7ce8464b3a
* Enable the use of the FXSAVE and FXRSTOR instructions, see Intel SDM
Vol. 3C, section 2.5.
* The state of the x87 floating point unit (FPU) is loaded and saved on
demand.
* Make the cr0 control register accessible in the Cpu class. This is in
preparation of the upcoming FPU management.
* Access to the FPU is disabled by setting the Task Switch flag in the cr0
register.
* Access to the FPU is enabled by clearing the Task Switch flag in the cr0
register.
* Implement FPU initialization
* Add is_fpu_enabled helper function
* Add pointer to CPU lazy state to CPU class
* Init FPU when finishing kernel initialization
* Add function to retry FPU instruction:
Similar to the ARM mechanism to retry undefined instructions, implement a
function for retrying an FPU instruction. If a floating-point instruction
causes an #NM exception due to the FPU being disabled, it can be retried
after the correct FPU state is restored, saving the current state and
enabling the FPU in the process.
* Disable FPU when switching to different user context:
This enables lazy save/restore of the FPU since trying to execute a
floating point instruction when the FPU is disabled will cause a #NM
exception.
* Declare constant for #NM exception
* Retry FPU instruction on #NM exception
* Assure alignment of FXSAVE area:
The FXSAVE area is 512-byte memory region that must be 16-byte aligned. As
it turns out the alignment attribute is not honored in all cases so add a
workaround to assure the alignment constraint is met by manually rounding
the start of the FXSAVE area to the next 16-byte boundary if necessary.
59 lines
1.2 KiB
C++
59 lines
1.2 KiB
C++
/*
|
|
* \brief CPU state
|
|
* \author Christian Prochaska
|
|
* \author Stefan Kalkowski
|
|
* \date 2011-04-15
|
|
*
|
|
* This file contains the x86_64-specific part of the CPU state.
|
|
*/
|
|
|
|
/*
|
|
* Copyright (C) 2011-2013 Genode Labs GmbH
|
|
*
|
|
* This file is part of the Genode OS framework, which is distributed
|
|
* under the terms of the GNU General Public License version 2.
|
|
*/
|
|
|
|
#ifndef _INCLUDE__X86_64__CPU__CPU_STATE_H_
|
|
#define _INCLUDE__X86_64__CPU__CPU_STATE_H_
|
|
|
|
#include <base/stdint.h>
|
|
|
|
namespace Genode { struct Cpu_state; }
|
|
|
|
struct Genode::Cpu_state
|
|
{
|
|
enum Cpu_exception {
|
|
NO_MATH_COPROC = 0x07,
|
|
PAGE_FAULT = 0x0e,
|
|
SUPERVISOR_CALL = 0x80,
|
|
INTERRUPTS_START = 0x20,
|
|
RESET = 0xfe,
|
|
INTERRUPTS_END = 0xff,
|
|
};
|
|
|
|
addr_t ip = 0;
|
|
addr_t sp = 0;
|
|
addr_t r8 = 0;
|
|
addr_t r9 = 0;
|
|
addr_t r10 = 0;
|
|
addr_t r11 = 0;
|
|
addr_t r12 = 0;
|
|
addr_t r13 = 0;
|
|
addr_t r14 = 0;
|
|
addr_t r15 = 0;
|
|
addr_t rax = 0;
|
|
addr_t rbx = 0;
|
|
addr_t rcx = 0;
|
|
addr_t rdx = 0;
|
|
addr_t rdi = 0;
|
|
addr_t rsi = 0;
|
|
addr_t rbp = 0;
|
|
addr_t errcode = 0;
|
|
addr_t eflags = 0;
|
|
addr_t trapno = RESET;
|
|
addr_t ss = 0;
|
|
};
|
|
|
|
#endif /* _INCLUDE__X86_64__CPU__CPU_STATE_H_ */
|