genode/repos/base-hw
Stefan Kalkowski 6d48b5484d hw: correct the ARM cache maintainance operations
This commit fixes the following issues regarding cache maintainance
under ARM:

* read out I-, and D-cache line size at runtime and use the correct one
* remove 'update_data_region' call from unprivileged syscalls
* rename 'update_instr_region' syscall to 'cache_coherent_region' to
  reflect what it doing, namely make I-, and D-cache coherent
* restrict 'cache_coherent_region' syscall to one page at a time
* lookup the region given in a 'cache_coherent_region' syscall in the
  page-table of the PD to prevent machine exceptions in the kernel
* only clean D-cache lines, do not invalidate them when pages where
  added on Cortex-A8 and ARMv6 (MMU sees phys. memory here)
* remove unused code relicts of cache maintainance

In addition it introduces per architecture memory clearance functions
used by core, when preparing new dataspaces. Thereby, it optimizes:

* on ARMv7 using per-word assignments
* on ARMv8 using cacheline zeroing
* on x86_64 using 'rept stosq' assembler instruction

Fix 
2020-03-26 11:38:55 +01:00
..
doc Update Muen port 2019-05-27 14:46:53 +02:00
etc kernel: differentiate board-specific components 2019-05-27 14:46:52 +02:00
include hw: correct the ARM cache maintainance operations 2020-03-26 11:38:55 +01:00
lib/mk hw: correct the ARM cache maintainance operations 2020-03-26 11:38:55 +01:00
ports Update Muen port 2019-05-27 14:46:53 +02:00
recipes depot: update recipe hashes 2020-02-28 08:59:43 +01:00
run base-hw: fix run scripts 2020-02-20 12:11:21 +01:00
src hw: correct the ARM cache maintainance operations 2020-03-26 11:38:55 +01:00