Martin Stein 01643ccd94 cpu_quota hw exynos5: raise error tolerance
From our observations we can tell that the error should not exceed 4%.
However, there is no reasonable explanation by now why the test results
are less stable on these platforms. We have tried several things that
did not lead to an explanation or improvement:

  * changing the timing parameters of the scheduler
  * switching off SMP
  * double-checking the speed of userland and kernel timers

Ref #1805
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