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2aa01e309c
* clock frequency * topology * exec lists * IRQ handling * improved resource management issue #4664
109 lines
2.6 KiB
C++
109 lines
2.6 KiB
C++
/*
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* \brief Gpu session interface.
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* \author Josef Soentgen
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* \date 2021-09-23
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*/
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/*
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* Copyright (C) 2021 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__GPU_INFO_INTEL_H_
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#define _INCLUDE__GPU_INFO_INTEL_H_
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#include <gpu_session/gpu_session.h>
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namespace Gpu {
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struct Info_intel;
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}
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/*
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* Gpu information
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*
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* Used to query information in the DRM backend
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*/
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struct Gpu::Info_intel
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{
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using Chip_id = Genode::uint16_t;
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using Features = Genode::uint32_t;
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using size_t = Genode::size_t;
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using Context_id = Genode::uint32_t;
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using uint8_t = Genode::uint8_t;
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Chip_id chip_id;
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Features features;
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size_t aperture_size;
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Context_id ctx_id;
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Sequence_number last_completed;
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struct Revision { Genode::uint8_t value; } revision;
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struct Slice_mask { unsigned value; } slice_mask;
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struct Subslice_mask { unsigned value; } subslice_mask;
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struct Eu_total { unsigned value; } eus;
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struct Subslices { unsigned value; } subslices;
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struct Clock_frequency { unsigned value; } clock_frequency;
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struct Topology
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{
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enum {
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MAX_SLICES = 3,
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MAX_SUBSLICES = 32,
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MAX_EUS = 16,
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};
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uint8_t slice_mask { 0 };
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uint8_t subslice_mask[MAX_SLICES * (MAX_SUBSLICES / 8)] { };
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uint8_t eu_mask[MAX_SLICES * MAX_SUBSLICES * (MAX_EUS / 8)] { };
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uint8_t max_slices { 0 };
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uint8_t max_subslices { 0 };
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uint8_t max_eus_per_subslice { 0 };
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uint8_t ss_stride { 0 };
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uint8_t eu_stride { 0 };
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bool valid { false };
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bool has_subslice(unsigned slice, unsigned subslice)
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{
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unsigned ss_idx = subslice / 8;
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uint8_t mask = subslice_mask[slice * ss_stride + ss_idx];
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return mask & (1u << (subslice % 8));
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}
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unsigned eu_idx(unsigned slice, unsigned subslice)
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{
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unsigned slice_stride = max_slices * eu_stride;
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return slice * slice_stride + subslice * eu_stride;
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}
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};
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struct Topology topology { };
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Info_intel(Chip_id chip_id, Features features, size_t aperture_size,
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Context_id ctx_id, Sequence_number last,
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Revision rev, Slice_mask s_mask, Subslice_mask ss_mask,
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Eu_total eu, Subslices subslice, Clock_frequency clock_frequency,
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Topology topology)
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:
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chip_id(chip_id), features(features),
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aperture_size(aperture_size), ctx_id(ctx_id),
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last_completed(last),
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revision(rev),
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slice_mask(s_mask),
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subslice_mask(ss_mask),
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eus(eu),
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subslices(subslice),
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clock_frequency(clock_frequency),
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topology(topology)
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{ }
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};
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#endif /* _INCLUDE__GPU_INFO_INTEL_H_ */
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