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1336b0a751
The classes Genode::Mmio, Genode::Register_set, Genode::Attached_mmio, and Platform::Device::Mmio now receive a template parameter 'size_t SIZE'. In each type that derives from one of these classes, it is now statically checked that the range of each Genode::Register::Register- and Genode::Register_set::Register_array-deriving sub-type is within [0..SIZE). That said, SIZE is the minimum size of the memory region provided to the above mentioned Mmio classes in order to avoid page faults or memory corruption when accessing the registers and register arrays declared inside. Note, that the range end of a register array is not the end of the last item but the end of integer access that is used for accessing the last bit in the last item. The constructors of Genode::Mmio, Genode::Attached_mmio, and Platform::Device::Mmio now receive an argument 'Byte_range_ptr range' that is expected to be the range of the backing memory region. In each type that derives from on of these classes, it is now dynamically checked that 'range.num_bytes >= SIZE', thereby implementing the above mention protection against page faults and memory corruption. The rest of the commit adapts the code throughout the Genode Labs repositories regarding the changes. Note that for that code inside Core, the commits mostly uses a simplified approach by constructing MMIO objects with range [base..base+SIZE) and not with a mapping- or specification-related range size. This should be fixed in the future. Furthermore, there are types that derive from an MMIO class but don't declare any registers or register arrays (especially with Platform::Device::Mmio). In this case SIZE is set to 0. This way, the parameters must be actively corrected by someone who later wants to add registers or register arrays, plus the places can be easily found by grep'ing for Mmio<0>. Fix #4081
769 lines
24 KiB
C++
769 lines
24 KiB
C++
/*
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* \brief Set of fine-grained and typesafe accessible registers with offsets
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* \author Martin stein
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* \date 2011-10-26
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*/
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/*
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* Copyright (C) 2011-2017 Genode Labs GmbH
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*
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* This file is part of the Genode OS framework, which is distributed
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* under the terms of the GNU Affero General Public License version 3.
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*/
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#ifndef _INCLUDE__UTIL__REGISTER_SET_H_
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#define _INCLUDE__UTIL__REGISTER_SET_H_
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/* Genode includes */
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#include <util/register.h>
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#include <util/noncopyable.h>
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#include <util/interface.h>
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#include <base/exception.h>
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namespace Genode {
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struct Register_set_plain_access;
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struct Register_set_base;
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template <typename, size_t> class Register_set;
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}
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/**
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* Interface declaration for implementations of plain access to a register set
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*
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* This class enables us to use the bit and offset logic of the Register_set
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* template with different plain access implementations and, at the same time,
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* keep the plain access implementation invisible at the front-end. The class
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* circumvents the fact that we can't have virtual method templates nor
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* template friends. The plain access implementation should keep its methods
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* private and declare this class as friend. It is then handed over as
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* argument to the Register_set template.
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*/
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struct Genode::Register_set_plain_access
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{
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/**
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* Write on plain integer level to a register of the set
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*
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* \param ACCESS_T plain integer type of the register to access
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* \param IMPLEMENTATION implementation of access on the plain integer level
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* \param impl instance of the access implementation
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* \param offset register offset
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* \param value value to be written to the register
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*/
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template <typename ACCESS_T, typename IMPLEMENTATION>
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static inline
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void write(IMPLEMENTATION &impl, off_t const offset, ACCESS_T const value) {
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impl.template _write<ACCESS_T>(offset, value); }
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/**
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* Read on plain integer level from a register of the set
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*
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* \param ACCESS_T plain integer type of the register to access
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* \param IMPLEMENTATION implementation of access on the plain integer level
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* \param impl instance of the access implementation
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* \param offset register offset
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*/
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template <typename ACCESS_T, typename IMPLEMENTATION>
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static inline ACCESS_T read(IMPLEMENTATION &impl, off_t const offset) {
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return impl.template _read<ACCESS_T>(offset); }
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};
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struct Genode::Register_set_base : Noncopyable
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{
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/**
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* Interface for delaying the execution of a calling thread
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*/
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struct Delayer : Interface
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{
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/**
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* Delay execution of the caller for 'us' microseconds
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*/
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virtual void usleep(uint64_t us) = 0;
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};
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};
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/**
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* Set of fine-grained and typesafe accessible registers with offsets
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*
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* \param PLAIN_ACCESS Implementation of access on the plain integer level.
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* Should derive from the Register_set_plain_access
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* interface.
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*
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* A register set consists of individual registers and register arrays with
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* different offsets. The class receives the specific implementation of plain
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* access as argument. This way, it can be used with different types of IO
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* (MMIO, I2C, Port IO, ...) . For correct behavior of the 'Register_set'
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* methods, a class that derives from one of the subclasses of 'Register_set'
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* must not define members named 'Register_base', 'Bitfield_base',
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* 'Register_array_base' or 'Array_bitfield_base'.
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*/
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template <typename PLAIN_ACCESS, Genode::size_t REGISTER_SET_SIZE>
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class Genode::Register_set : public Register_set_base
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{
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private:
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using Plain_access = Register_set_plain_access;
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enum { BYTE_WIDTH_LOG2 = 3, BYTE_WIDTH = 1 << BYTE_WIDTH_LOG2 };
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/**
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* Return wether one IO condition is met
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*
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* \param CONDITION A condition subtype of Register, Bitfield, or
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* such (for example the Bitfield::Equal type)
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* \param condition the condition instance
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*/
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template <typename CONDITION>
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inline bool _conditions_met(CONDITION condition) {
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return condition.met(read<typename CONDITION::Object>()); }
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template <typename CONDITION>
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inline bool _one_condition_met(CONDITION condition) {
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return condition.met(read<typename CONDITION::Object>()); }
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/**
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* Return wether a list of IO conditions is met
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*
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* \param CONDITION The type of the head of the condition list.
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* A condition subtype of Register, Bitfield, or
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* such (for example the Bitfield::Equal type).
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* \param CONDITIONS The types of the tail of the condition list.
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* condition subtypes of Register, Bitfield, or
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* such (for example the Bitfield::Equal type)
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* \param head the condition instance
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*/
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template <typename CONDITION, typename... CONDITIONS>
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inline bool _conditions_met(CONDITION head, CONDITIONS... tail) {
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return _conditions_met(head) ? _conditions_met(tail...) : false; }
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/**
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* Same as '_conditions_met' but returns true if one condition in a list of
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* IO conditions is met
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*/
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template <typename CONDITION, typename... CONDITIONS>
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inline bool _one_condition_met(CONDITION head, CONDITIONS... tail) {
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return _conditions_met(head) ? true : _one_condition_met(tail...); }
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/**
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* This template equips registers/bitfields with conditions for polling
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*
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* \param T register/bitfield type that the conditions shall be about
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*
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* The condition subtypes enable us to poll for a variable amount of
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* conditions for different registers/bitfields at once. They are used
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* as input to the 'wait_for' template.
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*/
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template <typename T>
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struct Conditions
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{
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/**
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* Condition that the register/bitfield equals a value
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*/
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class Equal
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{
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private:
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typedef typename T::access_t access_t;
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access_t const _reference_val;
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public:
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typedef T Object;
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/**
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* Constructor
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*
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* \param reference_val reference value
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*/
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explicit Equal(access_t const reference_val)
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: _reference_val(reference_val) { }
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/**
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* Return whether the condition is met
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*
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* \param actual_val actual regster/bitfield value
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*/
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bool met(access_t const actual_val) const {
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return _reference_val == actual_val; }
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};
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};
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PLAIN_ACCESS &_plain_access;
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public:
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/**
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* An integer like region at a specific place within a register set
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*
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* \param _OFFSET Offset of the region in the register set
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* \param _ACCESS_WIDTH Bit width of the region, for a list of
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* supported widths see 'Genode::Register'.
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* \param _STRICT_WRITE If set to 0, when writing a bitfield, we
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* read the register value, update the bits
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* on it, and write it back to the register.
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* If set to 1 we take an empty register
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* value instead, apply the bitfield on it,
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* and write it to the register. This can
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* be useful if you have registers that have
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* different means on reads and writes.
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*
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* For further details See 'Genode::Register'.
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*/
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template <off_t _OFFSET, unsigned long _ACCESS_WIDTH,
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bool _STRICT_WRITE = false>
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struct Register
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:
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public Genode::Register<_ACCESS_WIDTH>,
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public Conditions<Register<_OFFSET, _ACCESS_WIDTH, _STRICT_WRITE> >
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{
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enum {
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OFFSET = _OFFSET,
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ACCESS_WIDTH = _ACCESS_WIDTH,
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STRICT_WRITE = _STRICT_WRITE,
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};
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/*
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* GCC 4.4, in contrast to GCC versions >= 4.5, can't
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* select function templates like 'write(typename
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* T::Register::access_t value)' through a given 'T'
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* that, in this case, derives from 'Register<X, Y, Z>'.
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* It seems this is due to the fact that 'T::Register'
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* is a template. Thus we provide some kind of stamp
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* that solely must not be redefined by the deriving
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* class to ensure correct template selection.
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*/
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typedef Register<_OFFSET, _ACCESS_WIDTH, _STRICT_WRITE>
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Register_base;
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typedef typename Genode::Register<_ACCESS_WIDTH>::access_t
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access_t;
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static_assert(OFFSET + sizeof(access_t) <= REGISTER_SET_SIZE);
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/**
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* A region within a register
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*
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* \param _SHIFT Bit shift of the first bit within the
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* compound register.
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* \param _WIDTH bit width of the region
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*
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* For details see 'Genode::Register::Bitfield'.
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*/
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template <unsigned long _SHIFT, unsigned long _WIDTH>
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struct Bitfield
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:
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public Genode::Register<ACCESS_WIDTH>::
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template Bitfield<_SHIFT, _WIDTH>,
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public Conditions<Bitfield<_SHIFT, _WIDTH> >
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{
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/* analogous to 'Register_set::Register::Register_base' */
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typedef Bitfield<_SHIFT, _WIDTH> Bitfield_base;
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/* back reference to containing register */
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typedef Register<_OFFSET, _ACCESS_WIDTH, _STRICT_WRITE>
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Compound_reg;
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typedef Compound_reg::access_t access_t;
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};
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};
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/**
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* An array of successive equally structured regions, called items
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*
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* \param _OFFSET Offset of the first item in the register set
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* \param _ACCESS_WIDTH Bit width of a single access, must be at
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* least the item width.
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* \param _ITEMS How many times the item gets iterated
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* successively.
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* \param _ITEM_WIDTH bit width of an item
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* \param _STRICT_WRITE If set to 0, when writing a bitfield, we
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* read the register value, update the bits
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* on it, and write it back to the register.
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* If set to 1, we take an empty register
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* value instead, apply the bitfield on it,
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* and write it to the register. This can
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* be useful if you have registers that have
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* different means on reads and writes.
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* Please note that ACCESS_WIDTH is decisive
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* for the range of such strictness.
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*
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* The array takes all inner structures, wich are covered by an
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* item width and iterates them successively. Such structures that
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* are partially exceed an item range are read and written also
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* partially. Structures that are completely out of the item range
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* are read as '0' and trying to overwrite them has no effect. The
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* array is not limited to its access width, it extends to the
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* memory region of its successive items. Trying to read out read
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* with an item index out of the array range returns '0', trying
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* to write to such indices has no effect.
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*/
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template <off_t _OFFSET, unsigned long _ACCESS_WIDTH,
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unsigned long _ITEMS, unsigned long _ITEM_WIDTH,
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bool _STRICT_WRITE = false>
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struct Register_array : public Register<_OFFSET, _ACCESS_WIDTH,
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_STRICT_WRITE>
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{
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typedef typename Trait::Uint_width<_ACCESS_WIDTH>::
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template Divisor<_ITEM_WIDTH> Item;
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enum {
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STRICT_WRITE = _STRICT_WRITE,
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OFFSET = _OFFSET,
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ACCESS_WIDTH = _ACCESS_WIDTH,
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ITEMS = _ITEMS,
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ITEM_WIDTH = _ITEM_WIDTH,
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ITEM_WIDTH_LOG2 = Item::WIDTH_LOG2,
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MAX_INDEX = ITEMS - 1,
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/* prevent shifting more than bit width by setting all bits explicitly */
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ITEM_MASK = (ITEM_WIDTH == 64) ? ~0ULL : (1ULL << ITEM_WIDTH) - 1,
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};
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/* analogous to 'Register_set::Register::Register_base' */
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typedef Register_array<OFFSET, ACCESS_WIDTH, ITEMS,
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ITEM_WIDTH, STRICT_WRITE>
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Register_array_base;
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typedef typename Register<OFFSET, ACCESS_WIDTH, STRICT_WRITE>::
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access_t access_t;
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/**
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* A bit region within a register array item
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*
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* \param _SHIFT bit shift of the first bit within an item
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* \param _WIDTH bit width of the region
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*
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* For details see 'Genode::Register::Bitfield'.
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*/
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template <unsigned long _SHIFT, unsigned long _SIZE>
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struct Bitfield :
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public Register<OFFSET, ACCESS_WIDTH, STRICT_WRITE>::
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template Bitfield<_SHIFT, _SIZE>
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{
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/* analogous to 'Register_set::Register::Register_base' */
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typedef Bitfield<_SHIFT, _SIZE> Array_bitfield_base;
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/* back reference to containing register array */
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typedef Register_array<OFFSET, ACCESS_WIDTH, ITEMS,
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ITEM_WIDTH, STRICT_WRITE>
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Compound_array;
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};
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struct Dst { off_t offset; uint8_t shift; };
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/**
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* Calculate destination of an array-item access
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*
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* \param index index of the targeted array item
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*/
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static constexpr Dst dst(unsigned long index)
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{
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off_t bit_offset = off_t(index << ITEM_WIDTH_LOG2);
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off_t byte_offset = bit_offset >> BYTE_WIDTH_LOG2;
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off_t offset = byte_offset & ~(sizeof(access_t) - 1);
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uint8_t shift = uint8_t(bit_offset - (offset << BYTE_WIDTH_LOG2));
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offset += OFFSET;
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return { .offset = offset, .shift = shift };
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}
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static_assert(dst(MAX_INDEX).offset + sizeof(access_t) <= REGISTER_SET_SIZE);
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/**
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* Calc destination of a simple array-item access without shift
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*
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* \param offset gets overridden with the offset of the the
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* access destination
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* \param index index of the targeted array item
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*/
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static inline void simple_dst(off_t & offset,
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unsigned long const index)
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{
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offset = (index << ITEM_WIDTH_LOG2) >> BYTE_WIDTH_LOG2;
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offset += OFFSET;
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}
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};
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/**
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* Constructor
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*
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* \param plain_access implementation of plain register access
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*/
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Register_set(PLAIN_ACCESS &plain_access)
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: _plain_access(plain_access) { }
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/*************************
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** Access to registers **
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*************************/
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/**
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* Read the register 'T'
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*/
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template <typename T>
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inline typename T::Register_base::access_t read() const
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{
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typedef typename T::Register_base Register;
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typedef typename Register::access_t access_t;
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return Plain_access::read<access_t>(_plain_access,
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Register::OFFSET);
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}
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/**
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* Override the register 'T'
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*/
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template <typename T>
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inline void
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write(typename T::Register_base::access_t const value)
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{
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typedef typename T::Register_base Register;
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typedef typename Register::access_t access_t;
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Plain_access::write<access_t>(_plain_access, Register::OFFSET,
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value);
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}
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/******************************************
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** Access to bitfields within registers **
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******************************************/
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/**
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* Read the bitfield 'T' of a register
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*/
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template <typename T>
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inline typename T::Bitfield_base::bitfield_t
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read() const
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{
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typedef typename T::Bitfield_base Bitfield;
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typedef typename Bitfield::Compound_reg Register;
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typedef typename Register::access_t access_t;
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return
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Bitfield::get(Plain_access::read<access_t>(_plain_access,
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Register::OFFSET));
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}
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/**
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* Override to the bitfield 'T' of a register
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*
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* \param value value that shall be written
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*/
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template <typename T>
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inline void
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write(typename T::Bitfield_base::Compound_reg::access_t const value)
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{
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typedef typename T::Bitfield_base Bitfield;
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typedef typename Bitfield::Compound_reg Register;
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typedef typename Register::access_t access_t;
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/* initialize the pattern written finally to the register */
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access_t write_value;
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if (Register::STRICT_WRITE)
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{
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/* apply the bitfield to an empty write pattern */
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write_value = 0;
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} else {
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/* apply the bitfield to the old register value */
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write_value = read<Register>();
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Bitfield::clear(write_value);
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}
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/* apply bitfield value and override register */
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Bitfield::set(write_value, value);
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write<Register>(write_value);
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}
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/*******************************
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** Access to register arrays **
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*******************************/
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/**
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* Read an item of the register array 'T'
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*
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* \param index index of the targeted item
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*/
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template <typename T>
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inline typename T::Register_array_base::access_t
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read(unsigned long const index) const
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{
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typedef typename T::Register_array_base Array;
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typedef typename Array::access_t access_t;
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/* reads outside the array return 0 */
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if (index > Array::MAX_INDEX) return 0;
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/* if item width equals access width we optimize the access */
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off_t offset;
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if (Array::ITEM_WIDTH == Array::ACCESS_WIDTH) {
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Array::simple_dst(offset, index);
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return Plain_access::read<access_t>(_plain_access, offset);
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/* access width and item width differ */
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} else {
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typename Array::Dst dst { Array::dst(index) };
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return (Plain_access::read<access_t>(_plain_access, dst.offset)
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>> dst.shift) & Array::ITEM_MASK;
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}
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}
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/**
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* Override an item of the register array 'T'
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*
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* \param value value that shall be written
|
|
* \param index index of the targeted item
|
|
*/
|
|
template <typename T>
|
|
inline void
|
|
write(typename T::Register_array_base::access_t const value,
|
|
unsigned long const index)
|
|
{
|
|
typedef typename T::Register_array_base Array;
|
|
typedef typename Array::access_t access_t;
|
|
|
|
/* ignore writes outside the array */
|
|
if (index > Array::MAX_INDEX) return;
|
|
|
|
/* optimize the access if item width equals access width */
|
|
off_t offset;
|
|
if (Array::ITEM_WIDTH == Array::ACCESS_WIDTH) {
|
|
Array::simple_dst(offset, index);
|
|
Plain_access::write<access_t>(_plain_access, offset, value);
|
|
|
|
/* access width and item width differ */
|
|
} else {
|
|
typename Array::Dst dst { Array::dst(index) };
|
|
|
|
/* insert new value into old register value */
|
|
access_t write_value;
|
|
if (Array::STRICT_WRITE)
|
|
{
|
|
/* apply bitfield to an empty write pattern */
|
|
write_value = 0;
|
|
} else {
|
|
|
|
/* apply bitfield to the old register value */
|
|
write_value = Plain_access::read<access_t>(_plain_access,
|
|
dst.offset);
|
|
write_value &= ~(Array::ITEM_MASK << dst.shift);
|
|
}
|
|
/* apply bitfield value and override register */
|
|
write_value |= (value & Array::ITEM_MASK) << dst.shift;
|
|
Plain_access::write<access_t>(_plain_access, dst.offset,
|
|
write_value);
|
|
}
|
|
}
|
|
|
|
|
|
/*****************************************************
|
|
** Access to bitfields within register array items **
|
|
*****************************************************/
|
|
|
|
/**
|
|
* Read the bitfield 'T' of a register array
|
|
*
|
|
* \param index index of the targeted item
|
|
*/
|
|
template <typename T>
|
|
inline typename T::Array_bitfield_base::bitfield_t
|
|
read(unsigned long const index) const
|
|
{
|
|
typedef typename T::Array_bitfield_base Bitfield;
|
|
typedef typename Bitfield::Compound_array Array;
|
|
return Bitfield::get(read<Array>(index));
|
|
}
|
|
|
|
/**
|
|
* Override the bitfield 'T' of a register array
|
|
*
|
|
* \param value value that shall be written
|
|
* \param index index of the targeted array item
|
|
*/
|
|
template <typename T>
|
|
inline void
|
|
write(typename T::Array_bitfield_base::Compound_array::access_t const value,
|
|
long unsigned const index)
|
|
{
|
|
typedef typename T::Array_bitfield_base Bitfield;
|
|
typedef typename Bitfield::Compound_array Array;
|
|
typedef typename Array::access_t access_t;
|
|
|
|
/* initialize the pattern written finally to the register */
|
|
access_t write_value;
|
|
if (Array::STRICT_WRITE)
|
|
{
|
|
/* apply the bitfield to an empty write pattern */
|
|
write_value = 0;
|
|
} else {
|
|
|
|
/* apply the bitfield to the old register value */
|
|
write_value = read<Array>(index);
|
|
Bitfield::clear(write_value);
|
|
}
|
|
/* apply bitfield value and override register */
|
|
Bitfield::set(write_value, value);
|
|
write<Array>(write_value, index);
|
|
}
|
|
|
|
|
|
/***********************
|
|
** Access to bitsets **
|
|
***********************/
|
|
|
|
/**
|
|
* Read bitset 'T' (composed of 2 parts)
|
|
*/
|
|
template <typename T>
|
|
inline typename T::Bitset_2_base::access_t const read()
|
|
{
|
|
typedef typename T::Bitset_2_base::Bits_0 Bits_0;
|
|
typedef typename T::Bitset_2_base::Bits_1 Bits_1;
|
|
typedef typename T::Bitset_2_base::access_t access_t;
|
|
enum { V1_SHIFT = Bits_0::BITFIELD_WIDTH };
|
|
access_t const v0 = read<Bits_0>();
|
|
access_t const v1 = read<Bits_1>();
|
|
return v0 | (v1 << V1_SHIFT);
|
|
}
|
|
|
|
/**
|
|
* Override bitset 'T' (composed of 2 parts)
|
|
*
|
|
* \param v value that shall be written
|
|
*/
|
|
template <typename T>
|
|
inline void write(typename T::Bitset_2_base::access_t v)
|
|
{
|
|
typedef typename T::Bitset_2_base::Bits_0 Bits_0;
|
|
typedef typename T::Bitset_2_base::Bits_1 Bits_1;
|
|
write<Bits_0>(v);
|
|
write<Bits_1>(v >> Bits_0::BITFIELD_WIDTH);
|
|
}
|
|
|
|
/**
|
|
* Read bitset 'T' (composed of 3 parts)
|
|
*/
|
|
template <typename T>
|
|
inline typename T::Bitset_3_base::access_t const read()
|
|
{
|
|
typedef typename T::Bitset_3_base::Bits_0 Bits_0;
|
|
typedef typename T::Bitset_3_base::Bits_1 Bits_1;
|
|
typedef typename T::Bitset_3_base::Bits_2 Bits_2;
|
|
typedef typename T::Bitset_3_base::access_t access_t;
|
|
|
|
static constexpr size_t BITS_0_WIDTH = Bits_0::BITFIELD_WIDTH;
|
|
static constexpr size_t BITS_1_WIDTH = Bits_1::BITFIELD_WIDTH;
|
|
static constexpr size_t V1_SHIFT = BITS_0_WIDTH + BITS_1_WIDTH;
|
|
|
|
access_t const v0 = read<Bitset_2<Bits_0, Bits_1> >();
|
|
access_t const v1 = read<Bits_2>();
|
|
return v0 | (v1 << V1_SHIFT);
|
|
}
|
|
|
|
/**
|
|
* Override bitset 'T' (composed of 3 parts)
|
|
*
|
|
* \param v value that shall be written
|
|
*/
|
|
template <typename T>
|
|
inline void write(typename T::Bitset_3_base::access_t v)
|
|
{
|
|
typedef typename T::Bitset_3_base::Bits_0 Bits_0;
|
|
typedef typename T::Bitset_3_base::Bits_1 Bits_1;
|
|
typedef typename T::Bitset_3_base::Bits_2 Bits_2;
|
|
write<Bitset_2<Bits_0, Bits_1> >(v);
|
|
write<Bits_2>(v >> (Bits_0::BITFIELD_WIDTH +
|
|
Bits_1::BITFIELD_WIDTH));
|
|
}
|
|
|
|
|
|
/*********************************
|
|
** Polling for bitfield states **
|
|
*********************************/
|
|
|
|
struct Polling_timeout : Exception { };
|
|
|
|
struct Attempts
|
|
{
|
|
unsigned value;
|
|
explicit Attempts(unsigned value) : value(value) { }
|
|
};
|
|
|
|
struct Microseconds
|
|
{
|
|
uint64_t value;
|
|
explicit Microseconds(uint64_t value) : value(value) { }
|
|
};
|
|
|
|
|
|
/**
|
|
* Wait until a list of IO conditions is met
|
|
*
|
|
* \param CONDITIONS Types of the of conditions in the condition
|
|
* list. Condition subtypes of the IO types. For
|
|
* example the Bitfield::Equal type.
|
|
* \param attempts maximum number of probing attempts
|
|
* \param us number of microseconds between attempts
|
|
* \param delayer Sleeping facility to be used when the
|
|
* conditions are not met
|
|
* \param conditions condition list
|
|
*
|
|
* \throw Polling_timeout
|
|
*/
|
|
template <typename... CONDITIONS>
|
|
inline void wait_for(Attempts attempts,
|
|
Microseconds us,
|
|
Delayer &delayer,
|
|
CONDITIONS... conditions)
|
|
{
|
|
for (unsigned i = 0; i < attempts.value; i++,
|
|
delayer.usleep(us.value))
|
|
{
|
|
if (_conditions_met(conditions...)) {
|
|
return; }
|
|
}
|
|
throw Polling_timeout();
|
|
}
|
|
|
|
/**
|
|
* Shortcut for 'wait_for' with 'attempts = 500' and 'us = 1000'
|
|
*/
|
|
template <typename... CONDITIONS>
|
|
inline void wait_for(Delayer &delayer, CONDITIONS... conditions)
|
|
{
|
|
wait_for<CONDITIONS...>(Attempts(500), Microseconds(1000),
|
|
delayer, conditions...);
|
|
}
|
|
|
|
/**
|
|
* Same as 'wait_for' but wait until one condition in a list of IO
|
|
* conditions is met
|
|
*/
|
|
template <typename... CONDITIONS>
|
|
inline void wait_for_any(Attempts attempts,
|
|
Microseconds us,
|
|
Delayer &delayer,
|
|
CONDITIONS... conditions)
|
|
{
|
|
for (unsigned i = 0; i < attempts.value; i++,
|
|
delayer.usleep(us.value))
|
|
{
|
|
if (_one_condition_met(conditions...)) {
|
|
return; }
|
|
}
|
|
throw Polling_timeout();
|
|
}
|
|
|
|
/**
|
|
* Shortcut for 'wait_for' with 'attempts = 500' and 'us = 1000'
|
|
*/
|
|
template <typename... CONDITIONS>
|
|
inline void wait_for_any(Delayer &delayer, CONDITIONS... conditions)
|
|
{
|
|
wait_for_any<CONDITIONS...>(Attempts(500), Microseconds(1000),
|
|
delayer, conditions...);
|
|
}
|
|
};
|
|
|
|
#endif /* _INCLUDE__UTIL__REGISTER_SET_H_ */
|