Johannes Schlatow 0104a74028 memcpy (arm): cache align and use pld for speedup
Preloading a few cache lines ahead brings a significant speedup in
memcpy throughput. Note, the particular (optimal) value was empirically
determined on a Cortex-A9 (Zynq-7000) SoC @ 666Mhz. It is best combined
with L2 prefetching enabled (including double linefills and prefetch
offset 7). Yet, even without L2 prefetching this seems to be the sweet
spot.

genodelabs/genode#4456
2022-04-13 08:08:01 +02:00
..
2017-05-31 13:16:07 +02:00
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