Commit Graph

17 Commits

Author SHA1 Message Date
Alexander Boettcher
3e90542559 nova: use signals with irqs in core
Avoids the need to have per IRQ a thread that blocks synchronously for next
interrupt. Now a thread may wait for multiple IRQs as other signals
simultaneously.

In core no threads are required anymore for IRQs/MSI - the clients (either
the pci_drv or in case of MSI the driver) gets the IRQ delivered directly as
a ordinary Genode signal.

Useful since #1216 and #1487 is now available.
Commit applies feature of #1446 also to IRQ/MSIs.
2015-05-26 09:39:51 +02:00
Martin Stein
c9272937e7 CPU session: apply quota via relative weightings
Physical CPU quota was previously given to a thread on construction only
by directly specifying a percentage of the quota of the according CPU
session. Now, a new thread is given a weighting that can be any value.
The physical counter-value of such a weighting depends on the weightings
of the other threads at the CPU session. Thus, the physical quota of all
threads of a CPU session must be updated when a weighting is added or
removed. This is each time the session creates or destroys a thread.

This commit also adapts the "cpu_quota" test in base-hw accordingly.

Ref #1464
2015-05-06 10:55:16 +02:00
Stefan Kalkowski
b949489641 base: remove local capability from generic base
* Instead of using local capabilities within core's context area implementation
  for stack allocation/attachment, simply do both operations while stack gets
  attached, thereby getting rid of the local capabilities in generic code
* In base-hw the UTCB of core's main thread gets mapped directly instead of
  constructing a dataspace component out of it and hand over its local
  capability
* Remove local capability implementation from all platforms except Linux

Ref #1443
2015-04-17 16:13:20 +02:00
Alexander Boettcher
b50d707d5b nova: leverage kernel to implement Genode signals
Fixes #1446
2015-03-27 11:53:11 +01:00
Alexander Boettcher
f5329c23b7 nova: update to kernel branch introducing signals
+ adjust syscall headers accordingly

Issue #1446
2015-03-27 11:53:11 +01:00
Alexander Boettcher
2a4b67f90b nova: fix syscall bindings for 32bit
The bindings for 32bit did not consider that in the syscall_3 function
edx changes due to the assembly instructions and that in the syscall_4
function edx and ecx change. So, the compiler wrongly assumed that the
content of these registers stayed unchanged.

Fixes #1447
2015-03-19 09:13:32 +01:00
Alexander Boettcher
d86380d744 nova: provide assessors in utcb for efer register
Issue #1413
2015-02-27 11:48:05 +01:00
Alexander Boettcher
a31378476d nova: use in core one pager per CPU
Fixes #1394
2015-02-27 11:40:58 +01:00
Alexander Boettcher
1d920fa1b5 nova: fix usage of portal permission
The commit
- fixes the syscall bindings for using portal permissions
- revokes PT_CTRL permission after pager in core set local badge name
- revokes PT_CTRL permission after server entrypoint code set local badge name

Fixes #1335
2015-01-06 12:39:11 +01:00
Alexander Boettcher
51489e2f82 vmm: fix overmap attempts by seoul and vbox
If the debug branch of the nova kernel is used, following messages are printed
by the kernel during vCPU setup phase:

[0] overmap attempt OBJ - tree - ...

Fixes #1324
2014-12-19 13:58:46 +01:00
Martin Stein
8f9355b360 thread API & CPU session: accounting of CPU quota
In the init configuration one can configure the donation of CPU time via
'resource' tags that have the attribute 'name' set to "CPU" and the
attribute 'quantum' set to the percentage of CPU quota that init shall
donate. The pattern is the same as when donating RAM quota.

! <start name="test">
!   <resource name="CPU" quantum="75"/>
! </start>

This would cause init to try donating 75% of its CPU quota to the child
"test".  Init and core do not preserve CPU quota for their own
requirements by default as it is done with RAM quota.

The CPU quota that a process owns can be applied through the thread
constructor. The constructor has been enhanced by an argument that
indicates the percentage of the programs CPU quota that shall be granted
to the new thread. So 'Thread(33, "test")' would cause the backing CPU
session to try to grant 33% of the programs CPU quota to the thread
"test". By now, the CPU quota of a thread can't be altered after
construction. Constructing a thread with CPU quota 0 doesn't mean the
thread gets never scheduled but that the thread has no guaranty to receive
CPU time. Such threads have to live with excess CPU time.

Threads that already existed in the official repositories of Genode were
adapted in the way that they receive a quota of 0.

This commit also provides a run test 'cpu_quota' in base-hw (the only
kernel that applies the CPU-quota scheme currently). The test basically
runs three threads with different physical CPU quota. The threads simply
count for 30 seconds each and the test then checks wether the counter
values relate to the CPU-quota distribution.

fix #1275
2014-11-28 12:02:37 +01:00
Alexander Boettcher
53d471aa22 nova: handle race during signal setup phase
Fixes #1266
2014-10-10 13:02:32 +02:00
Christian Prochaska
a46de84f89 Fix race condition in page fault notification
When a page fault cannot be resolved, the GDB monitor can get a hint about
which thread faulted by evaluating the thread state object returned by
'Cpu_session::state()'. Unfortunately, with the current implementation,
the signal which informs GDB monitor about the page fault is sent before
the thread state object of the faulted thread has been updated, so it
can happen that the faulted thread cannot be determined immediately
after receiving the signal.

With this commit, the thread state gets updated before the signal is sent.

At least on base-nova it can also happen that the thread state is not
accessible yet after receiving the page fault notification. For this
reason, GDB monitor needs to retry its query until the state is
accessible.

Fixes #1206.
2014-07-24 10:18:07 +02:00
Alexander Boettcher
e70c13ce1f nova: update to r6 nova kernel branch
- adds general support for semaphore timeouts
- fixes PCID feature (aka tagged TLB) seeen on Lenovo X201

Fixes #1211
2014-07-24 10:18:06 +02:00
Stefan Kalkowski
786fe805da base: introduce caching attributes (fix #1184)
On ARM it's relevant to not only distinguish between ordinary cached memory
and write-combined one, but also having non-cached memory too. To insert the
appropriated page table entries e.g.: in the base-hw kernel, we need to preserve
the information about the kind of memory from allocation until the pager
resolves a page fault. Therefore, this commit introduces a new Cache_attribute
type, and replaces the write_combined boolean with the new type where necessary.
2014-06-26 10:57:26 +02:00
Norman Feske
9f43aa4363 base-nova: fully qualify Utcb type 2014-05-27 11:14:41 +02:00
Norman Feske
ca971bbfd8 Move repositories to 'repos/' subdirectory
This patch changes the top-level directory layout as a preparatory
step for improving the tools for managing 3rd-party source codes.
The rationale is described in the issue referenced below.

Issue #1082
2014-05-14 16:08:00 +02:00