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mmio: make base address member private

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Ref #2196
This commit is contained in:
Martin Stein 2017-03-06 13:56:33 +01:00 committed by Christian Helmuth
parent c5cb6cb410
commit e744c76bf2
7 changed files with 18 additions and 24 deletions
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2
repos/base-hw/src/bootstrap/spec/x86_64/platform.cc
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@ -37,7 +37,7 @@ Platform::Board::Board()
for (unsigned i = 0; true; i++) { for (unsigned i = 0; true; i++) {
Mmap v(Multiboot_info(__initial_bx).phys_ram_mmap_base(i)); Mmap v(Multiboot_info(__initial_bx).phys_ram_mmap_base(i));
if (!v.base) break; if (!v.base()) break;
Mmap::Addr::access_t base = v.read<Mmap::Addr>(); Mmap::Addr::access_t base = v.read<Mmap::Addr>();
Mmap::Length::access_t size = v.read<Mmap::Length>(); Mmap::Length::access_t size = v.read<Mmap::Length>();

2
repos/base-hw/src/core/include/spec/panda/board.h
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@ -114,7 +114,7 @@ class Genode::Board : public Cortex_a9::Board
private: private:
L2_cache _l2_cache { Base::l2_cache().base }; L2_cache _l2_cache { Base::l2_cache().base() };
}; };
#endif /* _CORE__INCLUDE__SPEC__PANDA__BOARD_H_ */ #endif /* _CORE__INCLUDE__SPEC__PANDA__BOARD_H_ */

2
repos/base-hw/src/core/include/spec/x86_64/multiboot.h
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@ -62,7 +62,7 @@ class Genode::Multiboot_info : Mmio
enum { MMAP_SIZE_SIZE_OF = 4, MMAP_SIZE_OF = 4 + 8 + 1 }; enum { MMAP_SIZE_SIZE_OF = 4, MMAP_SIZE_OF = 4 + 8 + 1 };
if (solely_within_4k_base && if (solely_within_4k_base &&
(mmap + MMAP_SIZE_OF >= Genode::align_addr(base + 1, 12))) (mmap + MMAP_SIZE_OF >= Genode::align_addr(base() + 1, 12)))
return 0; return 0;
Mmap r(mmap); Mmap r(mmap);

18
repos/base/include/util/mmio.h
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@ -30,17 +30,9 @@ class Genode::Mmio_plain_access
{ {
friend Register_set_plain_access; friend Register_set_plain_access;
public:
/**
* FIXME We keep this public only to stay interface compatible
* but the value should be accessible only through an
* accessor.
*/
addr_t const base;
private: private:
addr_t const _base;
/** /**
* Write '_ACCESS_T' typed 'value' to MMIO base + 'offset' * Write '_ACCESS_T' typed 'value' to MMIO base + 'offset'
@ -48,7 +40,7 @@ class Genode::Mmio_plain_access
template <typename ACCESS_T> template <typename ACCESS_T>
inline void _write(off_t const offset, ACCESS_T const value) inline void _write(off_t const offset, ACCESS_T const value)
{ {
addr_t const dst = base + offset; addr_t const dst = _base + offset;
*(ACCESS_T volatile *)dst = value; *(ACCESS_T volatile *)dst = value;
} }
@ -58,7 +50,7 @@ class Genode::Mmio_plain_access
template <typename ACCESS_T> template <typename ACCESS_T>
inline ACCESS_T _read(off_t const &offset) const inline ACCESS_T _read(off_t const &offset) const
{ {
addr_t const dst = base + offset; addr_t const dst = _base + offset;
ACCESS_T const value = *(ACCESS_T volatile *)dst; ACCESS_T const value = *(ACCESS_T volatile *)dst;
return value; return value;
} }
@ -70,7 +62,9 @@ class Genode::Mmio_plain_access
* *
* \param base base address of targeted MMIO region * \param base base address of targeted MMIO region
*/ */
Mmio_plain_access(addr_t const base) : base(base) { } Mmio_plain_access(addr_t const base) : _base(base) { }
addr_t base() const { return _base; }
}; };

10
repos/os/src/drivers/acpi/acpi.cc
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@ -133,7 +133,7 @@ struct Dmar_struct_header : Generic
func(dmar); func(dmar);
addr = dmar.base + dmar.read<Dmar_common::Length>(); addr = dmar.base() + dmar.read<Dmar_common::Length>();
} while (addr < dmar_entry_end()); } while (addr < dmar_entry_end());
} }
@ -178,14 +178,14 @@ struct Dmar_rmrr : Genode::Mmio
template <typename FUNC> template <typename FUNC>
void apply(FUNC const &func = [] () { } ) void apply(FUNC const &func = [] () { } )
{ {
addr_t addr = base + 24; addr_t addr = base() + 24;
do { do {
Device_scope scope(addr); Device_scope scope(addr);
func(scope); func(scope);
addr = scope.base + scope.read<Device_scope::Length>(); addr = scope.base() + scope.read<Device_scope::Length>();
} while (addr < base + read<Length>()); } while (addr < base() + read<Length>());
} }
}; };
@ -1349,7 +1349,7 @@ void Acpi::generate_report(Genode::Env &env, Genode::Allocator &alloc)
if (dmar.read<Dmar_common::Type>() != Dmar_common::Type::RMRR) if (dmar.read<Dmar_common::Type>() != Dmar_common::Type::RMRR)
return; return;
Dmar_rmrr rmrr(dmar.base); Dmar_rmrr rmrr(dmar.base());
xml.node("rmrr", [&] () { xml.node("rmrr", [&] () {
attribute_hex(xml, "start", rmrr.read<Dmar_rmrr::Base>()); attribute_hex(xml, "start", rmrr.read<Dmar_rmrr::Base>());

4
repos/os/src/drivers/ahci/ahci.h
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@ -202,7 +202,7 @@ struct Command_fis : Genode::Mmio
} }
static constexpr Genode::size_t size() { return 0x14; } static constexpr Genode::size_t size() { return 0x14; }
void clear() { Genode::memset((void *)base, 0, size()); } void clear() { Genode::memset((void *)base(), 0, size()); }
/************************ /************************
@ -402,7 +402,7 @@ struct Port_base : Genode::Mmio
static constexpr Genode::size_t size() { return 0x80; } static constexpr Genode::size_t size() { return 0x80; }
Port_base(unsigned number, Hba &hba) Port_base(unsigned number, Hba &hba)
: Mmio(hba.base + offset() + (number * size())) { } : Mmio(hba.base() + offset() + (number * size())) { }
}; };

4
repos/os/src/drivers/framebuffer/spec/imx53/ipu.h
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@ -215,7 +215,7 @@ class Ipu : Genode::Mmio
Genode::uint16_t width, Genode::uint16_t height, Genode::uint16_t width, Genode::uint16_t height,
Genode::uint32_t stride, Genode::addr_t phys_base) Genode::uint32_t stride, Genode::addr_t phys_base)
{ {
void *dst =(void*)(base + Cp_mem::OFFSET + channel*sizeof(Cp_mem)); void *dst =(void*)(base() + Cp_mem::OFFSET + channel*sizeof(Cp_mem));
Cp_mem cpmem; Cp_mem cpmem;
cpmem.fw = width - 1; cpmem.fw = width - 1;
@ -529,7 +529,7 @@ class Ipu : Genode::Mmio
void overlay(Genode::addr_t phys_base, int x, int y, int alpha) void overlay(Genode::addr_t phys_base, int x, int y, int alpha)
{ {
volatile Genode::uint32_t *ptr = (volatile Genode::uint32_t*) volatile Genode::uint32_t *ptr = (volatile Genode::uint32_t*)
(base + Cp_mem::OFFSET + CHAN_DP_PRIMARY_AUXI*sizeof(Cp_mem)); (base() + Cp_mem::OFFSET + CHAN_DP_PRIMARY_AUXI*sizeof(Cp_mem));
ptr[8] = (((phys_base >> 3) & 0b111) << 29) | (phys_base >> 3); ptr[8] = (((phys_base >> 3) & 0b111) << 29) | (phys_base >> 3);
ptr[9] = (phys_base >> 6); ptr[9] = (phys_base >> 6);